Index: arch/ia32/src/smp/apic.c
===================================================================
--- arch/ia32/src/smp/apic.c	(revision 66def8d85720069e272ce3e7173a3b965e56b072)
+++ arch/ia32/src/smp/apic.c	(revision d4efc19a62ad2481c255b0b5c088c22486cfecbe)
@@ -45,5 +45,5 @@
  * Advanced Programmable Interrupt Controller for SMP systems.
  * Tested on:
- *	Bochs 2.0.2 - Bochs 2.2.5 with 2-8 CPUs
+ *	Bochs 2.0.2 - Bochs 2.2.6 with 2-8 CPUs
  *	Simics 2.0.28 - Simics 2.2.19 2-15 CPUs
  *	VMware Workstation 5.5 with 2 CPUs
@@ -309,4 +309,5 @@
 	lvt_error_t error;
 	lvt_lint_t lint;
+	tpr_t tpr;
 	svr_t svr;
 	icr_t icr;
@@ -331,4 +332,10 @@
 	lint.masked = true;
 	l_apic[LVT_LINT1] = lint.value;
+
+	/* Task Priority Register initialization. */
+	tpr.value = l_apic[TPR];
+	tpr.pri_sc = 0;
+	tpr.pri = 0;
+	l_apic[TPR] = tpr.value;
 	
 	/* Spurious-Interrupt Vector Register initialization. */
@@ -336,7 +343,6 @@
 	svr.vector = VECTOR_APIC_SPUR;
 	svr.lapic_enabled = true;
+	svr.focus_checking = true;
 	l_apic[SVR] = svr.value;
-
-	l_apic[TPR] &= TPRClear;
 
 	if (CPU->arch.family >= 6)