Index: kernel/arch/amd64/src/amd64.c
===================================================================
--- kernel/arch/amd64/src/amd64.c	(revision 87a57963770ed25144cc5465eac8c036c70d4201)
+++ kernel/arch/amd64/src/amd64.c	(revision d1cbad5d70ff4d3f6defcd8aa18099c29887260b)
@@ -120,5 +120,6 @@
 
 		/* PIC */
-		i8259_init();
+		i8259_init((i8259_t *) I8259_PIC0_BASE,
+		    (i8259_t *) I8259_PIC1_BASE);
 	}
 }
Index: kernel/arch/ia32/src/ia32.c
===================================================================
--- kernel/arch/ia32/src/ia32.c	(revision 87a57963770ed25144cc5465eac8c036c70d4201)
+++ kernel/arch/ia32/src/ia32.c	(revision d1cbad5d70ff4d3f6defcd8aa18099c29887260b)
@@ -109,5 +109,6 @@
 
 		/* PIC */
-		i8259_init();
+		i8259_init((i8259_t *) I8259_PIC0_BASE,
+		    (i8259_t *) I8259_PIC1_BASE);
 	}
 }
Index: kernel/genarch/include/genarch/drivers/i8259/i8259.h
===================================================================
--- kernel/genarch/include/genarch/drivers/i8259/i8259.h	(revision 87a57963770ed25144cc5465eac8c036c70d4201)
+++ kernel/genarch/include/genarch/drivers/i8259/i8259.h	(revision d1cbad5d70ff4d3f6defcd8aa18099c29887260b)
@@ -39,9 +39,4 @@
 #include <arch/interrupt.h>
 
-#define PIC_PIC0PORT1  ((ioport8_t *) 0x20U)
-#define PIC_PIC0PORT2  ((ioport8_t *) 0x21U)
-#define PIC_PIC1PORT1  ((ioport8_t *) 0xa0U)
-#define PIC_PIC1PORT2  ((ioport8_t *) 0xa1U)
-
 /* ICW1 bits */
 #define PIC_ICW1           (1 << 4)
@@ -52,5 +47,10 @@
 #define PIC_OCW4_NSEOI     (1 << 5)
 
-extern void i8259_init(void);
+typedef struct {
+	ioport8_t port1;
+	ioport8_t port2;
+} __attribute__((packed)) i8259_t;
+
+extern void i8259_init(i8259_t *, i8259_t *);
 extern void pic_enable_irqs(uint16_t);
 extern void pic_disable_irqs(uint16_t);
Index: kernel/genarch/include/genarch/drivers/legacy/ia32/io.h
===================================================================
--- kernel/genarch/include/genarch/drivers/legacy/ia32/io.h	(revision 87a57963770ed25144cc5465eac8c036c70d4201)
+++ kernel/genarch/include/genarch/drivers/legacy/ia32/io.h	(revision d1cbad5d70ff4d3f6defcd8aa18099c29887260b)
@@ -44,4 +44,7 @@
 #define NS16550_BASE  ((ioport8_t *) 0x3f8)
 
+#define I8259_PIC0_BASE ((ioport8_t *) 0x20U)
+#define I8259_PIC1_BASE ((ioport8_t *) 0xA0U)
+
 #define EGA_VIDEORAM  0xb8000
 
Index: kernel/genarch/src/drivers/i8259/i8259.c
===================================================================
--- kernel/genarch/src/drivers/i8259/i8259.c	(revision 87a57963770ed25144cc5465eac8c036c70d4201)
+++ kernel/genarch/src/drivers/i8259/i8259.c	(revision d1cbad5d70ff4d3f6defcd8aa18099c29887260b)
@@ -47,29 +47,36 @@
 static void pic_spurious(unsigned int n, istate_t *istate);
 
-void i8259_init(void)
+// XXX: need to change pic_* API to get rid of these
+static i8259_t *saved_pic0;
+static i8259_t *saved_pic1;
+
+void i8259_init(i8259_t *pic0, i8259_t *pic1)
 {
+	saved_pic0 = pic0;
+	saved_pic1 = pic1;
+
 	/* ICW1: this is ICW1, ICW4 to follow */
-	pio_write_8(PIC_PIC0PORT1, PIC_ICW1 | PIC_ICW1_NEEDICW4);
+	pio_write_8(&pic0->port1, PIC_ICW1 | PIC_ICW1_NEEDICW4);
 
 	/* ICW2: IRQ 0 maps to INT IRQBASE */
-	pio_write_8(PIC_PIC0PORT2, IVT_IRQBASE);
+	pio_write_8(&pic0->port2, IVT_IRQBASE);
 
 	/* ICW3: pic1 using IRQ IRQ_PIC1 */
-	pio_write_8(PIC_PIC0PORT2, 1 << IRQ_PIC1);
+	pio_write_8(&pic0->port2, 1 << IRQ_PIC1);
 
 	/* ICW4: i8086 mode */
-	pio_write_8(PIC_PIC0PORT2, 1);
+	pio_write_8(&pic0->port2, 1);
 
 	/* ICW1: ICW1, ICW4 to follow */
-	pio_write_8(PIC_PIC1PORT1, PIC_ICW1 | PIC_ICW1_NEEDICW4);
+	pio_write_8(&pic1->port1, PIC_ICW1 | PIC_ICW1_NEEDICW4);
 
 	/* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
-	pio_write_8(PIC_PIC1PORT2, IVT_IRQBASE + 8);
+	pio_write_8(&pic1->port2, IVT_IRQBASE + 8);
 
 	/* ICW3: pic1 is known as IRQ_PIC1 */
-	pio_write_8(PIC_PIC1PORT2, IRQ_PIC1);
+	pio_write_8(&pic1->port2, IRQ_PIC1);
 
 	/* ICW4: i8086 mode */
-	pio_write_8(PIC_PIC1PORT2, 1);
+	pio_write_8(&pic1->port2, 1);
 
 	/*
@@ -97,10 +104,12 @@
 
 	if (irqmask & 0xff) {
-		x = pio_read_8(PIC_PIC0PORT2);
-		pio_write_8(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff))));
+		x = pio_read_8(&saved_pic0->port2);
+		pio_write_8(&saved_pic0->port2,
+		    (uint8_t) (x & (~(irqmask & 0xff))));
 	}
 	if (irqmask >> 8) {
-		x = pio_read_8(PIC_PIC1PORT2);
-		pio_write_8(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8))));
+		x = pio_read_8(&saved_pic1->port2);
+		pio_write_8(&saved_pic1->port2,
+		    (uint8_t) (x & (~(irqmask >> 8))));
 	}
 }
@@ -111,10 +120,11 @@
 
 	if (irqmask & 0xff) {
-		x = pio_read_8(PIC_PIC0PORT2);
-		pio_write_8(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff)));
+		x = pio_read_8(&saved_pic0->port2);
+		pio_write_8(&saved_pic0->port2,
+		    (uint8_t) (x | (irqmask & 0xff)));
 	}
 	if (irqmask >> 8) {
-		x = pio_read_8(PIC_PIC1PORT2);
-		pio_write_8(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8)));
+		x = pio_read_8(&saved_pic1->port2);
+		pio_write_8(&saved_pic1->port2, (uint8_t) (x | (irqmask >> 8)));
 	}
 }
@@ -122,6 +132,6 @@
 void pic_eoi(void)
 {
-	pio_write_8(PIC_PIC0PORT1, PIC_OCW4 | PIC_OCW4_NSEOI);
-	pio_write_8(PIC_PIC1PORT1, PIC_OCW4 | PIC_OCW4_NSEOI);
+	pio_write_8(&saved_pic0->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
+	pio_write_8(&saved_pic1->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
 }
 
