Index: arch/amd64/include/mm/tlb.h =================================================================== --- arch/amd64/include/mm/tlb.h (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) +++ arch/amd64/include/mm/tlb.h (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __amd64_TLB_H__ +#define __amd64_TLB_H__ + +#define tlb_init_arch() + +#endif Index: arch/ia32/include/mm/tlb.h =================================================================== --- arch/ia32/include/mm/tlb.h (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) +++ arch/ia32/include/mm/tlb.h (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ia32_TLB_H__ +#define __ia32_TLB_H__ + +#define tlb_init_arch() + +#endif Index: arch/ia64/include/mm/tlb.h =================================================================== --- arch/ia64/include/mm/tlb.h (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) +++ arch/ia64/include/mm/tlb.h (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ia64_TLB_H__ +#define __ia64_TLB_H__ + +#define tlb_init_arch() + +#endif Index: arch/mips32/include/cp0.h =================================================================== --- arch/mips32/include/cp0.h (revision 1e2aecca40050ab89248e07dfda8bd912f0e329d) +++ arch/mips32/include/cp0.h (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) @@ -53,22 +53,4 @@ #define cp0_compare_value 10000 -static inline void tlbp(void) -{ - __asm__ volatile ("tlbp"); -} - -static inline void tlbr(void) -{ - __asm__ volatile ("tlbr"); -} -static inline void tlbwi(void) -{ - __asm__ volatile ("tlbwi"); -} -static inline void tlbwr(void) -{ - __asm__ volatile ("tlbwr"); -} - #define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) #define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask) @@ -76,7 +58,6 @@ #define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1<<(cp0_status_im_shift+(it)))) - extern __u32 cp0_index_read(void); -extern void cp0_idnex_write(__u32 val); +extern void cp0_index_write(__u32 val); extern __u32 cp0_random_read(void); Index: arch/mips32/include/mm/tlb.h =================================================================== --- arch/mips32/include/mm/tlb.h (revision 1e2aecca40050ab89248e07dfda8bd912f0e329d) +++ arch/mips32/include/mm/tlb.h (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) @@ -31,4 +31,11 @@ #include + +#define TLB_SIZE 48 + +#define TLB_WIRED 1 +#define TLB_KSTACK_WIRED_INDEX 0 + +#define TLB_PAGE_MASK_16K (0x3<<13) #define PAGE_UNCACHED 2 @@ -66,6 +73,34 @@ typedef struct entry_lo pte_t; +/** Read Indexed TLB Entry + * + * Read Indexed TLB Entry. + */ +static inline void tlbr(void) +{ + __asm__ volatile ("tlbr\n\t"); +} + +/** Write Indexed TLB Entry + * + * Write Indexed TLB Entry. + */ +static inline void tlbwi(void) +{ + __asm__ volatile ("tlbwi\n\t"); +} + +/** Write Random TLB Entry + * + * Write Random TLB Entry. + */ +static inline void tlbwr(void) +{ + __asm__ volatile ("tlbwr\n\t"); +} + extern void tlb_invalid(struct exception_regdump *pstate); extern void tlb_refill(struct exception_regdump *pstate); +extern void tlb_modified(struct exception_regdump *pstate); #endif Index: arch/mips32/src/asm.S =================================================================== --- arch/mips32/src/asm.S (revision 1e2aecca40050ab89248e07dfda8bd912f0e329d) +++ arch/mips32/src/asm.S (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) @@ -63,6 +63,6 @@ .global cp0_count_read .global cp0_count_write -.global cp0_hi_read -.global cp0_hi_write +.global cp0_entry_hi_read +.global cp0_entry_hi_write .global cp0_compare_read .global cp0_compare_write Index: arch/mips32/src/exception.c =================================================================== --- arch/mips32/src/exception.c (revision 1e2aecca40050ab89248e07dfda8bd912f0e329d) +++ arch/mips32/src/exception.c (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) @@ -81,5 +81,5 @@ break; case EXC_Mod: - panic("unhandled TLB Modification Exception\n"); + tlb_modified(pstate); break; case EXC_AdEL: Index: arch/mips32/src/mm/tlb.c =================================================================== --- arch/mips32/src/mm/tlb.c (revision 1e2aecca40050ab89248e07dfda8bd912f0e329d) +++ arch/mips32/src/mm/tlb.c (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) @@ -33,6 +33,29 @@ #include #include +#include -#include +void tlb_init_arch(void) +{ + int i; + + cp0_pagemask_write(TLB_PAGE_MASK_16K); + cp0_entry_hi_write(0); + cp0_entry_lo0_write(0); + cp0_entry_lo1_write(0); + + /* + * Invalidate all entries. + */ + for (i = 0; i < TLB_SIZE; i++) { + cp0_index_write(0); + tlbwi(); + } + + /* + * The kernel is going to make use of some wired + * entries (e.g. mapping kernel stacks). + */ + cp0_wired_write(TLB_WIRED); +} void tlb_refill(struct exception_regdump *pstate) @@ -47,6 +70,6 @@ if (s) sym2 = s; - panic("%X: tlb_refill exception at %X(%s<-%s)\n", cp0_badvaddr_read(), - pstate->epc, symbol,sym2); + panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), + pstate->epc, symbol, sym2); } @@ -58,7 +81,19 @@ if (s) symbol = s; - panic("%X: TLB exception at %X(%s)\n", cp0_badvaddr_read(), + panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol); } + +void tlb_modified(struct exception_regdump *pstate) +{ + char *symbol = ""; + + char *s = get_symtab_entry(pstate->epc); + if (s) + symbol = s; + panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), + pstate->epc, symbol); +} + void tlb_invalidate(int asid) Index: arch/ppc32/include/mm/tlb.h =================================================================== --- arch/ppc32/include/mm/tlb.h (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) +++ arch/ppc32/include/mm/tlb.h (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ppc32_TLB_H__ +#define __ppc32_TLB_H__ + +#define tlb_init_arch() + +#endif Index: include/mm/tlb.h =================================================================== --- include/mm/tlb.h (revision 1e2aecca40050ab89248e07dfda8bd912f0e329d) +++ include/mm/tlb.h (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) @@ -30,19 +30,18 @@ #define __TLB_H__ +extern void tlb_init(void); + #ifdef __SMP__ -extern void tlb_init(void); extern void tlb_shootdown_start(void); extern void tlb_shootdown_finalize(void); extern void tlb_shootdown_ipi_recv(void); #else - -#define tlb_init() ; -#define tlb_shootdown_start() ; -#define tlb_shootdown_finalize() ; -#define tlb_shootdown_ipi_recv() ; - +# define tlb_shootdown_start() ; +# define tlb_shootdown_finalize() ; +# define tlb_shootdown_ipi_recv() ; #endif /* __SMP__ */ /* Export TLB interface that each architecture must implement. */ +extern void tlb_init_arch(void); extern void tlb_invalidate(int asid); extern void tlb_shootdown_ipi_send(void); Index: src/main/main.c =================================================================== --- src/main/main.c (revision 1e2aecca40050ab89248e07dfda8bd912f0e329d) +++ src/main/main.c (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) @@ -152,5 +152,4 @@ page_init(); tlb_init(); - arch_post_mm_init(); @@ -231,4 +230,5 @@ frame_init(); page_init(); + tlb_init(); arch_post_mm_init(); Index: src/mm/tlb.c =================================================================== --- src/mm/tlb.c (revision 1e2aecca40050ab89248e07dfda8bd912f0e329d) +++ src/mm/tlb.c (revision ce031f07ead21cd492a302c2b305510e36f8dfb5) @@ -28,4 +28,5 @@ #include +#include #include #include @@ -38,10 +39,15 @@ #ifdef __SMP__ static spinlock_t tlblock; +#endif void tlb_init(void) { - spinlock_initialize(&tlblock); + if (config.cpu_active == 1) + spinlock_initialize(&tlblock); + + tlb_init_arch(); } +#ifdef __SMP__ /* must be called with interrupts disabled */ void tlb_shootdown_start(void)