Changes in / [c6a7b3a:cc3c27ad] in mainline
- Files:
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- 6 added
- 8 deleted
- 49 edited
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HelenOS.config (modified) (9 diffs)
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boot/arch/mips32/Makefile.inc (modified) (1 diff)
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boot/arch/mips32/_link.ld.in (modified) (1 diff)
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boot/arch/mips32/include/arch.h (modified) (2 diffs)
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boot/arch/mips32/include/types.h (modified) (1 diff)
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boot/arch/mips32/src/asm.S (modified) (1 diff)
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boot/arch/mips32/src/main.c (modified) (3 diffs)
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boot/arch/mips32/src/putchar.c (modified) (1 diff)
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boot/generic/include/memstr.h (modified) (1 diff)
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boot/generic/src/memstr.c (modified) (1 diff)
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contrib/conf/ia32-qe.sh (modified) (2 diffs)
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contrib/conf/mips32-gx.sh (added)
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contrib/conf/net-qe.sh (modified) (1 diff)
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defaults/mips32/GXemul/Makefile.config (added)
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defaults/mips32/malta-be/Makefile.config (deleted)
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defaults/mips32/malta-le/Makefile.config (deleted)
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kernel/arch/amd64/src/mm/page.c (modified) (2 diffs)
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kernel/arch/arm32/src/fpu_context.c (modified) (1 diff)
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kernel/arch/ia32/src/mm/page.c (modified) (2 diffs)
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kernel/arch/mips32/Makefile.inc (modified) (3 diffs)
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kernel/arch/mips32/_link.ld.in (modified) (1 diff)
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kernel/arch/mips32/include/arch/arch.h (modified) (2 diffs)
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kernel/arch/mips32/include/arch/cp0.h (modified) (1 diff)
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kernel/arch/mips32/include/arch/mach/malta/malta.h (deleted)
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kernel/arch/mips32/include/arch/mach/msim/msim.h (deleted)
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kernel/arch/mips32/include/arch/machine_func.h (deleted)
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kernel/arch/mips32/include/arch/mm/tlb.h (modified) (2 diffs)
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kernel/arch/mips32/src/exception.c (modified) (1 diff)
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kernel/arch/mips32/src/interrupt.c (modified) (5 diffs)
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kernel/arch/mips32/src/mach/malta/malta.c (deleted)
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kernel/arch/mips32/src/mach/msim/msim.c (deleted)
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kernel/arch/mips32/src/machine_func.c (deleted)
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kernel/arch/mips32/src/mips32.c (modified) (5 diffs)
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kernel/arch/mips32/src/mm/frame.c (modified) (4 diffs)
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kernel/arch/mips32/src/mm/tlb.c (modified) (20 diffs)
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kernel/arch/mips64/src/mips64.c (modified) (3 diffs)
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kernel/arch/mips64/src/mm/frame.c (modified) (1 diff)
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kernel/arch/sparc64/src/mm/sun4u/tlb.c (modified) (2 diffs)
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kernel/generic/include/mm/tlb.h (modified) (1 diff)
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kernel/generic/src/mm/as.c (modified) (7 diffs)
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kernel/generic/src/mm/backend_anon.c (modified) (3 diffs)
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kernel/generic/src/mm/backend_elf.c (modified) (4 diffs)
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kernel/generic/src/mm/backend_phys.c (modified) (3 diffs)
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kernel/generic/src/mm/page.c (modified) (3 diffs)
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kernel/generic/src/sysinfo/sysinfo.c (modified) (1 diff)
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release/Makefile (modified) (1 diff)
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tools/autotool.py (modified) (1 diff)
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tools/toolchain.sh (modified) (2 diffs)
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uspace/Makefile (modified) (1 diff)
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uspace/app/init/init.c (modified) (1 diff)
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uspace/lib/c/arch/mips32/Makefile.common (modified) (2 diffs)
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uspace/lib/c/arch/mips32eb/Makefile.common (modified) (2 diffs)
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uspace/srv/bd/gxe_bd/Makefile (added)
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uspace/srv/bd/gxe_bd/gxe_bd.c (added)
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uspace/srv/fs/exfat/exfat_fat.c (modified) (1 diff)
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uspace/srv/fs/fat/fat_fat.c (modified) (5 diffs)
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uspace/srv/fs/mfs/mfs_ops.c (modified) (2 diffs)
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uspace/srv/hid/input/Makefile (modified) (2 diffs)
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uspace/srv/hid/input/ctl/gxe_fb.c (added)
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uspace/srv/hid/input/input.c (modified) (1 diff)
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uspace/srv/hid/input/kbd_ctl.h (modified) (1 diff)
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uspace/srv/hid/input/kbd_port.h (modified) (1 diff)
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uspace/srv/hid/input/port/gxemul.c (added)
Legend:
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HelenOS.config
rc6a7b3a rcc3c27ad 44 44 % Machine type 45 45 @ "msim" MSIM 46 @ "b malta" MIPS Malta Development Boardbig endian47 @ "l malta" MIPS Malta Development Boardlittle endian46 @ "bgxemul" GXEmul big endian 47 @ "lgxemul" GXEmul little endian 48 48 ! [PLATFORM=mips32] MACHINE (choice) 49 49 … … 115 115 ! [PLATFORM=arm32&(PROCESSOR=cortex_a8)] PROCESSOR_ARCH (choice) 116 116 117 % CPU type118 @ "R4000" MIPS R4000119 ! [PLATFORM=mips32&MACHINE=msim] PROCESSOR (choice)120 121 % CPU type122 @ "4Kc" MIPS 4Kc123 ! [PLATFORM=mips32&(MACHINE=bmalta|MACHINE=lmalta)] PROCESSOR (choice)124 125 117 % RAM disk format 126 118 @ "tmpfs" TMPFS image … … 201 193 % User space architecture 202 194 @ "mips32" 203 ! [PLATFORM=mips32&(MACHINE=msim|MACHINE=l malta)] UARCH (choice)195 ! [PLATFORM=mips32&(MACHINE=msim|MACHINE=lgxemul)] UARCH (choice) 204 196 205 197 % User space architecture 206 198 @ "mips32eb" 207 ! [PLATFORM=mips32&MACHINE=b malta] UARCH (choice)199 ! [PLATFORM=mips32&MACHINE=bgxemul] UARCH (choice) 208 200 209 201 % User space architecture … … 278 270 279 271 % Image format 280 @ "e lf"281 ! [PLATFORM=mips32&(MACHINE=b malta|MACHINE=lmalta)] IMAGE (choice)272 @ "ecoff" 273 ! [PLATFORM=mips32&(MACHINE=bgxemul|MACHINE=lgxemul)] IMAGE (choice) 282 274 283 275 % Image format … … 368 360 ! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=ia64|PLATFORM=sparc64] CONFIG_FPU (y) 369 361 362 % FPU support 363 ! [PLATFORM=mips32&(MACHINE=lgxemul|MACHINE=bgxemul)] CONFIG_FPU (y) 364 370 365 ## armv7 made fpu hardware compulsory 371 366 % FPU support … … 452 447 @ "generic" Monitor or serial line 453 448 @ "none" No output device 454 ! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ppc32|(PLATFORM=ia64&MACHINE=i460GX)|(PLATFORM=mips32&(MACHINE=msim|MACHINE=bmalta|MACHINE=lmalta))|(PLATFORM=mips64&MACHINE=msim)] CONFIG_HID_OUT (choice) 449 ! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ppc32|(PLATFORM=ia64&MACHINE=i460GX)|(PLATFORM=mips32&MACHINE=msim)|(PLATFORM=mips64&MACHINE=msim)] CONFIG_HID_OUT (choice) 450 451 % Output device class 452 @ "generic" Monitor or serial line 453 @ "monitor" Monitor 454 @ "serial" Serial line 455 @ "none" No output device 456 ! [PLATFORM=mips32&(MACHINE=bgxemul|MACHINE=lgxemul)] CONFIG_HID_OUT (choice) 455 457 456 458 % PC keyboard support … … 463 465 ! [(CONFIG_HID_IN=generic|CONFIG_HID_IN=keyboard)&PLATFORM=arm32&MACHINE=integratorcp] CONFIG_PC_KBD (y/n) 464 466 465 % Support for msim keyboard466 ! [CONFIG_HID_IN=generic& MACHINE=msim] CONFIG_MSIM_KBD (y/n)467 468 % Support for msim printer469 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)& MACHINE=msim] CONFIG_MSIM_PRN (y/n)467 % Support for msim/GXemul keyboard 468 ! [CONFIG_HID_IN=generic&(PLATFORM=mips32|PLATFORM=mips64)] CONFIG_MIPS_KBD (y/n) 469 470 % Support for msim/GXemul printer 471 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&(PLATFORM=mips32|PLATFORM=mips64)] CONFIG_MIPS_PRN (y/n) 470 472 471 473 % Support for VIA CUDA controller … … 509 511 510 512 % Dummy serial line input 511 ! [CONFIG_M SIM_KBD=y|CONFIG_ARM_KBD=y] CONFIG_DSRLNIN (y)513 ! [CONFIG_MIPS_KBD=y|CONFIG_ARM_KBD=y] CONFIG_DSRLNIN (y) 512 514 513 515 % Dummy serial line output 514 ! [CONFIG_M SIM_PRN=y|CONFIG_ARM_PRN=y] CONFIG_DSRLNOUT (y)516 ! [CONFIG_MIPS_PRN=y|CONFIG_ARM_PRN=y] CONFIG_DSRLNOUT (y) 515 517 516 518 % Serial line input module … … 525 527 % Framebuffer support 526 528 ! [CONFIG_HID_OUT=generic&(PLATFORM=ia32|PLATFORM=amd64|PLATFORM=ppc32)] CONFIG_FB (y/n) 529 530 % Framebuffer support 531 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=monitor)&PLATFORM=mips32&(MACHINE=lgxemul|MACHINE=bgxemul)] CONFIG_FB (y/n) 527 532 528 533 % Framebuffer support -
boot/arch/mips32/Makefile.inc
rc6a7b3a rcc3c27ad 29 29 BFD_ARCH = mips 30 30 BITS = 32 31 EXTRA_CFLAGS = -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -m abi=3231 EXTRA_CFLAGS = -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=32 32 32 33 RD_SRVS_NON_ESSENTIAL += \ 34 $(USPACE_PATH)/srv/bd/gxe_bd/gxe_bd 35 36 ifeq ($(MACHINE),lgxemul) 37 BFD_NAME = elf32-tradlittlemips 38 BFD_OUTPUT = ecoff-littlemips 39 ENDIANESS = LE 40 endif 41 ifeq ($(MACHINE),bgxemul) 42 BFD_NAME = elf32-tradbigmips 43 BFD_OUTPUT = ecoff-bigmips 44 ENDIANESS = BE 45 endif 33 46 ifeq ($(MACHINE),msim) 34 47 BFD_NAME = elf32-tradlittlemips 35 48 BFD_OUTPUT = binary 36 49 ENDIANESS = LE 37 EXTRA_CFLAGS += -march=r400038 50 endif 39 ifeq ($(MACHINE),lmalta)40 BFD_NAME = elf32-tradlittlemips41 BFD_OUTPUT = elf32-tradlittlemips42 ENDIANESS = LE43 EXTRA_CFLAGS += -march=4kc44 endif45 ifeq ($(MACHINE),bmalta)46 BFD_NAME = elf32-tradbigmips47 BFD_OUTPUT = elf32-tradbigmips48 ENDIANESS = BE49 EXTRA_CFLAGS += -march=4kc50 endif51 52 51 53 52 SOURCES = \ -
boot/arch/mips32/_link.ld.in
rc6a7b3a rcc3c27ad 2 2 3 3 SECTIONS { 4 #if defined(MACHINE_msim)5 4 . = 0xbfc00000; 6 #elif defined(MACHINE_lmalta) || defined(MACHINE_bmalta)7 . = 0x80103000;8 #endif9 5 .text : { 10 6 *(BOOTSTRAP); -
boot/arch/mips32/include/arch.h
rc6a7b3a rcc3c27ad 33 33 #define PAGE_SIZE (1 << PAGE_WIDTH) 34 34 35 #if defined(MACHINE_msim)36 35 #define CPUMAP_OFFSET 0x00001000 37 36 #define STACK_OFFSET 0x00002000 … … 42 41 #define MSIM_VIDEORAM_ADDRESS 0xb0000000 43 42 #define MSIM_DORDER_ADDRESS 0xb0000100 44 #endif45 46 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)47 #define CPUMAP_OFFSET 0x0010000048 #define STACK_OFFSET 0x0010100049 #define BOOTINFO_OFFSET 0x0010200050 #define BOOT_OFFSET 0x0020000051 #define LOADER_OFFSET 0x0010300052 53 #define YAMON_SUBR_BASE PA2KA(0x1fc00500)54 #define YAMON_SUBR_PRINT_COUNT (YAMON_SUBR_BASE + 0x4)55 #endif56 43 57 44 #ifndef __ASM__ 58 45 #define PA2KA(addr) (((uintptr_t) (addr)) + 0x80000000) 59 #define PA2KSEG(addr) (((uintptr_t) (addr)) + 0xa0000000)60 #define KA2PA(addr) (((uintptr_t) (addr)) - 0x80000000)61 46 #define KSEG2PA(addr) (((uintptr_t) (addr)) - 0xa0000000) 62 47 #else -
boot/arch/mips32/include/types.h
rc6a7b3a rcc3c27ad 47 47 48 48 typedef struct { 49 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)50 uint32_t sdram_size;51 #endif52 49 uint32_t cpumap; 53 50 size_t cnt; -
boot/arch/mips32/src/asm.S
rc6a7b3a rcc3c27ad 51 51 and $a0, $a1, $a0 52 52 mtc0 $a0, $status 53 54 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)55 /*56 * Remember the size of the SDRAM in bootinfo.57 */58 la $a0, PA2KA(BOOTINFO_OFFSET)59 sw $a3, 0($a0)60 #endif61 53 62 54 /* -
boot/arch/mips32/src/main.c
rc6a7b3a rcc3c27ad 65 65 for (i = 0; i < COMPONENTS; i++) 66 66 printf(" %p|%p: %s image (%zu/%zu bytes)\n", components[i].start, 67 (uintptr_t) components[i].start >= PA2KSEG(0) ? 68 (void *) KSEG2PA(components[i].start) : 69 (void *) KA2PA(components[i].start), 70 components[i].name, components[i].inflated, 71 components[i].size); 67 (void *) KSEG2PA(components[i].start), components[i].name, 68 components[i].inflated, components[i].size); 72 69 73 70 void *dest[COMPONENTS]; … … 96 93 97 94 for (i = cnt; i > 0; i--) { 98 #ifdef MACHINE_msim99 95 void *tail = dest[i - 1] + components[i].inflated; 100 96 if (tail >= ((void *) PA2KA(LOADER_OFFSET))) { … … 103 99 halt(); 104 100 } 105 #endif106 101 107 102 printf("%s ", components[i - 1].name); -
boot/arch/mips32/src/putchar.c
rc6a7b3a rcc3c27ad 32 32 #include <str.h> 33 33 34 #ifdef PUTCHAR_ADDRESS35 #undef PUTCHAR_ADDRESS36 #endif37 38 #if defined(MACHINE_msim)39 #define _putchar(ch) msim_putchar((ch))40 static void msim_putchar(const wchar_t ch)41 {42 *((char *) MSIM_VIDEORAM_ADDRESS) = ch;43 }44 #endif45 46 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)47 #define _putchar(ch) yamon_putchar((ch))48 typedef void (**yamon_print_count_ptr_t)(uint32_t, const char *, uint32_t);49 yamon_print_count_ptr_t yamon_print_count =50 (yamon_print_count_ptr_t) YAMON_SUBR_PRINT_COUNT;51 52 static void yamon_putchar(const wchar_t wch)53 {54 const char ch = (char) wch;55 56 (*yamon_print_count)(0, &ch, 1);57 }58 #endif59 60 34 void putchar(const wchar_t ch) 61 35 { 62 36 if (ascii_check(ch)) 63 _putchar(ch);37 *((char *) MSIM_VIDEORAM_ADDRESS) = ch; 64 38 else 65 _putchar(U_SPECIAL);39 *((char *) MSIM_VIDEORAM_ADDRESS) = U_SPECIAL; 66 40 } 67 -
boot/generic/include/memstr.h
rc6a7b3a rcc3c27ad 36 36 37 37 extern void *memcpy(void *, const void *, size_t); 38 extern void *memset(void *, int, size_t);39 38 extern void *memmove(void *, const void *, size_t); 40 39 -
boot/generic/src/memstr.c
rc6a7b3a rcc3c27ad 30 30 #include <typedefs.h> 31 31 32 /** Move memory block without overlapping.32 /** Copy block of memory. 33 33 * 34 * Copy cnt bytes from src address to dst address. The source35 * and destinationmemory areas cannot overlap.34 * Copy cnt bytes from src address to dst address.The source and destination 35 * memory areas cannot overlap. 36 36 * 37 * @param dst Destination address to copy to.38 * @param src Source address to copy from.39 * @param cnt Number of bytes to copy.37 * @param src Source address to copy from. 38 * @param dst Destination address to copy to. 39 * @param cnt Number of bytes to copy. 40 40 * 41 * @return Destination address. 42 * 41 * @return Destination address. 43 42 */ 44 43 void *memcpy(void *dst, const void *src, size_t cnt) 45 44 { 46 uint8_t *dp = (uint8_t *) dst; 47 const uint8_t *sp = (uint8_t *) src; 48 49 while (cnt-- != 0) 50 *dp++ = *sp++; 51 52 return dst; 53 } 45 size_t i; 54 46 55 /** Fill block of memory. 56 * 57 * Fill cnt bytes at dst address with the value val. 58 * 59 * @param dst Destination address to fill. 60 * @param val Value to fill. 61 * @param cnt Number of bytes to fill. 62 * 63 * @return Destination address. 64 * 65 */ 66 void *memset(void *dst, int val, size_t cnt) 67 { 68 uint8_t *dp = (uint8_t *) dst; 69 70 while (cnt-- != 0) 71 *dp++ = val; 72 47 for (i = 0; i < cnt; i++) 48 ((uint8_t *) dst)[i] = ((uint8_t *) src)[i]; 49 73 50 return dst; 74 51 } -
contrib/conf/ia32-qe.sh
rc6a7b3a rcc3c27ad 1 1 #!/bin/sh 2 3 if [ -z "${QEMU_BINARY}" ] ; then4 QEMU_BINARY="`which --tty-only qemu 2> /dev/null`"5 fi6 7 if [ -z "${QEMU_BINARY}" ] ; then8 QEMU_BINARY="`which --tty-only qemu-system-i386 2> /dev/null`"9 fi10 11 if [ -z "${QEMU_BINARY}" ] ; then12 echo "QEMU binary not found"13 fi14 2 15 3 DISK_IMG=hdisk.img … … 20 8 fi 21 9 22 "${QEMU_BINARY}" "$@"-m 32 -hda "$DISK_IMG" -cdrom image.iso -boot d10 qemu $@ -m 32 -hda "$DISK_IMG" -cdrom image.iso -boot d -
contrib/conf/net-qe.sh
rc6a7b3a rcc3c27ad 1 1 #!/bin/sh 2 3 if [ -z "${QEMU_BINARY}" ] ; then4 QEMU_BINARY="`which --tty-only qemu 2> /dev/null`"5 fi6 7 if [ -z "${QEMU_BINARY}" ] ; then8 QEMU_BINARY="`which --tty-only qemu-system-x86_64 2> /dev/null`"9 fi10 11 if [ -z "${QEMU_BINARY}" ] ; then12 QEMU_BINARY="`which --tty-only qemu-system-i386 2> /dev/null`"13 fi14 15 if [ -z "${QEMU_BINARY}" ] ; then16 echo "QEMU binary not found"17 fi18 2 19 3 case "$1" in 20 4 ne2k) 21 5 shift 22 "${QEMU_BINARY}" "$@"-device ne2k_isa,irq=5,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso6 qemu $@ -device ne2k_isa,irq=5,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso 23 7 ;; 24 8 e1k) 25 9 shift 26 "${QEMU_BINARY}" "$@"-device e1000,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso10 qemu $@ -device e1000,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso 27 11 ;; 28 12 rtl8139) 29 13 shift 30 "${QEMU_BINARY}" "$@"-device rtl8139,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso14 qemu $@ -device rtl8139,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso 31 15 ;; 32 16 *) -
kernel/arch/amd64/src/mm/page.c
rc6a7b3a rcc3c27ad 78 78 void page_fault(unsigned int n, istate_t *istate) 79 79 { 80 uintptr_t badvaddr= read_cr2();80 uintptr_t page = read_cr2(); 81 81 82 82 if (istate->error_word & PFERR_CODE_RSVD) … … 92 92 access = PF_ACCESS_READ; 93 93 94 (void) as_page_fault(badvaddr, access, istate);94 as_page_fault(page, access, istate); 95 95 } 96 96 -
kernel/arch/arm32/src/fpu_context.c
rc6a7b3a rcc3c27ad 119 119 * rely on user decision to use CONFIG_FPU. 120 120 */ 121 #ifdef PROCESSOR_ARC H_armv7_a121 #ifdef PROCESSOR_ARC_armv7_a 122 122 const uint32_t cpacr = CPACR_read(); 123 123 /* FPU needs access to coprocessor 10 and 11. 124 * Moreover they need to have same access enabled */124 * Moreover they need to have same access enabledd */ 125 125 if (((cpacr & CPACR_CP_MASK(10)) != CPACR_CP_FULL_ACCESS(10)) && 126 126 ((cpacr & CPACR_CP_MASK(11)) != CPACR_CP_FULL_ACCESS(11))) { -
kernel/arch/ia32/src/mm/page.c
rc6a7b3a rcc3c27ad 84 84 void page_fault(unsigned int n __attribute__((unused)), istate_t *istate) 85 85 { 86 uintptr_t badvaddr;86 uintptr_t page; 87 87 pf_access_t access; 88 88 89 badvaddr= read_cr2();89 page = read_cr2(); 90 90 91 91 if (istate->error_word & PFERR_CODE_RSVD) … … 97 97 access = PF_ACCESS_READ; 98 98 99 (void) as_page_fault(badvaddr, access, istate); 99 if (as_page_fault(page, access, istate) == AS_PF_FAULT) { 100 fault_if_from_uspace(istate, "Page fault: %#x.", page); 101 panic_memtrap(istate, access, page, NULL); 102 } 100 103 } 101 104 -
kernel/arch/mips32/Makefile.inc
rc6a7b3a rcc3c27ad 29 29 BFD_ARCH = mips 30 30 BFD = binary 31 GCC_CFLAGS += -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -m abi=3231 GCC_CFLAGS += -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=32 32 32 33 33 BITS = 32 … … 36 36 # 37 37 38 ifeq ($(MACHINE),lgxemul) 39 BFD_NAME = elf32-tradlittlemips 40 ENDIANESS = LE 41 endif 42 ifeq ($(MACHINE),bgxemul) 43 BFD_NAME = elf32-tradbigmips 44 ENDIANESS = BE 45 GCC_CFLAGS += -D__BE__ 46 endif 38 47 ifeq ($(MACHINE),msim) 39 48 BFD_NAME = elf32-tradlittlemips 40 49 ENDIANESS = LE 41 GCC_CFLAGS += -march=r400042 endif43 ifeq ($(MACHINE),bmalta)44 BFD_NAME = elf32-tradbigmips45 ENDIANESS = BE46 GCC_CFLAGS += -D__BE__ -march=4kc47 endif48 ifeq ($(MACHINE),lmalta)49 BFD_NAME = elf32-tradlittlemips50 ENDIANESS = LE51 GCC_CFLAGS += -march=4kc52 50 endif 53 51 … … 71 69 arch/$(KARCH)/src/fpu_context.c \ 72 70 arch/$(KARCH)/src/ddi/ddi.c \ 73 arch/$(KARCH)/src/smp/smp.c \ 74 arch/$(KARCH)/src/machine_func.c 75 76 ifeq ($(MACHINE),msim) 77 ARCH_SOURCES += \ 78 arch/$(KARCH)/src/smp/dorder.c 79 endif 80 81 ifeq ($(MACHINE),$(filter lmalta bmalta,$(MACHINE))) 82 ARCH_SOURCES += arch/$(KARCH)/src/mach/malta/malta.c 83 endif 84 ifeq ($(MACHINE),msim) 85 ARCH_SOURCES += arch/$(KARCH)/src/mach/msim/msim.c 86 endif 87 71 arch/$(KARCH)/src/smp/dorder.c \ 72 arch/$(KARCH)/src/smp/smp.c -
kernel/arch/mips32/_link.ld.in
rc6a7b3a rcc3c27ad 10 10 #define mips mips 11 11 12 #if defined(MACHINE_msim)13 12 #define KERNEL_LOAD_ADDRESS 0x80100000 14 #endif15 16 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)17 #define KERNEL_LOAD_ADDRESS 0x8020000018 #endif19 13 20 14 OUTPUT_ARCH(mips) -
kernel/arch/mips32/include/arch/arch.h
rc6a7b3a rcc3c27ad 44 44 extern size_t cpu_count; 45 45 46 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)47 extern size_t sdram_size;48 #endif49 50 46 typedef struct { 51 47 void *addr; … … 55 51 56 52 typedef struct { 57 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)58 uint32_t sdram_size;59 #endif60 53 uint32_t cpumap; 61 54 size_t cnt; -
kernel/arch/mips32/include/arch/cp0.h
rc6a7b3a rcc3c27ad 45 45 #define cp0_status_im_shift 8 46 46 #define cp0_status_im_mask 0xff00 47 48 #define cp0_cause_ip_shift 849 #define cp0_cause_ip_mask 0xff0050 47 51 48 #define cp0_cause_excno(cause) ((cause >> 2) & 0x1f) -
kernel/arch/mips32/include/arch/mm/tlb.h
rc6a7b3a rcc3c27ad 41 41 #include <trace.h> 42 42 43 #if defined(PROCESSOR_R4000)44 43 #define TLB_ENTRY_COUNT 48 45 #define TLB_INDEX_BITS 646 #elif defined(PROCESSOR_4Kc)47 #define TLB_ENTRY_COUNT 1648 #define TLB_INDEX_BITS 449 #else50 #error Please define TLB_ENTRY_COUNT for the target processor.51 #endif52 44 53 #define TLB_WIRED 0 45 #define TLB_WIRED 1 46 #define TLB_KSTACK_WIRED_INDEX 0 54 47 55 48 #define TLB_PAGE_MASK_4K (0x000 << 13) … … 119 112 #ifdef __BE__ 120 113 unsigned p : 1; 121 unsigned : 32 - TLB_INDEX_BITS - 1;122 unsigned index : TLB_INDEX_BITS;114 unsigned : 25; 115 unsigned index : 6; 123 116 #else 124 unsigned index : TLB_INDEX_BITS;125 unsigned : 32 - TLB_INDEX_BITS - 1;117 unsigned index : 6; 118 unsigned : 25; 126 119 unsigned p : 1; 127 120 #endif -
kernel/arch/mips32/src/exception.c
rc6a7b3a rcc3c27ad 165 165 static void interrupt_exception(unsigned int n, istate_t *istate) 166 166 { 167 uint32_t ip;168 uint32_t im;169 170 167 /* Decode interrupt number and process the interrupt */ 171 ip = (cp0_cause_read() & cp0_cause_ip_mask) >> cp0_cause_ip_shift; 172 im = (cp0_status_read() & cp0_status_im_mask) >> cp0_status_im_shift; 168 uint32_t cause = (cp0_cause_read() >> 8) & 0xff; 173 169 174 170 unsigned int i; 175 171 for (i = 0; i < 8; i++) { 176 177 /* 178 * The interrupt could only occur if it is unmasked in the 179 * status register. On the other hand, an interrupt can be 180 * apparently pending even if it is masked, so we need to 181 * check both the masked and pending interrupts. 182 */ 183 if (im & ip & (1 << i)) { 172 if (cause & (1 << i)) { 184 173 irq_t *irq = irq_dispatch_and_lock(i); 185 174 if (irq) { -
kernel/arch/mips32/src/interrupt.c
rc6a7b3a rcc3c27ad 45 45 #define IRQ_COUNT 8 46 46 #define TIMER_IRQ 7 47 48 #ifdef MACHINE_msim49 47 #define DORDER_IRQ 5 50 #endif51 48 52 49 function virtual_timer_fnc = NULL; 53 50 static irq_t timer_irq; 54 55 #ifdef MACHINE_msim56 51 static irq_t dorder_irq; 57 #endif58 52 59 53 // TODO: This is SMP unsafe!!! … … 157 151 } 158 152 159 #ifdef MACHINE_msim160 153 static irq_ownership_t dorder_claim(irq_t *irq) 161 154 { … … 167 160 dorder_ipi_ack(1 << dorder_cpuid()); 168 161 } 169 #endif170 162 171 163 /* Initialize basic tables for exception dispatching */ … … 184 176 cp0_unmask_int(TIMER_IRQ); 185 177 186 #ifdef MACHINE_msim187 178 irq_initialize(&dorder_irq); 188 179 dorder_irq.devno = device_assign_devno(); … … 193 184 194 185 cp0_unmask_int(DORDER_IRQ); 195 #endif196 186 } 197 187 -
kernel/arch/mips32/src/mips32.c
rc6a7b3a rcc3c27ad 41 41 #include <memstr.h> 42 42 #include <userspace.h> 43 #include <console/console.h> 43 44 #include <syscall/syscall.h> 44 45 #include <sysinfo/sysinfo.h> 45 46 #include <arch/debug.h> 46 47 #include <arch/debugger.h> 47 #include <arch/machine_func.h> 48 #include <arch/drivers/msim.h> 49 #include <genarch/fb/fb.h> 50 #include <genarch/drivers/dsrln/dsrlnin.h> 51 #include <genarch/drivers/dsrln/dsrlnout.h> 52 #include <genarch/srln/srln.h> 48 53 49 54 /* Size of the code jumping to the exception handler code … … 65 70 66 71 size_t cpu_count = 0; 67 68 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)69 size_t sdram_size = 0;70 #endif71 72 72 73 /** Performs mips32-specific initialization before main_bsp() is called. */ … … 87 88 cpu_count++; 88 89 } 89 90 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)91 sdram_size = bootinfo->sdram_size;92 #endif93 94 /* Initialize machine_ops pointer. */95 machine_ops_init();96 90 } 97 91 … … 130 124 { 131 125 interrupt_init(); 132 133 machine_init(); 134 machine_output_init(); 126 127 #ifdef CONFIG_FB 128 /* GXemul framebuffer */ 129 fb_properties_t gxemul_prop = { 130 .addr = 0x12000000, 131 .offset = 0, 132 .x = 640, 133 .y = 480, 134 .scan = 1920, 135 .visual = VISUAL_RGB_8_8_8, 136 }; 137 138 outdev_t *fbdev = fb_init(&gxemul_prop); 139 if (fbdev) 140 stdout_wire(fbdev); 141 #endif 142 143 #ifdef CONFIG_MIPS_PRN 144 outdev_t *dsrlndev = dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS); 145 if (dsrlndev) 146 stdout_wire(dsrlndev); 147 #endif 135 148 } 136 149 … … 145 158 void arch_post_smp_init(void) 146 159 { 160 static const char *platform; 161 147 162 /* Set platform name. */ 148 sysinfo_set_item_data("platform", NULL, 149 (void *) machine_get_platform_name(), 150 str_size(machine_get_platform_name())); 151 152 machine_input_init(); 163 #ifdef MACHINE_msim 164 platform = "msim"; 165 #endif 166 #ifdef MACHINE_bgxemul 167 platform = "gxemul"; 168 #endif 169 #ifdef MACHINE_lgxemul 170 platform = "gxemul"; 171 #endif 172 sysinfo_set_item_data("platform", NULL, (void *) platform, 173 str_size(platform)); 174 175 #ifdef CONFIG_MIPS_KBD 176 /* 177 * Initialize the msim/GXemul keyboard port. Then initialize the serial line 178 * module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts. 179 */ 180 dsrlnin_instance_t *dsrlnin_instance 181 = dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, MSIM_KBD_IRQ); 182 if (dsrlnin_instance) { 183 srln_instance_t *srln_instance = srln_init(); 184 if (srln_instance) { 185 indev_t *sink = stdin_wire(); 186 indev_t *srln = srln_wire(srln_instance, sink); 187 dsrlnin_wire(dsrlnin_instance, srln); 188 cp0_unmask_int(MSIM_KBD_IRQ); 189 } 190 } 191 192 /* 193 * This is the necessary evil until the userspace driver is entirely 194 * self-sufficient. 195 */ 196 sysinfo_set_item_val("kbd", NULL, true); 197 sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ); 198 sysinfo_set_item_val("kbd.address.physical", NULL, 199 PA2KA(MSIM_KBD_ADDRESS)); 200 #endif 153 201 } 154 202 -
kernel/arch/mips32/src/mm/frame.c
rc6a7b3a rcc3c27ad 40 40 #include <mm/asid.h> 41 41 #include <config.h> 42 #ifdef MACHINE_msim43 42 #include <arch/drivers/msim.h> 44 #endif45 #include <arch/arch.h>46 43 #include <print.h> 47 44 … … 87 84 return false; 88 85 #endif 89 90 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta) 91 if (frame >= (sdram_size >> ZERO_PAGE_WIDTH)) 86 87 #if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul) 88 /* gxemul devices */ 89 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, 90 0x10000000, MiB2SIZE(256))) 92 91 return false; 93 92 #endif … … 226 225 if (ZERO_PAGE_VALUE != 0xdeadbeef) 227 226 avail = false; 227 #if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul) 228 else { 229 ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd; 230 if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd) 231 avail = false; 232 } 233 #endif 228 234 } 229 235 } … … 241 247 /* Blacklist interrupt vector frame */ 242 248 frame_mark_unavailable(0, 1); 243 244 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)245 /* Blacklist memory regions used by YAMON.246 *247 * The YAMON User's Manual vaguely says the following physical addresses248 * are taken by YAMON:249 *250 * 0x1000 YAMON functions251 * 0x5000 YAMON code252 *253 * These addresses overlap with the beginning of the SDRAM so we need to254 * make sure they cannot be allocated.255 *256 * The User's Manual unfortunately does not say where does the SDRAM257 * portion used by YAMON end.258 *259 * Looking into the YAMON 02.21 sources, it looks like the first free260 * address is computed dynamically and depends on the size of the YAMON261 * image. From the YAMON binary, it appears to be 0xc0d50 or roughly262 * 772 KiB for that particular version.263 *264 * Linux is linked to 1MiB which seems to be a safe bet and a reasonable265 * upper bound for memory taken by YAMON. We will use it too.266 */267 frame_mark_unavailable(0, 1024 * 1024 / FRAME_SIZE);268 #endif269 249 270 250 /* Cleanup */ -
kernel/arch/mips32/src/mm/tlb.c
rc6a7b3a rcc3c27ad 48 48 #include <symtab.h> 49 49 50 #define PFN_SHIFT 12 51 #define VPN_SHIFT 12 52 #define ADDR2VPN(a) ((a) >> VPN_SHIFT) 53 #define ADDR2VPN2(a) (ADDR2VPN((a)) >> 1) 54 #define VPN2ADDR(vpn) ((vpn) << VPN_SHIFT) 55 #define VPN22ADDR(vpn2) (VPN2ADDR(vpn2) << 1) 56 #define PFN2ADDR(pfn) ((pfn) << PFN_SHIFT) 57 58 #define BANK_SELECT_BIT(a) (((a) >> PAGE_WIDTH) & 1) 59 50 static pte_t *find_mapping_and_check(uintptr_t, int, istate_t *); 60 51 61 52 /** Initialize TLB. … … 93 84 { 94 85 entry_lo_t lo; 86 entry_hi_t hi; 87 asid_t asid; 95 88 uintptr_t badvaddr; 96 89 pte_t *pte; 97 90 98 91 badvaddr = cp0_badvaddr_read(); 99 100 pte = page_mapping_find(AS, badvaddr, true); 101 if (pte && pte->p) { 92 asid = AS->asid; 93 94 pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate); 95 if (pte) { 102 96 /* 103 97 * Record access to PTE. … … 105 99 pte->a = 1; 106 100 101 tlb_prepare_entry_hi(&hi, asid, badvaddr); 107 102 tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, 108 103 pte->cacheable, pte->pfn); … … 111 106 * New entry is to be inserted into TLB 112 107 */ 113 if (BANK_SELECT_BIT(badvaddr) == 0) { 108 cp0_entry_hi_write(hi.value); 109 if ((badvaddr / PAGE_SIZE) % 2 == 0) { 114 110 cp0_entry_lo0_write(lo.value); 115 111 cp0_entry_lo1_write(0); … … 120 116 cp0_pagemask_write(TLB_PAGE_MASK_16K); 121 117 tlbwr(); 122 return; 123 } 124 125 (void) as_page_fault(badvaddr, PF_ACCESS_READ, istate); 118 } 126 119 } 127 120 … … 132 125 void tlb_invalid(istate_t *istate) 133 126 { 134 entry_lo_t lo;135 127 tlb_index_t index; 136 128 uintptr_t badvaddr; 129 entry_lo_t lo; 130 entry_hi_t hi; 137 131 pte_t *pte; 132 133 badvaddr = cp0_badvaddr_read(); 138 134 139 135 /* 140 136 * Locate the faulting entry in TLB. 141 137 */ 138 hi.value = cp0_entry_hi_read(); 139 tlb_prepare_entry_hi(&hi, hi.asid, badvaddr); 140 cp0_entry_hi_write(hi.value); 142 141 tlbp(); 143 142 index.value = cp0_index_read(); 144 143 145 #if defined(PROCESSOR_4Kc)146 /*147 * This can happen on a 4Kc when Status.EXL is 1 and there is a TLB miss.148 * EXL is 1 when interrupts are disabled. The combination of a TLB miss149 * and disabled interrupts is possible in copy_to/from_uspace().150 */151 if (index.p) {152 tlb_refill(istate);153 return;154 }155 #endif156 157 144 ASSERT(!index.p); 158 145 159 badvaddr = cp0_badvaddr_read(); 160 161 pte = page_mapping_find(AS, badvaddr, true); 162 if (pte && pte->p) { 146 pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate); 147 if (pte) { 163 148 /* 164 149 * Read the faulting TLB entry. … … 177 162 * The entry is to be updated in TLB. 178 163 */ 179 if ( BANK_SELECT_BIT(badvaddr)== 0)164 if ((badvaddr / PAGE_SIZE) % 2 == 0) 180 165 cp0_entry_lo0_write(lo.value); 181 166 else 182 167 cp0_entry_lo1_write(lo.value); 168 cp0_pagemask_write(TLB_PAGE_MASK_16K); 183 169 tlbwi(); 184 return; 185 } 186 187 (void) as_page_fault(badvaddr, PF_ACCESS_READ, istate); 170 } 188 171 } 189 172 … … 194 177 void tlb_modified(istate_t *istate) 195 178 { 196 entry_lo_t lo;197 179 tlb_index_t index; 198 180 uintptr_t badvaddr; 181 entry_lo_t lo; 182 entry_hi_t hi; 199 183 pte_t *pte; 200 184 … … 204 188 * Locate the faulting entry in TLB. 205 189 */ 190 hi.value = cp0_entry_hi_read(); 191 tlb_prepare_entry_hi(&hi, hi.asid, badvaddr); 192 cp0_entry_hi_write(hi.value); 206 193 tlbp(); 207 194 index.value = cp0_index_read(); 208 195 209 196 /* 210 * Emit warning if the entry is not in TLB. 211 * 212 * We do not assert on this because this could be a manifestation of 213 * an emulator bug, such as QEMU Bug #1128935: 214 * https://bugs.launchpad.net/qemu/+bug/1128935 197 * Fail if the entry is not in TLB. 215 198 */ 216 if (index.p) { 217 printf("%s: TLBP failed in exception handler (badvaddr=%#" 218 PRIxn ", ASID=%d).\n", __func__, badvaddr, 219 AS ? AS->asid : -1); 220 return; 221 } 222 223 pte = page_mapping_find(AS, badvaddr, true); 224 if (pte && pte->p && pte->w) { 199 ASSERT(!index.p); 200 201 pte = find_mapping_and_check(badvaddr, PF_ACCESS_WRITE, istate); 202 if (pte) { 225 203 /* 226 204 * Read the faulting TLB entry. … … 240 218 * The entry is to be updated in TLB. 241 219 */ 242 if ( BANK_SELECT_BIT(badvaddr)== 0)220 if ((badvaddr / PAGE_SIZE) % 2 == 0) 243 221 cp0_entry_lo0_write(lo.value); 244 222 else 245 223 cp0_entry_lo1_write(lo.value); 224 cp0_pagemask_write(TLB_PAGE_MASK_16K); 246 225 tlbwi(); 247 return; 248 } 249 250 (void) as_page_fault(badvaddr, PF_ACCESS_WRITE, istate); 226 } 227 } 228 229 /** Try to find PTE for faulting address. 230 * 231 * @param badvaddr Faulting virtual address. 232 * @param access Access mode that caused the fault. 233 * @param istate Pointer to interrupted state. 234 * 235 * @return PTE on success, NULL otherwise. 236 */ 237 pte_t *find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate) 238 { 239 entry_hi_t hi; 240 pte_t *pte; 241 242 hi.value = cp0_entry_hi_read(); 243 244 ASSERT(hi.asid == AS->asid); 245 246 /* 247 * Check if the mapping exists in page tables. 248 */ 249 pte = page_mapping_find(AS, badvaddr, true); 250 if (pte && pte->p && (pte->w || access != PF_ACCESS_WRITE)) { 251 /* 252 * Mapping found in page tables. 253 * Immediately succeed. 254 */ 255 return pte; 256 } 257 258 /* 259 * Mapping not found in page tables. 260 * Resort to higher-level page fault handler. 261 */ 262 if (as_page_fault(badvaddr, access, istate) == AS_PF_OK) { 263 pte = page_mapping_find(AS, badvaddr, true); 264 ASSERT(pte && pte->p); 265 ASSERT(pte->w || access != PF_ACCESS_WRITE); 266 return pte; 267 } 268 269 return NULL; 251 270 } 252 271 … … 265 284 void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr) 266 285 { 267 hi->value = 0; 268 hi->vpn2 = ADDR2VPN2(ALIGN_DOWN(addr, PAGE_SIZE)); 286 hi->value = ALIGN_DOWN(addr, PAGE_SIZE * 2); 269 287 hi->asid = asid; 270 288 } … … 273 291 void tlb_print(void) 274 292 { 275 page_mask_t mask , mask_save;276 entry_lo_t lo0, lo 0_save, lo1, lo1_save;293 page_mask_t mask; 294 entry_lo_t lo0, lo1; 277 295 entry_hi_t hi, hi_save; 278 296 unsigned int i; 279 297 280 298 hi_save.value = cp0_entry_hi_read(); 281 lo0_save.value = cp0_entry_lo0_read(); 282 lo1_save.value = cp0_entry_lo1_read(); 283 mask_save.value = cp0_pagemask_read(); 284 285 printf("[nr] [asid] [vpn2 ] [mask] [gvdc] [pfn ]\n"); 299 300 printf("[nr] [asid] [vpn2] [mask] [gvdc] [pfn ]\n"); 286 301 287 302 for (i = 0; i < TLB_ENTRY_COUNT; i++) { … … 294 309 lo1.value = cp0_entry_lo1_read(); 295 310 296 printf("%-4u %-6u % 0#10x %-#6x %1u%1u%1u%1u %0#10x\n",297 i, hi.asid, VPN22ADDR(hi.vpn2), mask.mask,298 lo0.g, lo0.v, lo0.d, lo0.c, PFN2ADDR(lo0.pfn));299 printf(" %1u%1u%1u%1u %0#10x\n",300 lo1.g, lo1.v, lo1.d, lo1.c, PFN2ADDR(lo1.pfn));311 printf("%-4u %-6u %#6x %#6x %1u%1u%1u%1u %#6x\n", 312 i, hi.asid, hi.vpn2, mask.mask, 313 lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn); 314 printf(" %1u%1u%1u%1u %#6x\n", 315 lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn); 301 316 } 302 317 303 318 cp0_entry_hi_write(hi_save.value); 304 cp0_entry_lo0_write(lo0_save.value);305 cp0_entry_lo1_write(lo1_save.value);306 cp0_pagemask_write(mask_save.value);307 319 } 308 320 … … 310 322 void tlb_invalidate_all(void) 311 323 { 324 ipl_t ipl; 312 325 entry_lo_t lo0, lo1; 313 326 entry_hi_t hi_save; 314 327 int i; 315 328 316 ASSERT(interrupts_disabled());317 318 329 hi_save.value = cp0_entry_hi_read(); 330 ipl = interrupts_disable(); 319 331 320 332 for (i = TLB_WIRED; i < TLB_ENTRY_COUNT; i++) { … … 334 346 } 335 347 348 interrupts_restore(ipl); 336 349 cp0_entry_hi_write(hi_save.value); 337 350 } … … 343 356 void tlb_invalidate_asid(asid_t asid) 344 357 { 358 ipl_t ipl; 345 359 entry_lo_t lo0, lo1; 346 360 entry_hi_t hi, hi_save; 347 361 int i; 348 362 349 ASSERT(interrupts_disabled());350 363 ASSERT(asid != ASID_INVALID); 351 364 352 365 hi_save.value = cp0_entry_hi_read(); 366 ipl = interrupts_disable(); 353 367 354 368 for (i = 0; i < TLB_ENTRY_COUNT; i++) { … … 372 386 } 373 387 388 interrupts_restore(ipl); 374 389 cp0_entry_hi_write(hi_save.value); 375 390 } … … 385 400 { 386 401 unsigned int i; 402 ipl_t ipl; 387 403 entry_lo_t lo0, lo1; 388 404 entry_hi_t hi, hi_save; 389 405 tlb_index_t index; 390 391 ASSERT(interrupts_disabled());392 406 393 407 if (asid == ASID_INVALID) … … 395 409 396 410 hi_save.value = cp0_entry_hi_read(); 411 ipl = interrupts_disable(); 397 412 398 413 for (i = 0; i < cnt + 1; i += 2) { 414 hi.value = 0; 399 415 tlb_prepare_entry_hi(&hi, asid, page + i * PAGE_SIZE); 400 416 cp0_entry_hi_write(hi.value); … … 423 439 } 424 440 441 interrupts_restore(ipl); 425 442 cp0_entry_hi_write(hi_save.value); 426 443 } -
kernel/arch/mips64/src/mips64.c
rc6a7b3a rcc3c27ad 46 46 #include <arch/debug.h> 47 47 #include <arch/debugger.h> 48 #ifdef MACHINE_msim49 48 #include <arch/drivers/msim.h> 50 #endif51 49 #include <genarch/fb/fb.h> 52 50 #include <genarch/drivers/dsrln/dsrlnin.h> … … 127 125 interrupt_init(); 128 126 129 #ifdef CONFIG_M SIM_PRN127 #ifdef CONFIG_MIPS_PRN 130 128 outdev_t *dsrlndev = dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS); 131 129 if (dsrlndev) … … 153 151 str_size(platform)); 154 152 155 #ifdef CONFIG_MSIM_KBD 156 /* 157 * Initialize the msim keyboard port. Then initialize the serial line 158 * module and connect it to the msim keyboard. Enable keyboard 159 * interrupts. 153 #ifdef CONFIG_MIPS_KBD 154 /* 155 * Initialize the msim/GXemul keyboard port. Then initialize the serial line 156 * module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts. 160 157 */ 161 158 dsrlnin_instance_t *dsrlnin_instance -
kernel/arch/mips64/src/mm/frame.c
rc6a7b3a rcc3c27ad 40 40 #include <mm/asid.h> 41 41 #include <config.h> 42 #ifdef MACHINE_msim43 42 #include <arch/drivers/msim.h> 44 #endif45 43 #include <print.h> 46 44 -
kernel/arch/sparc64/src/mm/sun4u/tlb.c
rc6a7b3a rcc3c27ad 196 196 void fast_instruction_access_mmu_miss(sysarg_t unused, istate_t *istate) 197 197 { 198 uintptr_t page_16k = ALIGN_DOWN(istate->tpc, PAGE_SIZE); 198 199 size_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE; 199 200 pte_t *t; 200 201 201 t = page_mapping_find(AS, istate->tpc, true);202 t = page_mapping_find(AS, page_16k, true); 202 203 if (t && PTE_EXECUTABLE(t)) { 203 204 /* … … 215 216 * handler. 216 217 */ 217 as_page_fault( istate->tpc, PF_ACCESS_EXEC, istate);218 as_page_fault(page_16k, PF_ACCESS_EXEC, istate); 218 219 } 219 220 } -
kernel/generic/include/mm/tlb.h
rc6a7b3a rcc3c27ad 73 73 extern void tlb_shootdown_ipi_recv(void); 74 74 #else 75 #define tlb_shootdown_start(w, x, y, z) interrupts_disable()76 #define tlb_shootdown_finalize(i) ( interrupts_restore(i));75 #define tlb_shootdown_start(w, x, y, z) (0) 76 #define tlb_shootdown_finalize(i) ((i) = (i)); 77 77 #define tlb_shootdown_ipi_recv() 78 78 #endif /* CONFIG_SMP */ -
kernel/generic/src/mm/as.c
rc6a7b3a rcc3c27ad 544 544 mem_backend_data_t *backend_data, uintptr_t *base, uintptr_t bound) 545 545 { 546 if ((*base != (uintptr_t) -1) && !IS_ALIGNED(*base, PAGE_SIZE))546 if ((*base != (uintptr_t) -1) && ((*base % PAGE_SIZE) != 0)) 547 547 return NULL; 548 548 … … 688 688 int as_area_resize(as_t *as, uintptr_t address, size_t size, unsigned int flags) 689 689 { 690 if (!IS_ALIGNED(address, PAGE_SIZE))691 return EINVAL;692 693 690 mutex_lock(&as->lock); 694 691 … … 1353 1350 * Interrupts are assumed disabled. 1354 1351 * 1355 * @param address Faulting address.1356 * @param access Access mode that caused the page fault (i.e.1357 * read/write/exec).1358 * @param istate Pointer to the interrupted state.1352 * @param page Faulting page. 1353 * @param access Access mode that caused the page fault (i.e. 1354 * read/write/exec). 1355 * @param istate Pointer to the interrupted state. 1359 1356 * 1360 1357 * @return AS_PF_FAULT on page fault. … … 1364 1361 * 1365 1362 */ 1366 int as_page_fault(uintptr_t address, pf_access_t access, istate_t *istate) 1367 { 1368 uintptr_t page = ALIGN_DOWN(address, PAGE_SIZE); 1363 int as_page_fault(uintptr_t page, pf_access_t access, istate_t *istate) 1364 { 1369 1365 int rc = AS_PF_FAULT; 1370 1366 … … 1456 1452 task_kill_self(true); 1457 1453 } else { 1458 fault_if_from_uspace(istate, "Page fault: %p.", (void *) address);1459 panic_memtrap(istate, access, address, NULL);1454 fault_if_from_uspace(istate, "Page fault: %p.", (void *) page); 1455 panic_memtrap(istate, access, page, NULL); 1460 1456 } 1461 1457 … … 1683 1679 { 1684 1680 ASSERT(mutex_locked(&area->lock)); 1685 ASSERT( IS_ALIGNED(page, PAGE_SIZE));1681 ASSERT(page == ALIGN_DOWN(page, PAGE_SIZE)); 1686 1682 ASSERT(count); 1687 1683 … … 1967 1963 { 1968 1964 ASSERT(mutex_locked(&area->lock)); 1969 ASSERT( IS_ALIGNED(page, PAGE_SIZE));1965 ASSERT(page == ALIGN_DOWN(page, PAGE_SIZE)); 1970 1966 ASSERT(count); 1971 1967 -
kernel/generic/src/mm/backend_anon.c
rc6a7b3a rcc3c27ad 173 173 * 174 174 * @param area Pointer to the address space area. 175 * @param upage Faulting virtual page.175 * @param addr Faulting virtual address. 176 176 * @param access Access mode that caused the fault (i.e. read/write/exec). 177 177 * … … 179 179 * serviced). 180 180 */ 181 int anon_page_fault(as_area_t *area, uintptr_t upage, pf_access_t access) 182 { 181 int anon_page_fault(as_area_t *area, uintptr_t addr, pf_access_t access) 182 { 183 uintptr_t upage = ALIGN_DOWN(addr, PAGE_SIZE); 183 184 uintptr_t kpage; 184 185 uintptr_t frame; … … 186 187 ASSERT(page_table_locked(AS)); 187 188 ASSERT(mutex_locked(&area->lock)); 188 ASSERT(IS_ALIGNED(upage, PAGE_SIZE));189 189 190 190 if (!as_area_check_access(area, access)) -
kernel/generic/src/mm/backend_elf.c
rc6a7b3a rcc3c27ad 235 235 * 236 236 * @param area Pointer to the address space area. 237 * @param upage Faulting virtual page.237 * @param addr Faulting virtual address. 238 238 * @param access Access mode that caused the fault (i.e. 239 239 * read/write/exec). … … 242 242 * on success (i.e. serviced). 243 243 */ 244 int elf_page_fault(as_area_t *area, uintptr_t upage, pf_access_t access)244 int elf_page_fault(as_area_t *area, uintptr_t addr, pf_access_t access) 245 245 { 246 246 elf_header_t *elf = area->backend_data.elf; … … 250 250 uintptr_t frame; 251 251 uintptr_t kpage; 252 uintptr_t upage; 252 253 uintptr_t start_anon; 253 254 size_t i; … … 256 257 ASSERT(page_table_locked(AS)); 257 258 ASSERT(mutex_locked(&area->lock)); 258 ASSERT(IS_ALIGNED(upage, PAGE_SIZE));259 259 260 260 if (!as_area_check_access(area, access)) 261 261 return AS_PF_FAULT; 262 262 263 if ( upage< ALIGN_DOWN(entry->p_vaddr, PAGE_SIZE))263 if (addr < ALIGN_DOWN(entry->p_vaddr, PAGE_SIZE)) 264 264 return AS_PF_FAULT; 265 265 266 if ( upage>= entry->p_vaddr + entry->p_memsz)266 if (addr >= entry->p_vaddr + entry->p_memsz) 267 267 return AS_PF_FAULT; 268 268 269 i = ( upage- ALIGN_DOWN(entry->p_vaddr, PAGE_SIZE)) >> PAGE_WIDTH;269 i = (addr - ALIGN_DOWN(entry->p_vaddr, PAGE_SIZE)) >> PAGE_WIDTH; 270 270 base = (uintptr_t) 271 271 (((void *) elf) + ALIGN_DOWN(entry->p_offset, PAGE_SIZE)); 272 273 /* Virtual address of faulting page */ 274 upage = ALIGN_DOWN(addr, PAGE_SIZE); 272 275 273 276 /* Virtual address of the end of initialized part of segment */ -
kernel/generic/src/mm/backend_phys.c
rc6a7b3a rcc3c27ad 111 111 * 112 112 * @param area Pointer to the address space area. 113 * @param upage Faulting virtual page.113 * @param addr Faulting virtual address. 114 114 * @param access Access mode that caused the fault (i.e. read/write/exec). 115 115 * … … 117 117 * serviced). 118 118 */ 119 int phys_page_fault(as_area_t *area, uintptr_t upage, pf_access_t access)119 int phys_page_fault(as_area_t *area, uintptr_t addr, pf_access_t access) 120 120 { 121 121 uintptr_t base = area->backend_data.base; … … 123 123 ASSERT(page_table_locked(AS)); 124 124 ASSERT(mutex_locked(&area->lock)); 125 ASSERT(IS_ALIGNED(upage, PAGE_SIZE));126 125 127 126 if (!as_area_check_access(area, access)) 128 127 return AS_PF_FAULT; 129 128 130 ASSERT( upage- area->base < area->backend_data.frames * FRAME_SIZE);131 page_mapping_insert(AS, upage, base + (upage- area->base),129 ASSERT(addr - area->base < area->backend_data.frames * FRAME_SIZE); 130 page_mapping_insert(AS, addr, base + (addr - area->base), 132 131 as_area_get_flags(area)); 133 132 134 if (!used_space_insert(area, upage, 1))133 if (!used_space_insert(area, ALIGN_DOWN(addr, PAGE_SIZE), 1)) 135 134 panic("Cannot insert used space."); 136 135 -
kernel/generic/src/mm/page.c
rc6a7b3a rcc3c27ad 104 104 ASSERT(page_mapping_operations->mapping_insert); 105 105 106 page_mapping_operations->mapping_insert(as, ALIGN_DOWN(page, PAGE_SIZE), 107 ALIGN_DOWN(frame, FRAME_SIZE), flags); 106 page_mapping_operations->mapping_insert(as, page, frame, flags); 108 107 109 108 /* Repel prefetched accesses to the old mapping. */ … … 128 127 ASSERT(page_mapping_operations->mapping_remove); 129 128 130 page_mapping_operations->mapping_remove(as, 131 ALIGN_DOWN(page, PAGE_SIZE)); 129 page_mapping_operations->mapping_remove(as, page); 132 130 133 131 /* Repel prefetched accesses to the old mapping. */ … … 152 150 ASSERT(page_mapping_operations->mapping_find); 153 151 154 return page_mapping_operations->mapping_find(as, 155 ALIGN_DOWN(page, PAGE_SIZE), nolock); 152 return page_mapping_operations->mapping_find(as, page, nolock); 156 153 } 157 154 -
kernel/generic/src/sysinfo/sysinfo.c
rc6a7b3a rcc3c27ad 753 753 sysinfo_return_t ret; 754 754 ret.tag = SYSINFO_VAL_UNDEFINED; 755 ret.data.data = NULL;756 ret.data.size = 0;757 755 758 756 if (size > SYSINFO_MAX_PATH) -
release/Makefile
rc6a7b3a rcc3c27ad 33 33 34 34 PROFILES = amd64 arm32/integratorcp arm32/gta02 arm32/beagleboardxm ia32 \ 35 ia64/i460GX ia64/ski mips32/msim ppc32 sparc64/ultra 35 ia64/i460GX ia64/ski mips32/GXemul mips32/msim ppc32 \ 36 sparc64/ultra 36 37 37 38 BZR = bzr -
tools/autotool.py
rc6a7b3a rcc3c27ad 676 676 common['CC_ARGS'].append("-mabi=32") 677 677 678 if ((config['MACHINE'] == " msim") or (config['MACHINE'] == "lmalta")):678 if ((config['MACHINE'] == "lgxemul") or (config['MACHINE'] == "msim")): 679 679 target = config['PLATFORM'] 680 680 gnu_target = "mipsel-linux-gnu" 681 681 682 if ( (config['MACHINE'] == "bmalta")):682 if (config['MACHINE'] == "bgxemul"): 683 683 target = "mips32eb" 684 684 gnu_target = "mips-linux-gnu" -
tools/toolchain.sh
rc6a7b3a rcc3c27ad 55 55 BINUTILS_VERSION="2.23.1" 56 56 BINUTILS_RELEASE="" 57 GCC_VERSION="4. 8.0"58 GDB_VERSION="7.5 .1"57 GCC_VERSION="4.7.2" 58 GDB_VERSION="7.5" 59 59 60 60 BASEDIR="`pwd`" … … 275 275 276 276 download_fetch "${BINUTILS_SOURCE}" "${BINUTILS}" "33adb18c3048d057ac58d07a3f1adb38" 277 download_fetch "${GCC_SOURCE}" "${GCC}" " e6040024eb9e761c3bea348d1fa5abb0"278 download_fetch "${GDB_SOURCE}" "${GDB}" " 3f48f468b24447cf24820054ff6e85b1"277 download_fetch "${GCC_SOURCE}" "${GCC}" "cc308a0891e778cfda7a151ab8a6e762" 278 download_fetch "${GDB_SOURCE}" "${GDB}" "24a6779a9fe0260667710de1b082ef61" 279 279 } 280 280 -
uspace/Makefile
rc6a7b3a rcc3c27ad 97 97 srv/bd/sata_bd \ 98 98 srv/bd/file_bd \ 99 srv/bd/gxe_bd \ 99 100 srv/bd/rd \ 100 101 srv/bd/part/guid_part \ -
uspace/app/init/init.c
rc6a7b3a rcc3c27ad 369 369 #ifdef CONFIG_START_BD 370 370 srv_start("/srv/ata_bd"); 371 srv_start("/srv/gxe_bd"); 371 372 #endif 372 373 -
uspace/lib/c/arch/mips32/Makefile.common
rc6a7b3a rcc3c27ad 27 27 # 28 28 29 GCC_CFLAGS += -msoft-float -m abi=3229 GCC_CFLAGS += -msoft-float -mips3 -mabi=32 30 30 BASE_LIBS += $(LIBSOFTFLOAT_PREFIX)/libsoftfloat.a 31 31 … … 34 34 BFD_ARCH = mips 35 35 BFD_NAME = elf32-tradlittlemips 36 37 ifeq ($(MACHINE),msim)38 GCC_CFLAGS += -march=r400039 endif40 41 ifeq ($(MACHINE),lmalta)42 GCC_CFLAGS += -march=4kc43 endif44 -
uspace/lib/c/arch/mips32eb/Makefile.common
rc6a7b3a rcc3c27ad 27 27 # 28 28 29 GCC_CFLAGS += -msoft-float -m abi=3229 GCC_CFLAGS += -msoft-float -mips3 -mabi=32 30 30 BASE_LIBS += $(LIBSOFTFLOAT_PREFIX)/libsoftfloat.a 31 31 … … 34 34 BFD_ARCH = mips 35 35 BFD_NAME = elf32-tradbigmips 36 37 ifeq ($(MACHINE),bmalta)38 GCC_CFLAGS += -march=4kc39 endif40 -
uspace/srv/fs/exfat/exfat_fat.c
rc6a7b3a rcc3c27ad 401 401 { 402 402 service_id_t service_id = nodep->idx->service_id; 403 exfat_cluster_t lastc = 0;403 exfat_cluster_t lastc; 404 404 int rc; 405 405 -
uspace/srv/fs/fat/fat_fat.c
rc6a7b3a rcc3c27ad 128 128 { 129 129 fat_cluster_t firstc = nodep->firstc; 130 fat_cluster_t currc = 0;130 fat_cluster_t currc; 131 131 aoff64_t relbn = bn; 132 132 int rc; … … 194 194 uint32_t clusters; 195 195 uint32_t max_clusters; 196 fat_cluster_t c = 0;196 fat_cluster_t c; 197 197 int rc; 198 198 … … 679 679 fat_cluster_t *lifo; /* stack for storing free cluster numbers */ 680 680 unsigned found = 0; /* top of the free cluster number stack */ 681 fat_cluster_t clst; 682 fat_cluster_t value = 0; 683 fat_cluster_t clst_last1 = FAT_CLST_LAST1(bs); 681 fat_cluster_t clst, value, clst_last1 = FAT_CLST_LAST1(bs); 684 682 int rc = EOK; 685 683 … … 785 783 { 786 784 service_id_t service_id = nodep->idx->service_id; 787 fat_cluster_t lastc = 0;785 fat_cluster_t lastc; 788 786 uint8_t fatno; 789 787 int rc; … … 909 907 int fat_sanity_check(fat_bs_t *bs, service_id_t service_id) 910 908 { 911 fat_cluster_t e0 = 0; 912 fat_cluster_t e1 = 0; 909 fat_cluster_t e0, e1; 913 910 unsigned fat_no; 914 911 int rc; -
uspace/srv/fs/mfs/mfs_ops.c
rc6a7b3a rcc3c27ad 773 773 { 774 774 int rc; 775 fs_node_t *fn = NULL;775 fs_node_t *fn; 776 776 777 777 rc = mfs_node_get(&fn, service_id, index); … … 1108 1108 mfs_sync(service_id_t service_id, fs_index_t index) 1109 1109 { 1110 fs_node_t *fn = NULL;1110 fs_node_t *fn; 1111 1111 int rc = mfs_node_get(&fn, service_id, index); 1112 1112 if (rc != EOK) -
uspace/srv/hid/input/Makefile
rc6a7b3a rcc3c27ad 39 39 port/adb_mouse.c \ 40 40 port/chardev.c \ 41 port/gxemul.c \ 41 42 port/msim.c \ 42 43 port/niagara.c \ … … 47 48 proto/mousedev.c \ 48 49 ctl/apple.c \ 50 ctl/gxe_fb.c \ 49 51 ctl/kbdev.c \ 50 52 ctl/pc.c \ -
uspace/srv/hid/input/input.c
rc6a7b3a rcc3c27ad 440 440 kbd_add_dev(&msim_port, &stty_ctl); 441 441 #endif 442 #if (defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)) && defined(CONFIG_FB) 443 kbd_add_dev(&gxemul_port, &gxe_fb_ctl); 444 #endif 445 #if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul) && !defined(CONFIG_FB) 446 kbd_add_dev(&gxemul_port, &stty_ctl); 447 #endif 442 448 #if defined(UARCH_ppc32) 443 449 kbd_add_dev(&adb_port, &apple_ctl); -
uspace/srv/hid/input/kbd_ctl.h
rc6a7b3a rcc3c27ad 49 49 50 50 extern kbd_ctl_ops_t apple_ctl; 51 extern kbd_ctl_ops_t gxe_fb_ctl; 51 52 extern kbd_ctl_ops_t kbdev_ctl; 52 53 extern kbd_ctl_ops_t pc_ctl; -
uspace/srv/hid/input/kbd_port.h
rc6a7b3a rcc3c27ad 51 51 extern kbd_port_ops_t adb_port; 52 52 extern kbd_port_ops_t chardev_port; 53 extern kbd_port_ops_t gxemul_port; 53 54 extern kbd_port_ops_t msim_port; 54 55 extern kbd_port_ops_t niagara_port;
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