Changes in / [c6a7b3a:cc3c27ad] in mainline


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Files:
6 added
8 deleted
49 edited

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  • HelenOS.config

    rc6a7b3a rcc3c27ad  
    4444% Machine type
    4545@ "msim" MSIM
    46 @ "bmalta" MIPS Malta Development Board big endian
    47 @ "lmalta" MIPS Malta Development Board little endian
     46@ "bgxemul" GXEmul big endian
     47@ "lgxemul" GXEmul little endian
    4848! [PLATFORM=mips32] MACHINE (choice)
    4949
     
    115115! [PLATFORM=arm32&(PROCESSOR=cortex_a8)] PROCESSOR_ARCH (choice)
    116116
    117 % CPU type
    118 @ "R4000" MIPS R4000
    119 ! [PLATFORM=mips32&MACHINE=msim] PROCESSOR (choice)
    120 
    121 % CPU type
    122 @ "4Kc" MIPS 4Kc
    123 ! [PLATFORM=mips32&(MACHINE=bmalta|MACHINE=lmalta)] PROCESSOR (choice)
    124 
    125117% RAM disk format
    126118@ "tmpfs" TMPFS image
     
    201193% User space architecture
    202194@ "mips32"
    203 ! [PLATFORM=mips32&(MACHINE=msim|MACHINE=lmalta)] UARCH (choice)
     195! [PLATFORM=mips32&(MACHINE=msim|MACHINE=lgxemul)] UARCH (choice)
    204196
    205197% User space architecture
    206198@ "mips32eb"
    207 ! [PLATFORM=mips32&MACHINE=bmalta] UARCH (choice)
     199! [PLATFORM=mips32&MACHINE=bgxemul] UARCH (choice)
    208200
    209201% User space architecture
     
    278270
    279271% Image format
    280 @ "elf"
    281 ! [PLATFORM=mips32&(MACHINE=bmalta|MACHINE=lmalta)] IMAGE (choice)
     272@ "ecoff"
     273! [PLATFORM=mips32&(MACHINE=bgxemul|MACHINE=lgxemul)] IMAGE (choice)
    282274
    283275% Image format
     
    368360! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=ia64|PLATFORM=sparc64] CONFIG_FPU (y)
    369361
     362% FPU support
     363! [PLATFORM=mips32&(MACHINE=lgxemul|MACHINE=bgxemul)] CONFIG_FPU (y)
     364
    370365## armv7 made fpu hardware compulsory
    371366% FPU support
     
    452447@ "generic" Monitor or serial line
    453448@ "none" No output device
    454 ! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ppc32|(PLATFORM=ia64&MACHINE=i460GX)|(PLATFORM=mips32&(MACHINE=msim|MACHINE=bmalta|MACHINE=lmalta))|(PLATFORM=mips64&MACHINE=msim)] CONFIG_HID_OUT (choice)
     449! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ppc32|(PLATFORM=ia64&MACHINE=i460GX)|(PLATFORM=mips32&MACHINE=msim)|(PLATFORM=mips64&MACHINE=msim)] CONFIG_HID_OUT (choice)
     450
     451% Output device class
     452@ "generic" Monitor or serial line
     453@ "monitor" Monitor
     454@ "serial" Serial line
     455@ "none" No output device
     456! [PLATFORM=mips32&(MACHINE=bgxemul|MACHINE=lgxemul)] CONFIG_HID_OUT (choice)
    455457
    456458% PC keyboard support
     
    463465! [(CONFIG_HID_IN=generic|CONFIG_HID_IN=keyboard)&PLATFORM=arm32&MACHINE=integratorcp] CONFIG_PC_KBD (y/n)
    464466
    465 % Support for msim keyboard
    466 ! [CONFIG_HID_IN=generic&MACHINE=msim] CONFIG_MSIM_KBD (y/n)
    467 
    468 % Support for msim printer
    469 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&MACHINE=msim] CONFIG_MSIM_PRN (y/n)
     467% Support for msim/GXemul keyboard
     468! [CONFIG_HID_IN=generic&(PLATFORM=mips32|PLATFORM=mips64)] CONFIG_MIPS_KBD (y/n)
     469
     470% Support for msim/GXemul printer
     471! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&(PLATFORM=mips32|PLATFORM=mips64)] CONFIG_MIPS_PRN (y/n)
    470472
    471473% Support for VIA CUDA controller
     
    509511
    510512% Dummy serial line input
    511 ! [CONFIG_MSIM_KBD=y|CONFIG_ARM_KBD=y] CONFIG_DSRLNIN (y)
     513! [CONFIG_MIPS_KBD=y|CONFIG_ARM_KBD=y] CONFIG_DSRLNIN (y)
    512514
    513515% Dummy serial line output
    514 ! [CONFIG_MSIM_PRN=y|CONFIG_ARM_PRN=y] CONFIG_DSRLNOUT (y)
     516! [CONFIG_MIPS_PRN=y|CONFIG_ARM_PRN=y] CONFIG_DSRLNOUT (y)
    515517
    516518% Serial line input module
     
    525527% Framebuffer support
    526528! [CONFIG_HID_OUT=generic&(PLATFORM=ia32|PLATFORM=amd64|PLATFORM=ppc32)] CONFIG_FB (y/n)
     529
     530% Framebuffer support
     531! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=monitor)&PLATFORM=mips32&(MACHINE=lgxemul|MACHINE=bgxemul)] CONFIG_FB (y/n)
    527532
    528533% Framebuffer support
  • boot/arch/mips32/Makefile.inc

    rc6a7b3a rcc3c27ad  
    2929BFD_ARCH = mips
    3030BITS = 32
    31 EXTRA_CFLAGS = -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mabi=32
     31EXTRA_CFLAGS = -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=32
    3232
     33RD_SRVS_NON_ESSENTIAL += \
     34        $(USPACE_PATH)/srv/bd/gxe_bd/gxe_bd
     35
     36ifeq ($(MACHINE),lgxemul)
     37        BFD_NAME = elf32-tradlittlemips
     38        BFD_OUTPUT = ecoff-littlemips
     39        ENDIANESS = LE
     40endif
     41ifeq ($(MACHINE),bgxemul)
     42        BFD_NAME = elf32-tradbigmips
     43        BFD_OUTPUT = ecoff-bigmips
     44        ENDIANESS = BE
     45endif
    3346ifeq ($(MACHINE),msim)
    3447        BFD_NAME = elf32-tradlittlemips
    3548        BFD_OUTPUT = binary
    3649        ENDIANESS = LE
    37         EXTRA_CFLAGS += -march=r4000
    3850endif
    39 ifeq ($(MACHINE),lmalta)
    40         BFD_NAME = elf32-tradlittlemips
    41         BFD_OUTPUT = elf32-tradlittlemips
    42         ENDIANESS = LE
    43         EXTRA_CFLAGS += -march=4kc
    44 endif
    45 ifeq ($(MACHINE),bmalta)
    46         BFD_NAME = elf32-tradbigmips
    47         BFD_OUTPUT = elf32-tradbigmips
    48         ENDIANESS = BE
    49         EXTRA_CFLAGS += -march=4kc
    50 endif
    51 
    5251
    5352SOURCES = \
  • boot/arch/mips32/_link.ld.in

    rc6a7b3a rcc3c27ad  
    22
    33SECTIONS {
    4 #if defined(MACHINE_msim)
    54        . = 0xbfc00000;
    6 #elif defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
    7         . = 0x80103000;
    8 #endif
    95        .text : {
    106                *(BOOTSTRAP);
  • boot/arch/mips32/include/arch.h

    rc6a7b3a rcc3c27ad  
    3333#define PAGE_SIZE   (1 << PAGE_WIDTH)
    3434
    35 #if defined(MACHINE_msim)
    3635#define CPUMAP_OFFSET    0x00001000
    3736#define STACK_OFFSET     0x00002000
     
    4241#define MSIM_VIDEORAM_ADDRESS  0xb0000000
    4342#define MSIM_DORDER_ADDRESS    0xb0000100
    44 #endif
    45 
    46 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
    47 #define CPUMAP_OFFSET    0x00100000
    48 #define STACK_OFFSET     0x00101000
    49 #define BOOTINFO_OFFSET  0x00102000
    50 #define BOOT_OFFSET      0x00200000
    51 #define LOADER_OFFSET    0x00103000
    52 
    53 #define YAMON_SUBR_BASE         PA2KA(0x1fc00500)
    54 #define YAMON_SUBR_PRINT_COUNT  (YAMON_SUBR_BASE + 0x4)
    55 #endif
    5643
    5744#ifndef __ASM__
    5845        #define PA2KA(addr)    (((uintptr_t) (addr)) + 0x80000000)
    59         #define PA2KSEG(addr)  (((uintptr_t) (addr)) + 0xa0000000)
    60         #define KA2PA(addr)    (((uintptr_t) (addr)) - 0x80000000)
    6146        #define KSEG2PA(addr)  (((uintptr_t) (addr)) - 0xa0000000)
    6247#else
  • boot/arch/mips32/include/types.h

    rc6a7b3a rcc3c27ad  
    4747
    4848typedef struct {
    49 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
    50         uint32_t sdram_size;
    51 #endif
    5249        uint32_t cpumap;
    5350        size_t cnt;
  • boot/arch/mips32/src/asm.S

    rc6a7b3a rcc3c27ad  
    5151        and $a0, $a1, $a0
    5252        mtc0 $a0, $status
    53 
    54 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
    55         /*
    56          * Remember the size of the SDRAM in bootinfo.
    57          */
    58         la $a0, PA2KA(BOOTINFO_OFFSET)
    59         sw $a3, 0($a0)
    60 #endif
    6153       
    6254        /*
  • boot/arch/mips32/src/main.c

    rc6a7b3a rcc3c27ad  
    6565        for (i = 0; i < COMPONENTS; i++)
    6666                printf(" %p|%p: %s image (%zu/%zu bytes)\n", components[i].start,
    67                     (uintptr_t) components[i].start >= PA2KSEG(0) ?
    68                     (void *) KSEG2PA(components[i].start) :
    69                     (void *) KA2PA(components[i].start),
    70                     components[i].name, components[i].inflated,
    71                     components[i].size);
     67                    (void *) KSEG2PA(components[i].start), components[i].name,
     68                    components[i].inflated, components[i].size);
    7269       
    7370        void *dest[COMPONENTS];
     
    9693       
    9794        for (i = cnt; i > 0; i--) {
    98 #ifdef MACHINE_msim
    9995                void *tail = dest[i - 1] + components[i].inflated;
    10096                if (tail >= ((void *) PA2KA(LOADER_OFFSET))) {
     
    10399                        halt();
    104100                }
    105 #endif
    106101               
    107102                printf("%s ", components[i - 1].name);
  • boot/arch/mips32/src/putchar.c

    rc6a7b3a rcc3c27ad  
    3232#include <str.h>
    3333
    34 #ifdef PUTCHAR_ADDRESS
    35 #undef PUTCHAR_ADDRESS
    36 #endif
    37 
    38 #if defined(MACHINE_msim)
    39 #define _putchar(ch)    msim_putchar((ch))
    40 static void msim_putchar(const wchar_t ch)
    41 {
    42         *((char *) MSIM_VIDEORAM_ADDRESS) = ch;
    43 }
    44 #endif
    45 
    46 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
    47 #define _putchar(ch)    yamon_putchar((ch))
    48 typedef void (**yamon_print_count_ptr_t)(uint32_t, const char *, uint32_t);
    49 yamon_print_count_ptr_t yamon_print_count =
    50     (yamon_print_count_ptr_t) YAMON_SUBR_PRINT_COUNT;
    51 
    52 static void yamon_putchar(const wchar_t wch)
    53 {
    54         const char ch = (char) wch;
    55 
    56         (*yamon_print_count)(0, &ch, 1);
    57 }
    58 #endif
    59 
    6034void putchar(const wchar_t ch)
    6135{
    6236        if (ascii_check(ch))
    63                 _putchar(ch);
     37                *((char *) MSIM_VIDEORAM_ADDRESS) = ch;
    6438        else
    65                 _putchar(U_SPECIAL);
     39                *((char *) MSIM_VIDEORAM_ADDRESS) = U_SPECIAL;
    6640}
    67 
  • boot/generic/include/memstr.h

    rc6a7b3a rcc3c27ad  
    3636
    3737extern void *memcpy(void *, const void *, size_t);
    38 extern void *memset(void *, int, size_t);
    3938extern void *memmove(void *, const void *, size_t);
    4039
  • boot/generic/src/memstr.c

    rc6a7b3a rcc3c27ad  
    3030#include <typedefs.h>
    3131
    32 /** Move memory block without overlapping.
     32/** Copy block of memory.
    3333 *
    34  * Copy cnt bytes from src address to dst address. The source
    35  * and destination memory areas cannot overlap.
     34 * Copy cnt bytes from src address to dst address.The source and destination
     35 * memory areas cannot overlap.
    3636 *
    37  * @param dst Destination address to copy to.
    38  * @param src Source address to copy from.
    39  * @param cnt Number of bytes to copy.
     37 * @param src           Source address to copy from.
     38 * @param dst           Destination address to copy to.
     39 * @param cnt           Number of bytes to copy.
    4040 *
    41  * @return Destination address.
    42  *
     41 * @return              Destination address.
    4342 */
    4443void *memcpy(void *dst, const void *src, size_t cnt)
    4544{
    46         uint8_t *dp = (uint8_t *) dst;
    47         const uint8_t *sp = (uint8_t *) src;
    48        
    49         while (cnt-- != 0)
    50                 *dp++ = *sp++;
    51        
    52         return dst;
    53 }
     45        size_t i;
    5446
    55 /** Fill block of memory.
    56  *
    57  * Fill cnt bytes at dst address with the value val.
    58  *
    59  * @param dst Destination address to fill.
    60  * @param val Value to fill.
    61  * @param cnt Number of bytes to fill.
    62  *
    63  * @return Destination address.
    64  *
    65  */
    66 void *memset(void *dst, int val, size_t cnt)
    67 {
    68         uint8_t *dp = (uint8_t *) dst;
    69        
    70         while (cnt-- != 0)
    71                 *dp++ = val;
    72        
     47        for (i = 0; i < cnt; i++)
     48                ((uint8_t *) dst)[i] = ((uint8_t *) src)[i];
     49
    7350        return dst;
    7451}
  • contrib/conf/ia32-qe.sh

    rc6a7b3a rcc3c27ad  
    11#!/bin/sh
    2 
    3 if [ -z "${QEMU_BINARY}" ] ; then
    4         QEMU_BINARY="`which --tty-only qemu 2> /dev/null`"
    5 fi
    6 
    7 if [ -z "${QEMU_BINARY}" ] ; then
    8         QEMU_BINARY="`which --tty-only qemu-system-i386 2> /dev/null`"
    9 fi
    10 
    11 if [ -z "${QEMU_BINARY}" ] ; then
    12         echo "QEMU binary not found"
    13 fi
    142
    153DISK_IMG=hdisk.img
     
    208fi
    219
    22 "${QEMU_BINARY}" "$@" -m 32 -hda "$DISK_IMG" -cdrom image.iso -boot d
     10qemu $@ -m 32 -hda "$DISK_IMG" -cdrom image.iso -boot d
  • contrib/conf/net-qe.sh

    rc6a7b3a rcc3c27ad  
    11#!/bin/sh
    2 
    3 if [ -z "${QEMU_BINARY}" ] ; then
    4         QEMU_BINARY="`which --tty-only qemu 2> /dev/null`"
    5 fi
    6 
    7 if [ -z "${QEMU_BINARY}" ] ; then
    8         QEMU_BINARY="`which --tty-only qemu-system-x86_64 2> /dev/null`"
    9 fi
    10 
    11 if [ -z "${QEMU_BINARY}" ] ; then
    12         QEMU_BINARY="`which --tty-only qemu-system-i386 2> /dev/null`"
    13 fi
    14 
    15 if [ -z "${QEMU_BINARY}" ] ; then
    16         echo "QEMU binary not found"
    17 fi
    182
    193case "$1" in
    204        ne2k)
    215                shift
    22                 "${QEMU_BINARY}" "$@" -device ne2k_isa,irq=5,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso
     6                qemu $@ -device ne2k_isa,irq=5,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso
    237                ;;
    248        e1k)
    259                shift
    26                 "${QEMU_BINARY}" "$@" -device e1000,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso
     10                qemu $@ -device e1000,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso
    2711                ;;
    2812        rtl8139)
    2913                shift
    30                 "${QEMU_BINARY}" "$@" -device rtl8139,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso
     14                qemu $@ -device rtl8139,vlan=0 -net user -boot d -redir udp:8080::8080 -redir udp:8081::8081 -redir tcp:8080::8080 -redir tcp:8081::8081 -cdrom image.iso
    3115                ;;
    3216        *)
  • kernel/arch/amd64/src/mm/page.c

    rc6a7b3a rcc3c27ad  
    7878void page_fault(unsigned int n, istate_t *istate)
    7979{
    80         uintptr_t badvaddr = read_cr2();
     80        uintptr_t page = read_cr2();
    8181       
    8282        if (istate->error_word & PFERR_CODE_RSVD)
     
    9292                access = PF_ACCESS_READ;
    9393       
    94         (void) as_page_fault(badvaddr, access, istate);
     94        as_page_fault(page, access, istate);
    9595}
    9696
  • kernel/arch/arm32/src/fpu_context.c

    rc6a7b3a rcc3c27ad  
    119119 * rely on user decision to use CONFIG_FPU.
    120120 */
    121 #ifdef PROCESSOR_ARCH_armv7_a
     121#ifdef PROCESSOR_ARC_armv7_a
    122122        const uint32_t cpacr = CPACR_read();
    123123        /* FPU needs access to coprocessor 10 and 11.
    124          * Moreover they need to have same access enabled */
     124         * Moreover they need to have same access enabledd */
    125125        if (((cpacr & CPACR_CP_MASK(10)) != CPACR_CP_FULL_ACCESS(10)) &&
    126126           ((cpacr & CPACR_CP_MASK(11)) != CPACR_CP_FULL_ACCESS(11))) {
  • kernel/arch/ia32/src/mm/page.c

    rc6a7b3a rcc3c27ad  
    8484void page_fault(unsigned int n __attribute__((unused)), istate_t *istate)
    8585{
    86         uintptr_t badvaddr;
     86        uintptr_t page;
    8787        pf_access_t access;
    8888       
    89         badvaddr = read_cr2();
     89        page = read_cr2();
    9090               
    9191        if (istate->error_word & PFERR_CODE_RSVD)
     
    9797                access = PF_ACCESS_READ;
    9898       
    99         (void) as_page_fault(badvaddr, access, istate);
     99        if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
     100                fault_if_from_uspace(istate, "Page fault: %#x.", page);
     101                panic_memtrap(istate, access, page, NULL);
     102        }
    100103}
    101104
  • kernel/arch/mips32/Makefile.inc

    rc6a7b3a rcc3c27ad  
    2929BFD_ARCH = mips
    3030BFD = binary
    31 GCC_CFLAGS += -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mabi=32
     31GCC_CFLAGS += -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=32
    3232
    3333BITS = 32
     
    3636#
    3737
     38ifeq ($(MACHINE),lgxemul)
     39        BFD_NAME = elf32-tradlittlemips
     40        ENDIANESS = LE
     41endif
     42ifeq ($(MACHINE),bgxemul)
     43        BFD_NAME = elf32-tradbigmips
     44        ENDIANESS = BE
     45        GCC_CFLAGS += -D__BE__
     46endif
    3847ifeq ($(MACHINE),msim)
    3948        BFD_NAME = elf32-tradlittlemips
    4049        ENDIANESS = LE
    41         GCC_CFLAGS += -march=r4000
    42 endif
    43 ifeq ($(MACHINE),bmalta)
    44         BFD_NAME = elf32-tradbigmips
    45         ENDIANESS = BE
    46         GCC_CFLAGS += -D__BE__ -march=4kc
    47 endif
    48 ifeq ($(MACHINE),lmalta)
    49         BFD_NAME = elf32-tradlittlemips
    50         ENDIANESS = LE
    51         GCC_CFLAGS += -march=4kc
    5250endif
    5351
     
    7169        arch/$(KARCH)/src/fpu_context.c \
    7270        arch/$(KARCH)/src/ddi/ddi.c \
    73         arch/$(KARCH)/src/smp/smp.c \
    74         arch/$(KARCH)/src/machine_func.c
    75 
    76 ifeq ($(MACHINE),msim)
    77         ARCH_SOURCES += \
    78                 arch/$(KARCH)/src/smp/dorder.c
    79 endif
    80 
    81 ifeq ($(MACHINE),$(filter lmalta bmalta,$(MACHINE)))
    82         ARCH_SOURCES += arch/$(KARCH)/src/mach/malta/malta.c
    83 endif
    84 ifeq ($(MACHINE),msim)
    85         ARCH_SOURCES += arch/$(KARCH)/src/mach/msim/msim.c
    86 endif
    87 
     71        arch/$(KARCH)/src/smp/dorder.c \
     72        arch/$(KARCH)/src/smp/smp.c
  • kernel/arch/mips32/_link.ld.in

    rc6a7b3a rcc3c27ad  
    1010#define mips mips
    1111
    12 #if defined(MACHINE_msim)
    1312#define KERNEL_LOAD_ADDRESS 0x80100000
    14 #endif
    15 
    16 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
    17 #define KERNEL_LOAD_ADDRESS 0x80200000
    18 #endif
    1913
    2014OUTPUT_ARCH(mips)
  • kernel/arch/mips32/include/arch/arch.h

    rc6a7b3a rcc3c27ad  
    4444extern size_t cpu_count;
    4545
    46 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
    47 extern size_t sdram_size;
    48 #endif
    49 
    5046typedef struct {
    5147        void *addr;
     
    5551
    5652typedef struct {
    57 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
    58         uint32_t sdram_size;
    59 #endif
    6053        uint32_t cpumap;
    6154        size_t cnt;
  • kernel/arch/mips32/include/arch/cp0.h

    rc6a7b3a rcc3c27ad  
    4545#define cp0_status_im_shift  8
    4646#define cp0_status_im_mask   0xff00
    47 
    48 #define cp0_cause_ip_shift  8
    49 #define cp0_cause_ip_mask   0xff00
    5047
    5148#define cp0_cause_excno(cause)   ((cause >> 2) & 0x1f)
  • kernel/arch/mips32/include/arch/mm/tlb.h

    rc6a7b3a rcc3c27ad  
    4141#include <trace.h>
    4242
    43 #if defined(PROCESSOR_R4000)
    4443#define TLB_ENTRY_COUNT  48
    45 #define TLB_INDEX_BITS   6
    46 #elif defined(PROCESSOR_4Kc)
    47 #define TLB_ENTRY_COUNT  16
    48 #define TLB_INDEX_BITS   4
    49 #else
    50 #error Please define TLB_ENTRY_COUNT for the target processor.
    51 #endif
    5244
    53 #define TLB_WIRED               0
     45#define TLB_WIRED               1
     46#define TLB_KSTACK_WIRED_INDEX  0
    5447
    5548#define TLB_PAGE_MASK_4K    (0x000 << 13)
     
    119112#ifdef __BE__
    120113                unsigned p : 1;
    121                 unsigned : 32 - TLB_INDEX_BITS - 1;
    122                 unsigned index : TLB_INDEX_BITS;
     114                unsigned : 25;
     115                unsigned index : 6;
    123116#else
    124                 unsigned index : TLB_INDEX_BITS;
    125                 unsigned : 32 - TLB_INDEX_BITS - 1;
     117                unsigned index : 6;
     118                unsigned : 25;
    126119                unsigned p : 1;
    127120#endif
  • kernel/arch/mips32/src/exception.c

    rc6a7b3a rcc3c27ad  
    165165static void interrupt_exception(unsigned int n, istate_t *istate)
    166166{
    167         uint32_t ip;
    168         uint32_t im;
    169 
    170167        /* Decode interrupt number and process the interrupt */
    171         ip = (cp0_cause_read() & cp0_cause_ip_mask) >> cp0_cause_ip_shift;
    172         im = (cp0_status_read() & cp0_status_im_mask) >> cp0_status_im_shift;
     168        uint32_t cause = (cp0_cause_read() >> 8) & 0xff;
    173169       
    174170        unsigned int i;
    175171        for (i = 0; i < 8; i++) {
    176 
    177                 /*
    178                  * The interrupt could only occur if it is unmasked in the
    179                  * status register. On the other hand, an interrupt can be
    180                  * apparently pending even if it is masked, so we need to
    181                  * check both the masked and pending interrupts.
    182                  */
    183                 if (im & ip & (1 << i)) {
     172                if (cause & (1 << i)) {
    184173                        irq_t *irq = irq_dispatch_and_lock(i);
    185174                        if (irq) {
  • kernel/arch/mips32/src/interrupt.c

    rc6a7b3a rcc3c27ad  
    4545#define IRQ_COUNT   8
    4646#define TIMER_IRQ   7
    47 
    48 #ifdef MACHINE_msim
    4947#define DORDER_IRQ  5
    50 #endif
    5148
    5249function virtual_timer_fnc = NULL;
    5350static irq_t timer_irq;
    54 
    55 #ifdef MACHINE_msim
    5651static irq_t dorder_irq;
    57 #endif
    5852
    5953// TODO: This is SMP unsafe!!!
     
    157151}
    158152
    159 #ifdef MACHINE_msim
    160153static irq_ownership_t dorder_claim(irq_t *irq)
    161154{
     
    167160        dorder_ipi_ack(1 << dorder_cpuid());
    168161}
    169 #endif
    170162
    171163/* Initialize basic tables for exception dispatching */
     
    184176        cp0_unmask_int(TIMER_IRQ);
    185177       
    186 #ifdef MACHINE_msim
    187178        irq_initialize(&dorder_irq);
    188179        dorder_irq.devno = device_assign_devno();
     
    193184       
    194185        cp0_unmask_int(DORDER_IRQ);
    195 #endif
    196186}
    197187
  • kernel/arch/mips32/src/mips32.c

    rc6a7b3a rcc3c27ad  
    4141#include <memstr.h>
    4242#include <userspace.h>
     43#include <console/console.h>
    4344#include <syscall/syscall.h>
    4445#include <sysinfo/sysinfo.h>
    4546#include <arch/debug.h>
    4647#include <arch/debugger.h>
    47 #include <arch/machine_func.h>
     48#include <arch/drivers/msim.h>
     49#include <genarch/fb/fb.h>
     50#include <genarch/drivers/dsrln/dsrlnin.h>
     51#include <genarch/drivers/dsrln/dsrlnout.h>
     52#include <genarch/srln/srln.h>
    4853
    4954/* Size of the code jumping to the exception handler code
     
    6570
    6671size_t cpu_count = 0;
    67 
    68 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
    69 size_t sdram_size = 0;
    70 #endif
    7172
    7273/** Performs mips32-specific initialization before main_bsp() is called. */
     
    8788                        cpu_count++;
    8889        }
    89 
    90 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
    91         sdram_size = bootinfo->sdram_size;
    92 #endif
    93 
    94         /* Initialize machine_ops pointer. */
    95         machine_ops_init();
    9690}
    9791
     
    130124{
    131125        interrupt_init();
    132 
    133         machine_init();
    134         machine_output_init();
     126       
     127#ifdef CONFIG_FB
     128        /* GXemul framebuffer */
     129        fb_properties_t gxemul_prop = {
     130                .addr = 0x12000000,
     131                .offset = 0,
     132                .x = 640,
     133                .y = 480,
     134                .scan = 1920,
     135                .visual = VISUAL_RGB_8_8_8,
     136        };
     137       
     138        outdev_t *fbdev = fb_init(&gxemul_prop);
     139        if (fbdev)
     140                stdout_wire(fbdev);
     141#endif
     142
     143#ifdef CONFIG_MIPS_PRN
     144        outdev_t *dsrlndev = dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS);
     145        if (dsrlndev)
     146                stdout_wire(dsrlndev);
     147#endif
    135148}
    136149
     
    145158void arch_post_smp_init(void)
    146159{
     160        static const char *platform;
     161
    147162        /* Set platform name. */
    148         sysinfo_set_item_data("platform", NULL,
    149             (void *) machine_get_platform_name(),
    150             str_size(machine_get_platform_name()));
    151 
    152         machine_input_init();
     163#ifdef MACHINE_msim
     164        platform = "msim";
     165#endif
     166#ifdef MACHINE_bgxemul
     167        platform = "gxemul";
     168#endif
     169#ifdef MACHINE_lgxemul
     170        platform = "gxemul";
     171#endif
     172        sysinfo_set_item_data("platform", NULL, (void *) platform,
     173            str_size(platform));
     174
     175#ifdef CONFIG_MIPS_KBD
     176        /*
     177         * Initialize the msim/GXemul keyboard port. Then initialize the serial line
     178         * module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts.
     179         */
     180        dsrlnin_instance_t *dsrlnin_instance
     181            = dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, MSIM_KBD_IRQ);
     182        if (dsrlnin_instance) {
     183                srln_instance_t *srln_instance = srln_init();
     184                if (srln_instance) {
     185                        indev_t *sink = stdin_wire();
     186                        indev_t *srln = srln_wire(srln_instance, sink);
     187                        dsrlnin_wire(dsrlnin_instance, srln);
     188                        cp0_unmask_int(MSIM_KBD_IRQ);
     189                }
     190        }
     191       
     192        /*
     193         * This is the necessary evil until the userspace driver is entirely
     194         * self-sufficient.
     195         */
     196        sysinfo_set_item_val("kbd", NULL, true);
     197        sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ);
     198        sysinfo_set_item_val("kbd.address.physical", NULL,
     199            PA2KA(MSIM_KBD_ADDRESS));
     200#endif
    153201}
    154202
  • kernel/arch/mips32/src/mm/frame.c

    rc6a7b3a rcc3c27ad  
    4040#include <mm/asid.h>
    4141#include <config.h>
    42 #ifdef MACHINE_msim
    4342#include <arch/drivers/msim.h>
    44 #endif
    45 #include <arch/arch.h>
    4643#include <print.h>
    4744
     
    8784                return false;
    8885#endif
    89 
    90 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
    91         if (frame >= (sdram_size >> ZERO_PAGE_WIDTH))
     86       
     87#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
     88        /* gxemul devices */
     89        if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
     90            0x10000000, MiB2SIZE(256)))
    9291                return false;
    9392#endif
     
    226225                                        if (ZERO_PAGE_VALUE != 0xdeadbeef)
    227226                                                avail = false;
     227#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
     228                                        else {
     229                                                ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;
     230                                                if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)
     231                                                        avail = false;
     232                                        }
     233#endif
    228234                                }
    229235                        }
     
    241247        /* Blacklist interrupt vector frame */
    242248        frame_mark_unavailable(0, 1);
    243 
    244 #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
    245         /* Blacklist memory regions used by YAMON.
    246          *
    247          * The YAMON User's Manual vaguely says the following physical addresses
    248          * are taken by YAMON:
    249          *
    250          * 0x1000       YAMON functions
    251          * 0x5000       YAMON code
    252          *
    253          * These addresses overlap with the beginning of the SDRAM so we need to
    254          * make sure they cannot be allocated.
    255          *
    256          * The User's Manual unfortunately does not say where does the SDRAM
    257          * portion used by YAMON end.
    258          *
    259          * Looking into the YAMON 02.21 sources, it looks like the first free
    260          * address is computed dynamically and depends on the size of the YAMON
    261          * image. From the YAMON binary, it appears to be 0xc0d50 or roughly
    262          * 772 KiB for that particular version.
    263          *
    264          * Linux is linked to 1MiB which seems to be a safe bet and a reasonable
    265          * upper bound for memory taken by YAMON. We will use it too.
    266          */
    267         frame_mark_unavailable(0, 1024 * 1024 / FRAME_SIZE);
    268 #endif
    269249       
    270250        /* Cleanup */
  • kernel/arch/mips32/src/mm/tlb.c

    rc6a7b3a rcc3c27ad  
    4848#include <symtab.h>
    4949
    50 #define PFN_SHIFT       12
    51 #define VPN_SHIFT       12
    52 #define ADDR2VPN(a)     ((a) >> VPN_SHIFT)
    53 #define ADDR2VPN2(a)    (ADDR2VPN((a)) >> 1)
    54 #define VPN2ADDR(vpn)   ((vpn) << VPN_SHIFT)
    55 #define VPN22ADDR(vpn2) (VPN2ADDR(vpn2) << 1)
    56 #define PFN2ADDR(pfn)   ((pfn) << PFN_SHIFT)
    57 
    58 #define BANK_SELECT_BIT(a)      (((a) >> PAGE_WIDTH) & 1)
    59        
     50static pte_t *find_mapping_and_check(uintptr_t, int, istate_t *);
    6051
    6152/** Initialize TLB.
     
    9384{
    9485        entry_lo_t lo;
     86        entry_hi_t hi;
     87        asid_t asid;
    9588        uintptr_t badvaddr;
    9689        pte_t *pte;
    9790       
    9891        badvaddr = cp0_badvaddr_read();
    99 
    100         pte = page_mapping_find(AS, badvaddr, true);
    101         if (pte && pte->p) {
     92        asid = AS->asid;
     93       
     94        pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate);
     95        if (pte) {
    10296                /*
    10397                 * Record access to PTE.
     
    10599                pte->a = 1;
    106100
     101                tlb_prepare_entry_hi(&hi, asid, badvaddr);
    107102                tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d,
    108103                    pte->cacheable, pte->pfn);
     
    111106                 * New entry is to be inserted into TLB
    112107                 */
    113                 if (BANK_SELECT_BIT(badvaddr) == 0) {
     108                cp0_entry_hi_write(hi.value);
     109                if ((badvaddr / PAGE_SIZE) % 2 == 0) {
    114110                        cp0_entry_lo0_write(lo.value);
    115111                        cp0_entry_lo1_write(0);
     
    120116                cp0_pagemask_write(TLB_PAGE_MASK_16K);
    121117                tlbwr();
    122                 return;
    123         }
    124 
    125         (void) as_page_fault(badvaddr, PF_ACCESS_READ, istate);
     118        }
    126119}
    127120
     
    132125void tlb_invalid(istate_t *istate)
    133126{
    134         entry_lo_t lo;
    135127        tlb_index_t index;
    136128        uintptr_t badvaddr;
     129        entry_lo_t lo;
     130        entry_hi_t hi;
    137131        pte_t *pte;
     132
     133        badvaddr = cp0_badvaddr_read();
    138134
    139135        /*
    140136         * Locate the faulting entry in TLB.
    141137         */
     138        hi.value = cp0_entry_hi_read();
     139        tlb_prepare_entry_hi(&hi, hi.asid, badvaddr);
     140        cp0_entry_hi_write(hi.value);
    142141        tlbp();
    143142        index.value = cp0_index_read();
    144143
    145 #if defined(PROCESSOR_4Kc)
    146         /*
    147          * This can happen on a 4Kc when Status.EXL is 1 and there is a TLB miss.
    148          * EXL is 1 when interrupts are disabled. The combination of a TLB miss
    149          * and disabled interrupts is possible in copy_to/from_uspace().
    150          */
    151         if (index.p) {
    152                 tlb_refill(istate);
    153                 return;
    154         }
    155 #endif
    156 
    157144        ASSERT(!index.p);
    158145
    159         badvaddr = cp0_badvaddr_read();
    160 
    161         pte = page_mapping_find(AS, badvaddr, true);
    162         if (pte && pte->p) {
     146        pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate);
     147        if (pte) {
    163148                /*
    164149                 * Read the faulting TLB entry.
     
    177162                 * The entry is to be updated in TLB.
    178163                 */
    179                 if (BANK_SELECT_BIT(badvaddr) == 0)
     164                if ((badvaddr / PAGE_SIZE) % 2 == 0)
    180165                        cp0_entry_lo0_write(lo.value);
    181166                else
    182167                        cp0_entry_lo1_write(lo.value);
     168                cp0_pagemask_write(TLB_PAGE_MASK_16K);
    183169                tlbwi();
    184                 return;
    185         }
    186 
    187         (void) as_page_fault(badvaddr, PF_ACCESS_READ, istate);
     170        }
    188171}
    189172
     
    194177void tlb_modified(istate_t *istate)
    195178{
    196         entry_lo_t lo;
    197179        tlb_index_t index;
    198180        uintptr_t badvaddr;
     181        entry_lo_t lo;
     182        entry_hi_t hi;
    199183        pte_t *pte;
    200184
     
    204188         * Locate the faulting entry in TLB.
    205189         */
     190        hi.value = cp0_entry_hi_read();
     191        tlb_prepare_entry_hi(&hi, hi.asid, badvaddr);
     192        cp0_entry_hi_write(hi.value);
    206193        tlbp();
    207194        index.value = cp0_index_read();
    208195
    209196        /*
    210          * Emit warning if the entry is not in TLB.
    211          *
    212          * We do not assert on this because this could be a manifestation of
    213          * an emulator bug, such as QEMU Bug #1128935:
    214          * https://bugs.launchpad.net/qemu/+bug/1128935 
     197         * Fail if the entry is not in TLB.
    215198         */
    216         if (index.p) {
    217                 printf("%s: TLBP failed in exception handler (badvaddr=%#"
    218                     PRIxn ", ASID=%d).\n", __func__, badvaddr,
    219                     AS ? AS->asid : -1);
    220                 return;
    221         }
    222 
    223         pte = page_mapping_find(AS, badvaddr, true);
    224         if (pte && pte->p && pte->w) {
     199        ASSERT(!index.p);
     200
     201        pte = find_mapping_and_check(badvaddr, PF_ACCESS_WRITE, istate);
     202        if (pte) {
    225203                /*
    226204                 * Read the faulting TLB entry.
     
    240218                 * The entry is to be updated in TLB.
    241219                 */
    242                 if (BANK_SELECT_BIT(badvaddr) == 0)
     220                if ((badvaddr / PAGE_SIZE) % 2 == 0)
    243221                        cp0_entry_lo0_write(lo.value);
    244222                else
    245223                        cp0_entry_lo1_write(lo.value);
     224                cp0_pagemask_write(TLB_PAGE_MASK_16K);
    246225                tlbwi();
    247                 return;
    248         }
    249 
    250         (void) as_page_fault(badvaddr, PF_ACCESS_WRITE, istate);
     226        }
     227}
     228
     229/** Try to find PTE for faulting address.
     230 *
     231 * @param badvaddr      Faulting virtual address.
     232 * @param access        Access mode that caused the fault.
     233 * @param istate        Pointer to interrupted state.
     234 *
     235 * @return              PTE on success, NULL otherwise.
     236 */
     237pte_t *find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate)
     238{
     239        entry_hi_t hi;
     240        pte_t *pte;
     241
     242        hi.value = cp0_entry_hi_read();
     243
     244        ASSERT(hi.asid == AS->asid);
     245
     246        /*
     247         * Check if the mapping exists in page tables.
     248         */     
     249        pte = page_mapping_find(AS, badvaddr, true);
     250        if (pte && pte->p && (pte->w || access != PF_ACCESS_WRITE)) {
     251                /*
     252                 * Mapping found in page tables.
     253                 * Immediately succeed.
     254                 */
     255                return pte;
     256        }
     257
     258        /*
     259         * Mapping not found in page tables.
     260         * Resort to higher-level page fault handler.
     261         */
     262        if (as_page_fault(badvaddr, access, istate) == AS_PF_OK) {
     263                pte = page_mapping_find(AS, badvaddr, true);
     264                ASSERT(pte && pte->p);
     265                ASSERT(pte->w || access != PF_ACCESS_WRITE);
     266                return pte;
     267        }
     268
     269        return NULL;
    251270}
    252271
     
    265284void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr)
    266285{
    267         hi->value = 0;
    268         hi->vpn2 = ADDR2VPN2(ALIGN_DOWN(addr, PAGE_SIZE));
     286        hi->value = ALIGN_DOWN(addr, PAGE_SIZE * 2);
    269287        hi->asid = asid;
    270288}
     
    273291void tlb_print(void)
    274292{
    275         page_mask_t mask, mask_save;
    276         entry_lo_t lo0, lo0_save, lo1, lo1_save;
     293        page_mask_t mask;
     294        entry_lo_t lo0, lo1;
    277295        entry_hi_t hi, hi_save;
    278296        unsigned int i;
    279297
    280298        hi_save.value = cp0_entry_hi_read();
    281         lo0_save.value = cp0_entry_lo0_read();
    282         lo1_save.value = cp0_entry_lo1_read();
    283         mask_save.value = cp0_pagemask_read();
    284        
    285         printf("[nr] [asid] [vpn2    ] [mask] [gvdc] [pfn     ]\n");
     299       
     300        printf("[nr] [asid] [vpn2] [mask] [gvdc] [pfn ]\n");
    286301       
    287302        for (i = 0; i < TLB_ENTRY_COUNT; i++) {
     
    294309                lo1.value = cp0_entry_lo1_read();
    295310               
    296                 printf("%-4u %-6u %0#10x %-#6x  %1u%1u%1u%1u  %0#10x\n",
    297                     i, hi.asid, VPN22ADDR(hi.vpn2), mask.mask,
    298                     lo0.g, lo0.v, lo0.d, lo0.c, PFN2ADDR(lo0.pfn));
    299                 printf("                               %1u%1u%1u%1u  %0#10x\n",
    300                     lo1.g, lo1.v, lo1.d, lo1.c, PFN2ADDR(lo1.pfn));
     311                printf("%-4u %-6u %#6x %#6x  %1u%1u%1u%1u  %#6x\n",
     312                    i, hi.asid, hi.vpn2, mask.mask,
     313                    lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn);
     314                printf("                           %1u%1u%1u%1u  %#6x\n",
     315                    lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn);
    301316        }
    302317       
    303318        cp0_entry_hi_write(hi_save.value);
    304         cp0_entry_lo0_write(lo0_save.value);
    305         cp0_entry_lo1_write(lo1_save.value);
    306         cp0_pagemask_write(mask_save.value);
    307319}
    308320
     
    310322void tlb_invalidate_all(void)
    311323{
     324        ipl_t ipl;
    312325        entry_lo_t lo0, lo1;
    313326        entry_hi_t hi_save;
    314327        int i;
    315328
    316         ASSERT(interrupts_disabled());
    317 
    318329        hi_save.value = cp0_entry_hi_read();
     330        ipl = interrupts_disable();
    319331
    320332        for (i = TLB_WIRED; i < TLB_ENTRY_COUNT; i++) {
     
    334346        }
    335347       
     348        interrupts_restore(ipl);
    336349        cp0_entry_hi_write(hi_save.value);
    337350}
     
    343356void tlb_invalidate_asid(asid_t asid)
    344357{
     358        ipl_t ipl;
    345359        entry_lo_t lo0, lo1;
    346360        entry_hi_t hi, hi_save;
    347361        int i;
    348362
    349         ASSERT(interrupts_disabled());
    350363        ASSERT(asid != ASID_INVALID);
    351364
    352365        hi_save.value = cp0_entry_hi_read();
     366        ipl = interrupts_disable();
    353367       
    354368        for (i = 0; i < TLB_ENTRY_COUNT; i++) {
     
    372386        }
    373387       
     388        interrupts_restore(ipl);
    374389        cp0_entry_hi_write(hi_save.value);
    375390}
     
    385400{
    386401        unsigned int i;
     402        ipl_t ipl;
    387403        entry_lo_t lo0, lo1;
    388404        entry_hi_t hi, hi_save;
    389405        tlb_index_t index;
    390 
    391         ASSERT(interrupts_disabled());
    392406       
    393407        if (asid == ASID_INVALID)
     
    395409
    396410        hi_save.value = cp0_entry_hi_read();
     411        ipl = interrupts_disable();
    397412
    398413        for (i = 0; i < cnt + 1; i += 2) {
     414                hi.value = 0;
    399415                tlb_prepare_entry_hi(&hi, asid, page + i * PAGE_SIZE);
    400416                cp0_entry_hi_write(hi.value);
     
    423439        }
    424440       
     441        interrupts_restore(ipl);
    425442        cp0_entry_hi_write(hi_save.value);
    426443}
  • kernel/arch/mips64/src/mips64.c

    rc6a7b3a rcc3c27ad  
    4646#include <arch/debug.h>
    4747#include <arch/debugger.h>
    48 #ifdef MACHINE_msim
    4948#include <arch/drivers/msim.h>
    50 #endif
    5149#include <genarch/fb/fb.h>
    5250#include <genarch/drivers/dsrln/dsrlnin.h>
     
    127125        interrupt_init();
    128126       
    129 #ifdef CONFIG_MSIM_PRN
     127#ifdef CONFIG_MIPS_PRN
    130128        outdev_t *dsrlndev = dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS);
    131129        if (dsrlndev)
     
    153151            str_size(platform));
    154152       
    155 #ifdef CONFIG_MSIM_KBD
    156         /*
    157          * Initialize the msim keyboard port. Then initialize the serial line
    158          * module and connect it to the msim keyboard. Enable keyboard
    159          * interrupts.
     153#ifdef CONFIG_MIPS_KBD
     154        /*
     155         * Initialize the msim/GXemul keyboard port. Then initialize the serial line
     156         * module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts.
    160157         */
    161158        dsrlnin_instance_t *dsrlnin_instance
  • kernel/arch/mips64/src/mm/frame.c

    rc6a7b3a rcc3c27ad  
    4040#include <mm/asid.h>
    4141#include <config.h>
    42 #ifdef MACHINE_msim
    4342#include <arch/drivers/msim.h>
    44 #endif
    4543#include <print.h>
    4644
  • kernel/arch/sparc64/src/mm/sun4u/tlb.c

    rc6a7b3a rcc3c27ad  
    196196void fast_instruction_access_mmu_miss(sysarg_t unused, istate_t *istate)
    197197{
     198        uintptr_t page_16k = ALIGN_DOWN(istate->tpc, PAGE_SIZE);
    198199        size_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE;
    199200        pte_t *t;
    200201
    201         t = page_mapping_find(AS, istate->tpc, true);
     202        t = page_mapping_find(AS, page_16k, true);
    202203        if (t && PTE_EXECUTABLE(t)) {
    203204                /*
     
    215216                 * handler.
    216217                 */
    217                 as_page_fault(istate->tpc, PF_ACCESS_EXEC, istate);
     218                as_page_fault(page_16k, PF_ACCESS_EXEC, istate);
    218219        }
    219220}
  • kernel/generic/include/mm/tlb.h

    rc6a7b3a rcc3c27ad  
    7373extern void tlb_shootdown_ipi_recv(void);
    7474#else
    75 #define tlb_shootdown_start(w, x, y, z) interrupts_disable()   
    76 #define tlb_shootdown_finalize(i)       (interrupts_restore(i));
     75#define tlb_shootdown_start(w, x, y, z) (0)
     76#define tlb_shootdown_finalize(i)       ((i) = (i));
    7777#define tlb_shootdown_ipi_recv()
    7878#endif /* CONFIG_SMP */
  • kernel/generic/src/mm/as.c

    rc6a7b3a rcc3c27ad  
    544544    mem_backend_data_t *backend_data, uintptr_t *base, uintptr_t bound)
    545545{
    546         if ((*base != (uintptr_t) -1) && !IS_ALIGNED(*base, PAGE_SIZE))
     546        if ((*base != (uintptr_t) -1) && ((*base % PAGE_SIZE) != 0))
    547547                return NULL;
    548548       
     
    688688int as_area_resize(as_t *as, uintptr_t address, size_t size, unsigned int flags)
    689689{
    690         if (!IS_ALIGNED(address, PAGE_SIZE))
    691                 return EINVAL;
    692 
    693690        mutex_lock(&as->lock);
    694691       
     
    13531350 * Interrupts are assumed disabled.
    13541351 *
    1355  * @param address Faulting address.
    1356  * @param access  Access mode that caused the page fault (i.e.
    1357  *                read/write/exec).
    1358  * @param istate  Pointer to the interrupted state.
     1352 * @param page   Faulting page.
     1353 * @param access Access mode that caused the page fault (i.e.
     1354 *               read/write/exec).
     1355 * @param istate Pointer to the interrupted state.
    13591356 *
    13601357 * @return AS_PF_FAULT on page fault.
     
    13641361 *
    13651362 */
    1366 int as_page_fault(uintptr_t address, pf_access_t access, istate_t *istate)
    1367 {
    1368         uintptr_t page = ALIGN_DOWN(address, PAGE_SIZE);
     1363int as_page_fault(uintptr_t page, pf_access_t access, istate_t *istate)
     1364{
    13691365        int rc = AS_PF_FAULT;
    13701366
     
    14561452                task_kill_self(true);
    14571453        } else {
    1458                 fault_if_from_uspace(istate, "Page fault: %p.", (void *) address);
    1459                 panic_memtrap(istate, access, address, NULL);
     1454                fault_if_from_uspace(istate, "Page fault: %p.", (void *) page);
     1455                panic_memtrap(istate, access, page, NULL);
    14601456        }
    14611457       
     
    16831679{
    16841680        ASSERT(mutex_locked(&area->lock));
    1685         ASSERT(IS_ALIGNED(page, PAGE_SIZE));
     1681        ASSERT(page == ALIGN_DOWN(page, PAGE_SIZE));
    16861682        ASSERT(count);
    16871683       
     
    19671963{
    19681964        ASSERT(mutex_locked(&area->lock));
    1969         ASSERT(IS_ALIGNED(page, PAGE_SIZE));
     1965        ASSERT(page == ALIGN_DOWN(page, PAGE_SIZE));
    19701966        ASSERT(count);
    19711967       
  • kernel/generic/src/mm/backend_anon.c

    rc6a7b3a rcc3c27ad  
    173173 *
    174174 * @param area Pointer to the address space area.
    175  * @param upage Faulting virtual page.
     175 * @param addr Faulting virtual address.
    176176 * @param access Access mode that caused the fault (i.e. read/write/exec).
    177177 *
     
    179179 *     serviced).
    180180 */
    181 int anon_page_fault(as_area_t *area, uintptr_t upage, pf_access_t access)
    182 {
     181int anon_page_fault(as_area_t *area, uintptr_t addr, pf_access_t access)
     182{
     183        uintptr_t upage = ALIGN_DOWN(addr, PAGE_SIZE);
    183184        uintptr_t kpage;
    184185        uintptr_t frame;
     
    186187        ASSERT(page_table_locked(AS));
    187188        ASSERT(mutex_locked(&area->lock));
    188         ASSERT(IS_ALIGNED(upage, PAGE_SIZE));
    189189
    190190        if (!as_area_check_access(area, access))
  • kernel/generic/src/mm/backend_elf.c

    rc6a7b3a rcc3c27ad  
    235235 *
    236236 * @param area          Pointer to the address space area.
    237  * @param upage         Faulting virtual page.
     237 * @param addr          Faulting virtual address.
    238238 * @param access        Access mode that caused the fault (i.e.
    239239 *                      read/write/exec).
     
    242242 *                      on success (i.e. serviced).
    243243 */
    244 int elf_page_fault(as_area_t *area, uintptr_t upage, pf_access_t access)
     244int elf_page_fault(as_area_t *area, uintptr_t addr, pf_access_t access)
    245245{
    246246        elf_header_t *elf = area->backend_data.elf;
     
    250250        uintptr_t frame;
    251251        uintptr_t kpage;
     252        uintptr_t upage;
    252253        uintptr_t start_anon;
    253254        size_t i;
     
    256257        ASSERT(page_table_locked(AS));
    257258        ASSERT(mutex_locked(&area->lock));
    258         ASSERT(IS_ALIGNED(upage, PAGE_SIZE));
    259259
    260260        if (!as_area_check_access(area, access))
    261261                return AS_PF_FAULT;
    262262       
    263         if (upage < ALIGN_DOWN(entry->p_vaddr, PAGE_SIZE))
     263        if (addr < ALIGN_DOWN(entry->p_vaddr, PAGE_SIZE))
    264264                return AS_PF_FAULT;
    265265       
    266         if (upage >= entry->p_vaddr + entry->p_memsz)
     266        if (addr >= entry->p_vaddr + entry->p_memsz)
    267267                return AS_PF_FAULT;
    268268       
    269         i = (upage - ALIGN_DOWN(entry->p_vaddr, PAGE_SIZE)) >> PAGE_WIDTH;
     269        i = (addr - ALIGN_DOWN(entry->p_vaddr, PAGE_SIZE)) >> PAGE_WIDTH;
    270270        base = (uintptr_t)
    271271            (((void *) elf) + ALIGN_DOWN(entry->p_offset, PAGE_SIZE));
     272
     273        /* Virtual address of faulting page */
     274        upage = ALIGN_DOWN(addr, PAGE_SIZE);
    272275
    273276        /* Virtual address of the end of initialized part of segment */
  • kernel/generic/src/mm/backend_phys.c

    rc6a7b3a rcc3c27ad  
    111111 *
    112112 * @param area Pointer to the address space area.
    113  * @param upage Faulting virtual page.
     113 * @param addr Faulting virtual address.
    114114 * @param access Access mode that caused the fault (i.e. read/write/exec).
    115115 *
     
    117117 * serviced).
    118118 */
    119 int phys_page_fault(as_area_t *area, uintptr_t upage, pf_access_t access)
     119int phys_page_fault(as_area_t *area, uintptr_t addr, pf_access_t access)
    120120{
    121121        uintptr_t base = area->backend_data.base;
     
    123123        ASSERT(page_table_locked(AS));
    124124        ASSERT(mutex_locked(&area->lock));
    125         ASSERT(IS_ALIGNED(upage, PAGE_SIZE));
    126125
    127126        if (!as_area_check_access(area, access))
    128127                return AS_PF_FAULT;
    129128
    130         ASSERT(upage - area->base < area->backend_data.frames * FRAME_SIZE);
    131         page_mapping_insert(AS, upage, base + (upage - area->base),
     129        ASSERT(addr - area->base < area->backend_data.frames * FRAME_SIZE);
     130        page_mapping_insert(AS, addr, base + (addr - area->base),
    132131            as_area_get_flags(area));
    133132       
    134         if (!used_space_insert(area, upage, 1))
     133        if (!used_space_insert(area, ALIGN_DOWN(addr, PAGE_SIZE), 1))
    135134                panic("Cannot insert used space.");
    136135
  • kernel/generic/src/mm/page.c

    rc6a7b3a rcc3c27ad  
    104104        ASSERT(page_mapping_operations->mapping_insert);
    105105
    106         page_mapping_operations->mapping_insert(as, ALIGN_DOWN(page, PAGE_SIZE),
    107             ALIGN_DOWN(frame, FRAME_SIZE), flags);
     106        page_mapping_operations->mapping_insert(as, page, frame, flags);
    108107       
    109108        /* Repel prefetched accesses to the old mapping. */
     
    128127        ASSERT(page_mapping_operations->mapping_remove);
    129128       
    130         page_mapping_operations->mapping_remove(as,
    131             ALIGN_DOWN(page, PAGE_SIZE));
     129        page_mapping_operations->mapping_remove(as, page);
    132130       
    133131        /* Repel prefetched accesses to the old mapping. */
     
    152150        ASSERT(page_mapping_operations->mapping_find);
    153151       
    154         return page_mapping_operations->mapping_find(as,
    155             ALIGN_DOWN(page, PAGE_SIZE), nolock);
     152        return page_mapping_operations->mapping_find(as, page, nolock);
    156153}
    157154
  • kernel/generic/src/sysinfo/sysinfo.c

    rc6a7b3a rcc3c27ad  
    753753        sysinfo_return_t ret;
    754754        ret.tag = SYSINFO_VAL_UNDEFINED;
    755         ret.data.data = NULL;
    756         ret.data.size = 0;
    757755       
    758756        if (size > SYSINFO_MAX_PATH)
  • release/Makefile

    rc6a7b3a rcc3c27ad  
    3333
    3434PROFILES = amd64 arm32/integratorcp arm32/gta02 arm32/beagleboardxm ia32 \
    35     ia64/i460GX ia64/ski mips32/msim ppc32 sparc64/ultra
     35    ia64/i460GX ia64/ski mips32/GXemul mips32/msim ppc32 \
     36    sparc64/ultra
    3637
    3738BZR = bzr
  • tools/autotool.py

    rc6a7b3a rcc3c27ad  
    676676                                common['CC_ARGS'].append("-mabi=32")
    677677                               
    678                                 if ((config['MACHINE'] == "msim") or (config['MACHINE'] == "lmalta")):
     678                                if ((config['MACHINE'] == "lgxemul") or (config['MACHINE'] == "msim")):
    679679                                        target = config['PLATFORM']
    680680                                        gnu_target = "mipsel-linux-gnu"
    681681                               
    682                                 if ((config['MACHINE'] == "bmalta")):
     682                                if (config['MACHINE'] == "bgxemul"):
    683683                                        target = "mips32eb"
    684684                                        gnu_target = "mips-linux-gnu"
  • tools/toolchain.sh

    rc6a7b3a rcc3c27ad  
    5555BINUTILS_VERSION="2.23.1"
    5656BINUTILS_RELEASE=""
    57 GCC_VERSION="4.8.0"
    58 GDB_VERSION="7.5.1"
     57GCC_VERSION="4.7.2"
     58GDB_VERSION="7.5"
    5959
    6060BASEDIR="`pwd`"
     
    275275       
    276276        download_fetch "${BINUTILS_SOURCE}" "${BINUTILS}" "33adb18c3048d057ac58d07a3f1adb38"
    277         download_fetch "${GCC_SOURCE}" "${GCC}" "e6040024eb9e761c3bea348d1fa5abb0"
    278         download_fetch "${GDB_SOURCE}" "${GDB}" "3f48f468b24447cf24820054ff6e85b1"
     277        download_fetch "${GCC_SOURCE}" "${GCC}" "cc308a0891e778cfda7a151ab8a6e762"
     278        download_fetch "${GDB_SOURCE}" "${GDB}" "24a6779a9fe0260667710de1b082ef61"
    279279}
    280280
  • uspace/Makefile

    rc6a7b3a rcc3c27ad  
    9797        srv/bd/sata_bd \
    9898        srv/bd/file_bd \
     99        srv/bd/gxe_bd \
    99100        srv/bd/rd \
    100101        srv/bd/part/guid_part \
  • uspace/app/init/init.c

    rc6a7b3a rcc3c27ad  
    369369#ifdef CONFIG_START_BD
    370370        srv_start("/srv/ata_bd");
     371        srv_start("/srv/gxe_bd");
    371372#endif
    372373       
  • uspace/lib/c/arch/mips32/Makefile.common

    rc6a7b3a rcc3c27ad  
    2727#
    2828
    29 GCC_CFLAGS += -msoft-float -mabi=32
     29GCC_CFLAGS += -msoft-float -mips3 -mabi=32
    3030BASE_LIBS += $(LIBSOFTFLOAT_PREFIX)/libsoftfloat.a
    3131
     
    3434BFD_ARCH = mips
    3535BFD_NAME = elf32-tradlittlemips
    36 
    37 ifeq ($(MACHINE),msim)
    38         GCC_CFLAGS += -march=r4000
    39 endif
    40 
    41 ifeq ($(MACHINE),lmalta)
    42         GCC_CFLAGS += -march=4kc
    43 endif
    44 
  • uspace/lib/c/arch/mips32eb/Makefile.common

    rc6a7b3a rcc3c27ad  
    2727#
    2828
    29 GCC_CFLAGS += -msoft-float -mabi=32
     29GCC_CFLAGS += -msoft-float -mips3 -mabi=32
    3030BASE_LIBS += $(LIBSOFTFLOAT_PREFIX)/libsoftfloat.a
    3131
     
    3434BFD_ARCH = mips
    3535BFD_NAME = elf32-tradbigmips
    36 
    37 ifeq ($(MACHINE),bmalta)
    38         GCC_CFLAGS += -march=4kc
    39 endif
    40 
  • uspace/srv/fs/exfat/exfat_fat.c

    rc6a7b3a rcc3c27ad  
    401401{
    402402        service_id_t service_id = nodep->idx->service_id;
    403         exfat_cluster_t lastc = 0;
     403        exfat_cluster_t lastc;
    404404        int rc;
    405405
  • uspace/srv/fs/fat/fat_fat.c

    rc6a7b3a rcc3c27ad  
    128128{
    129129        fat_cluster_t firstc = nodep->firstc;
    130         fat_cluster_t currc = 0;
     130        fat_cluster_t currc;
    131131        aoff64_t relbn = bn;
    132132        int rc;
     
    194194        uint32_t clusters;
    195195        uint32_t max_clusters;
    196         fat_cluster_t c = 0;
     196        fat_cluster_t c;
    197197        int rc;
    198198
     
    679679        fat_cluster_t *lifo;    /* stack for storing free cluster numbers */
    680680        unsigned found = 0;     /* top of the free cluster number stack */
    681         fat_cluster_t clst;
    682         fat_cluster_t value = 0;
    683         fat_cluster_t clst_last1 = FAT_CLST_LAST1(bs);
     681        fat_cluster_t clst, value, clst_last1 = FAT_CLST_LAST1(bs);
    684682        int rc = EOK;
    685683
     
    785783{
    786784        service_id_t service_id = nodep->idx->service_id;
    787         fat_cluster_t lastc = 0;
     785        fat_cluster_t lastc;
    788786        uint8_t fatno;
    789787        int rc;
     
    909907int fat_sanity_check(fat_bs_t *bs, service_id_t service_id)
    910908{
    911         fat_cluster_t e0 = 0;
    912         fat_cluster_t e1 = 0;
     909        fat_cluster_t e0, e1;
    913910        unsigned fat_no;
    914911        int rc;
  • uspace/srv/fs/mfs/mfs_ops.c

    rc6a7b3a rcc3c27ad  
    773773{
    774774        int rc;
    775         fs_node_t *fn = NULL;
     775        fs_node_t *fn;
    776776
    777777        rc = mfs_node_get(&fn, service_id, index);
     
    11081108mfs_sync(service_id_t service_id, fs_index_t index)
    11091109{
    1110         fs_node_t *fn = NULL;
     1110        fs_node_t *fn;
    11111111        int rc = mfs_node_get(&fn, service_id, index);
    11121112        if (rc != EOK)
  • uspace/srv/hid/input/Makefile

    rc6a7b3a rcc3c27ad  
    3939        port/adb_mouse.c \
    4040        port/chardev.c \
     41        port/gxemul.c \
    4142        port/msim.c \
    4243        port/niagara.c \
     
    4748        proto/mousedev.c \
    4849        ctl/apple.c \
     50        ctl/gxe_fb.c \
    4951        ctl/kbdev.c \
    5052        ctl/pc.c \
  • uspace/srv/hid/input/input.c

    rc6a7b3a rcc3c27ad  
    440440        kbd_add_dev(&msim_port, &stty_ctl);
    441441#endif
     442#if (defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)) && defined(CONFIG_FB)
     443        kbd_add_dev(&gxemul_port, &gxe_fb_ctl);
     444#endif
     445#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul) && !defined(CONFIG_FB)
     446        kbd_add_dev(&gxemul_port, &stty_ctl);
     447#endif
    442448#if defined(UARCH_ppc32)
    443449        kbd_add_dev(&adb_port, &apple_ctl);
  • uspace/srv/hid/input/kbd_ctl.h

    rc6a7b3a rcc3c27ad  
    4949
    5050extern kbd_ctl_ops_t apple_ctl;
     51extern kbd_ctl_ops_t gxe_fb_ctl;
    5152extern kbd_ctl_ops_t kbdev_ctl;
    5253extern kbd_ctl_ops_t pc_ctl;
  • uspace/srv/hid/input/kbd_port.h

    rc6a7b3a rcc3c27ad  
    5151extern kbd_port_ops_t adb_port;
    5252extern kbd_port_ops_t chardev_port;
     53extern kbd_port_ops_t gxemul_port;
    5354extern kbd_port_ops_t msim_port;
    5455extern kbd_port_ops_t niagara_port;
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