Index: kernel/arch/ia32/src/ddi/ddi.c
===================================================================
--- kernel/arch/ia32/src/ddi/ddi.c	(revision e8a0b90b4a2726b532a39fb80b80662f5bed01e9)
+++ kernel/arch/ia32/src/ddi/ddi.c	(revision cb4afd8bbf37def6ce88be49db41f1a2fd01c053)
@@ -126,8 +126,9 @@
 	if ((bits = TASK->arch.iomap.bits)) {
 		bitmap_t iomap;
+		task_t *task = TASK;
 	
 		ASSERT(TASK->arch.iomap.map);
 		bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);
-		bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
+		bitmap_copy(&iomap, &task->arch.iomap, task->arch.iomap.bits);
 		/*
 		 * It is safe to set the trailing eight bits because of the extra
Index: kernel/arch/ia32/src/mm/page.c
===================================================================
--- kernel/arch/ia32/src/mm/page.c	(revision e8a0b90b4a2726b532a39fb80b80662f5bed01e9)
+++ kernel/arch/ia32/src/mm/page.c	(revision cb4afd8bbf37def6ce88be49db41f1a2fd01c053)
@@ -84,6 +84,8 @@
 	uintptr_t virtaddr = PA2KA(last_frame);
 	pfn_t i;
-	for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
-		page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE | PAGE_WRITE);
+	for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) {
+		uintptr_t addr = PFN2ADDR(i);
+		page_mapping_insert(AS_KERNEL, virtaddr + addr, physaddr + addr, PAGE_NOT_CACHEABLE | PAGE_WRITE);
+	}
 	
 	last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
@@ -92,5 +94,5 @@
 }
 
-void page_fault(int n, istate_t *istate)
+void page_fault(int n __attribute__((unused)), istate_t *istate)
 {
 	uintptr_t page;
@@ -111,5 +113,5 @@
 		
 		decode_istate(istate);
-		printf("page fault address: %#x\n", page);
+		printf("page fault address: %#lx\n", page);
 		panic("page fault\n");
 	}
Index: kernel/arch/ia32/src/proc/scheduler.c
===================================================================
--- kernel/arch/ia32/src/proc/scheduler.c	(revision e8a0b90b4a2726b532a39fb80b80662f5bed01e9)
+++ kernel/arch/ia32/src/proc/scheduler.c	(revision cb4afd8bbf37def6ce88be49db41f1a2fd01c053)
@@ -67,8 +67,9 @@
 #ifdef CONFIG_DEBUG_AS_WATCHPOINT
 	/* Set watchpoint on AS to ensure that nobody sets it to zero */
-	if (CPU->id < BKPOINTS_MAX)
-		breakpoint_add(&((the_t *) THREAD->kstack)->as, 
-			       BKPOINT_WRITE | BKPOINT_CHECK_ZERO,
-			       CPU->id);
+	if (CPU->id < BKPOINTS_MAX) {
+		the_t *the = THE;
+		breakpoint_add(&((the_t *) the->thread->kstack)->as, 
+			BKPOINT_WRITE | BKPOINT_CHECK_ZERO, the->cpu->id);
+	}
 #endif
 }
Index: kernel/arch/ia32/src/smp/apic.c
===================================================================
--- kernel/arch/ia32/src/smp/apic.c	(revision e8a0b90b4a2726b532a39fb80b80662f5bed01e9)
+++ kernel/arch/ia32/src/smp/apic.c	(revision cb4afd8bbf37def6ce88be49db41f1a2fd01c053)
@@ -126,8 +126,8 @@
  * @param istate Interrupted state.
  */
-static void apic_spurious(int n, istate_t *istate)
+static void apic_spurious(int n __attribute__((unused)), istate_t *istate __attribute__((unused)))
 {
 #ifdef CONFIG_DEBUG
-	printf("cpu%d: APIC spurious interrupt\n", CPU->id);
+	printf("cpu%u: APIC spurious interrupt\n", CPU->id);
 #endif
 }
@@ -138,5 +138,5 @@
 }
 
-static void l_apic_timer_irq_handler(irq_t *irq, void *arg, ...)
+static void l_apic_timer_irq_handler(irq_t *irq, void *arg __attribute__((unused)), ...)
 {
 	/*
@@ -154,6 +154,5 @@
 {
 	io_apic_id_t idreg;
-	unsigned int i;
-
+	
 	exc_register(VECTOR_APIC_SPUR, "apic_spurious", (iroutine) apic_spurious);
 
@@ -177,9 +176,10 @@
 	irq_register(&l_apic_timer_irq);
 	
+	uint8_t i;
 	for (i = 0; i < IRQ_COUNT; i++) {
 		int pin;
 	
 		if ((pin = smp_irq_to_pin(i)) != -1)
-			io_apic_change_ioredtbl(pin, DEST_ALL, IVT_IRQBASE + i, LOPRI);
+			io_apic_change_ioredtbl((uint8_t) pin, DEST_ALL, (uint8_t) (IVT_IRQBASE + i), LOPRI);
 	}
 	
@@ -329,5 +329,5 @@
 		for (i = 0; i<2; i++) {
 			icr.lo = l_apic[ICRlo];
-			icr.vector = ((uintptr_t) ap_boot) / 4096; /* calculate the reset vector */
+			icr.vector = (uint8_t) (((uintptr_t) ap_boot) >> 12); /* calculate the reset vector */
 			icr.delmod = DELMOD_STARTUP;
 			icr.destmod = DESTMOD_PHYS;
@@ -426,7 +426,7 @@
 	
 	/* Program Logical Destination Register. */
+	ASSERT(CPU->id < 8)
 	ldr.value = l_apic[LDR];
-	if (CPU->id < sizeof(CPU->id)*8)	/* size in bits */
-		ldr.id = (1<<CPU->id);
+	ldr.id = (uint8_t) (1 << CPU->id);
 	l_apic[LDR] = ldr.value;
 	
@@ -514,5 +514,5 @@
  * @param flags Flags.
  */
-void io_apic_change_ioredtbl(int pin, int dest, uint8_t v, int flags)
+void io_apic_change_ioredtbl(uint8_t pin, uint8_t dest, uint8_t v, int flags)
 {
 	io_redirection_reg_t reg;
@@ -522,6 +522,6 @@
 		dlvr = DELMOD_LOWPRI;
 
-	reg.lo = io_apic_read(IOREDTBL + pin*2);
-	reg.hi = io_apic_read(IOREDTBL + pin*2 + 1);
+	reg.lo = io_apic_read((uint8_t) (IOREDTBL + pin * 2));
+	reg.hi = io_apic_read((uint8_t) (IOREDTBL + pin * 2 + 1));
 	
 	reg.dest = dest;
@@ -532,6 +532,6 @@
 	reg.intvec = v;
 
-	io_apic_write(IOREDTBL + pin*2, reg.lo);
-	io_apic_write(IOREDTBL + pin*2 + 1, reg.hi);
+	io_apic_write((uint8_t) (IOREDTBL + pin * 2), reg.lo);
+	io_apic_write((uint8_t) (IOREDTBL + pin * 2 + 1), reg.hi);
 }
 
@@ -554,7 +554,7 @@
 			pin = smp_irq_to_pin(i);
 			if (pin != -1) {
-				reg.lo = io_apic_read(IOREDTBL + pin * 2);
+				reg.lo = io_apic_read((uint8_t) (IOREDTBL + pin * 2));
 				reg.masked = true;
-				io_apic_write(IOREDTBL + pin * 2, reg.lo);
+				io_apic_write((uint8_t) (IOREDTBL + pin * 2), reg.lo);
 			}
 			
@@ -573,5 +573,5 @@
 	io_redirection_reg_t reg;	
 	
-	for (i = 0;i < 16; i++) {
+	for (i = 0; i < 16; i++) {
 		if (irqmask & (1 << i)) {
 			/*
@@ -581,7 +581,7 @@
 			pin = smp_irq_to_pin(i);
 			if (pin != -1) {
-				reg.lo = io_apic_read(IOREDTBL + pin * 2);
+				reg.lo = io_apic_read((uint8_t) (IOREDTBL + pin * 2));
 				reg.masked = false;
-				io_apic_write(IOREDTBL + pin * 2, reg.lo);
+				io_apic_write((uint8_t) (IOREDTBL + pin * 2), reg.lo);
 			}
 			
Index: kernel/arch/ia32/src/smp/mps.c
===================================================================
--- kernel/arch/ia32/src/smp/mps.c	(revision e8a0b90b4a2726b532a39fb80b80662f5bed01e9)
+++ kernel/arch/ia32/src/smp/mps.c	(revision cb4afd8bbf37def6ce88be49db41f1a2fd01c053)
@@ -55,17 +55,17 @@
 #define CT_SIGNATURE 	0x504d4350
 
-int mps_fs_check(uint8_t *base);
-int mps_ct_check(void);
-
-int configure_via_ct(void);
-int configure_via_default(uint8_t n);
-
-int ct_processor_entry(struct __processor_entry *pr);
-void ct_bus_entry(struct __bus_entry *bus);
-void ct_io_apic_entry(struct __io_apic_entry *ioa);
-void ct_io_intr_entry(struct __io_intr_entry *iointr);
-void ct_l_intr_entry(struct __l_intr_entry *lintr);
-
-void ct_extended_entries(void);
+static int mps_fs_check(uint8_t *base);
+static int mps_ct_check(void);
+
+static int configure_via_ct(void);
+static int configure_via_default(uint8_t n);
+
+static int ct_processor_entry(struct __processor_entry *pr);
+static void ct_bus_entry(struct __bus_entry *bus);
+static void ct_io_apic_entry(struct __io_apic_entry *ioa);
+static void ct_io_intr_entry(struct __io_intr_entry *iointr);
+static void ct_l_intr_entry(struct __l_intr_entry *lintr);
+
+static void ct_extended_entries(void);
 
 static struct mps_fs *fs;
@@ -109,5 +109,5 @@
 {
 	ASSERT(i < processor_entry_cnt);
-	return processor_entries[i].cpu_flags & 0x1;
+	return (bool) ((processor_entries[i].cpu_flags & 0x01) == 0x01);
 }
 
@@ -115,5 +115,5 @@
 {
 	ASSERT(i < processor_entry_cnt);
-	return processor_entries[i].cpu_flags & 0x2;
+	return (bool) ((processor_entries[i].cpu_flags & 0x02) == 0x02);
 }
 
@@ -134,5 +134,5 @@
 	
 	for (i = 0, sum = 0; i < 16; i++)
-		sum += base[i];
+		sum = (uint8_t) (sum + base[i]);
 	
 	return !sum;
@@ -151,5 +151,5 @@
 	/* count the checksum for the base table */
 	for (i=0,sum=0; i < ct->base_table_length; i++)
-		sum += base[i];
+		sum = (uint8_t) (sum + base[i]);
 		
 	if (sum)
@@ -158,5 +158,5 @@
 	/* count the checksum for the extended table */
 	for (i=0,sum=0; i < ct->ext_table_length; i++)
-		sum += ext[i];
+		sum = (uint8_t) (sum + ext[i]);
 		
 	return sum == ct->ext_table_checksum;
@@ -287,5 +287,5 @@
 }
 
-int configure_via_default(uint8_t n)
+int configure_via_default(uint8_t n __attribute__((unused)))
 {
 	/*
@@ -297,5 +297,5 @@
 
 
-int ct_processor_entry(struct __processor_entry *pr)
+int ct_processor_entry(struct __processor_entry *pr __attribute__((unused)))
 {
 	/*
@@ -309,5 +309,5 @@
 }
 
-void ct_bus_entry(struct __bus_entry *bus)
+void ct_bus_entry(struct __bus_entry *bus __attribute__((unused)))
 {
 #ifdef MPSCT_VERBOSE
@@ -338,5 +338,5 @@
 
 //#define MPSCT_VERBOSE
-void ct_io_intr_entry(struct __io_intr_entry *iointr)
+void ct_io_intr_entry(struct __io_intr_entry *iointr __attribute__((unused)))
 {
 #ifdef MPSCT_VERBOSE
@@ -369,5 +369,5 @@
 }
 
-void ct_l_intr_entry(struct __l_intr_entry *lintr)
+void ct_l_intr_entry(struct __l_intr_entry *lintr __attribute__((unused)))
 {
 #ifdef MPSCT_VERBOSE
Index: kernel/arch/ia32/src/smp/smp.c
===================================================================
--- kernel/arch/ia32/src/smp/smp.c	(revision e8a0b90b4a2726b532a39fb80b80662f5bed01e9)
+++ kernel/arch/ia32/src/smp/smp.c	(revision cb4afd8bbf37def6ce88be49db41f1a2fd01c053)
@@ -99,5 +99,5 @@
  * as an initialization stack for each AP.)
  */
-void kmp(void *arg)
+void kmp(void *arg __attribute__((unused)))
 {
 	unsigned int i;
@@ -113,6 +113,6 @@
 	 * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
 	 */
-	*((uint16_t *) (PA2KA(0x467 + 0))) =  ((uintptr_t) ap_boot) >> 4;	/* segment */
-	*((uint16_t *) (PA2KA(0x467 + 2))) =  0;				/* offset */
+	*((uint16_t *) (PA2KA(0x467 + 0))) = (uint16_t) (((uintptr_t) ap_boot) >> 4);	/* segment */
+	*((uint16_t *) (PA2KA(0x467 + 2))) = 0;				/* offset */
 	
 	/*
@@ -125,4 +125,6 @@
 	pic_disable_irqs(0xffff);
 	apic_init();
+	
+	uint8_t apic = l_apic_id();
 
 	for (i = 0; i < ops->cpu_count(); i++) {
@@ -141,6 +143,6 @@
 			continue;
 
-		if (ops->cpu_apic_id(i) == l_apic_id()) {
-			printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i);
+		if (ops->cpu_apic_id(i) == apic) {
+			printf("%s: bad processor entry #%u, will not send IPI to myself\n", __FUNCTION__, i);
 			continue;
 		}
@@ -149,5 +151,5 @@
 		 * Prepare new GDT for CPU in question.
 		 */
-		if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC)))
+		if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS * sizeof(struct descriptor), FRAME_ATOMIC)))
 			panic("couldn't allocate memory for GDT\n");
 
@@ -164,6 +166,8 @@
 			 * supposed to wake us up.
 			 */
-			if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT)
-				printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i));
+			if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) {
+				unsigned int cpu = (config.cpu_active > i) ? config.cpu_active : i;
+				printf("%s: waiting for cpu%u (APIC ID = %d) timed out\n", __FUNCTION__, cpu, ops->cpu_apic_id(i));
+			}
 		} else
 			printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i));