Index: kernel/arch/abs32le/include/asm.h
===================================================================
--- kernel/arch/abs32le/include/asm.h	(revision 3d6beaa35f8c97b40779781a9022e244474c064e)
+++ kernel/arch/abs32le/include/asm.h	(revision ca8f84f28749a37bc03923e5f1b1de449c46816a)
@@ -38,10 +38,11 @@
 #include <typedefs.h>
 #include <config.h>
-
-static inline void asm_delay_loop(uint32_t usec)
-{
-}
-
-static inline __attribute__((noreturn)) void cpu_halt(void)
+#include <trace.h>
+
+NO_TRACE static inline void asm_delay_loop(uint32_t usec)
+{
+}
+
+NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void)
 {
 	/* On real hardware this should stop processing further
@@ -53,5 +54,5 @@
 }
 
-static inline void cpu_sleep(void)
+NO_TRACE static inline void cpu_sleep(void)
 {
 	/* On real hardware this should put the CPU into low-power
@@ -61,5 +62,5 @@
 }
 
-static inline void pio_write_8(ioport8_t *port, uint8_t val)
+NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val)
 {
 }
@@ -73,5 +74,5 @@
  *
  */
-static inline void pio_write_16(ioport16_t *port, uint16_t val)
+NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val)
 {
 }
@@ -85,5 +86,5 @@
  *
  */
-static inline void pio_write_32(ioport32_t *port, uint32_t val)
+NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val)
 {
 }
@@ -97,5 +98,5 @@
  *
  */
-static inline uint8_t pio_read_8(ioport8_t *port)
+NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
 {
 	return 0;
@@ -110,5 +111,5 @@
  *
  */
-static inline uint16_t pio_read_16(ioport16_t *port)
+NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
 {
 	return 0;
@@ -123,59 +124,72 @@
  *
  */
-static inline uint32_t pio_read_32(ioport32_t *port)
-{
-	return 0;
-}
-
-static inline ipl_t interrupts_enable(void)
-{
-	/* On real hardware this unconditionally enables preemption
-	   by internal and external interrupts.
-	   
-	   The return value stores the previous interrupt level. */
-	
-	return 0;
-}
-
-static inline ipl_t interrupts_disable(void)
-{
-	/* On real hardware this disables preemption by the usual
-	   set of internal and external interrupts. This does not
-	   apply to special non-maskable interrupts and sychronous
-	   CPU exceptions.
-	   
-	   The return value stores the previous interrupt level. */
-	
-	return 0;
-}
-
-static inline void interrupts_restore(ipl_t ipl)
-{
-	/* On real hardware this either enables or disables preemption
-	   according to the interrupt level value from the argument. */
-}
-
-static inline ipl_t interrupts_read(void)
-{
-	/* On real hardware the return value stores the current interrupt
-	   level. */
-	
-	return 0;
-}
-
-static inline bool interrupts_disabled(void)
-{
-	/* On real hardware the return value is true iff interrupts are
-	   disabled. */
+NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
+{
+	return 0;
+}
+
+NO_TRACE static inline ipl_t interrupts_enable(void)
+{
+	/*
+	 * On real hardware this unconditionally enables preemption
+	 * by internal and external interrupts.
+	 *
+	 * The return value stores the previous interrupt level.
+	 */
+	
+	return 0;
+}
+
+NO_TRACE static inline ipl_t interrupts_disable(void)
+{
+	/*
+	 * On real hardware this disables preemption by the usual
+	 * set of internal and external interrupts. This does not
+	 * apply to special non-maskable interrupts and sychronous
+	 * CPU exceptions.
+	 *
+	 * The return value stores the previous interrupt level.
+	 */
+	
+	return 0;
+}
+
+NO_TRACE static inline void interrupts_restore(ipl_t ipl)
+{
+	/*
+	 * On real hardware this either enables or disables preemption
+	 * according to the interrupt level value from the argument.
+	 */
+}
+
+NO_TRACE static inline ipl_t interrupts_read(void)
+{
+	/*
+	 * On real hardware the return value stores the current interrupt
+	 * level.
+	 */
+	
+	return 0;
+}
+
+NO_TRACE static inline bool interrupts_disabled(void)
+{
+	/*
+	 * On real hardware the return value is true iff interrupts are
+	 * disabled.
+	 */
+	
 	return false;
 }
 
-static inline uintptr_t get_stack_base(void)
-{
-	/* On real hardware this returns the address of the bottom
-	   of the current CPU stack. The the_t structure is stored
-	   on the bottom of stack and this is used to identify the
-	   current CPU, current task, current thread and current
-	   address space. */
+NO_TRACE static inline uintptr_t get_stack_base(void)
+{
+	/*
+	 * On real hardware this returns the address of the bottom
+	 * of the current CPU stack. The the_t structure is stored
+	 * on the bottom of stack and this is used to identify the
+	 * current CPU, current task, current thread and current
+	 * address space.
+	 */
 	
 	return 0;
