Changeset ca652eb in mainline

Timestamp:

2014-07-05T19:27:22Z (10 years ago)

Author:

Agnieszka Tabaka <nufcia@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

b8e75319

Parents:

727e639

Message:

Fixes allowing to compile driver cleanly on IA32 platform.

File:

• uspace/drv/nic/rtl8169/driver.c (modified) (10 diffs)

uspace/drv/nic/rtl8169/driver.c

@@ -247 +247 @@
                 return rc;
 
-        ddf_msg(LVL_DEBUG, "TX ring address: phys=0x%08lx, virt=%p",
+        ddf_msg(LVL_DEBUG, "TX ring address: phys=0x%#" PRIxn ", virt=%p",
             rtl8169->tx_ring_phys, rtl8169->tx_ring);
 
@@ -261 +261 @@
                 return rc;
 
-        ddf_msg(LVL_DEBUG, "RX ring address: phys=0x%08lx, virt=%p",
+        ddf_msg(LVL_DEBUG, "RX ring address: phys=0x%#" PRIxn ", virt=%p",
             rtl8169->rx_ring_phys, rtl8169->rx_ring);
 
@@ -275 +275 @@
                 return rc;
 
-        ddf_msg(LVL_DEBUG, "TX buffers base address: phys=0x%08lx, virt=%p",
+        ddf_msg(LVL_DEBUG, "TX buffers base address: phys=0x%#" PRIxn " virt=%p",
             rtl8169->tx_buff_phys, rtl8169->tx_buff);
 
@@ -287 +287 @@
                 return rc;
 
-        ddf_msg(LVL_DEBUG, "RX buffers base address: phys=0x%08lx, virt=%p",
+        ddf_msg(LVL_DEBUG, "RX buffers base address: phys=0x%#" PRIxn ", virt=%p",
             rtl8169->rx_buff_phys, rtl8169->rx_buff);
 
@@ -615 +615 @@
 {
         rtl8169_descr_t *descr;
-        uintptr_t buff_phys;
+        uint64_t buff_phys;
         unsigned int i = first;
 
@@ -638 +638 @@
 {
         int rc;
+        uint64_t tmp;
 
         ddf_msg(LVL_NOTE, "Activating device");
@@ -658 +659 @@
 
         /* Write address of descriptor as start of TX ring */
-        pio_write_32(rtl8169->regs + TNPDS, rtl8169->tx_ring_phys & 0xffffffff);
-        pio_write_32(rtl8169->regs + TNPDS + 4, (rtl8169->tx_ring_phys >> 32) & 0xffffffff);
+        tmp = rtl8169->tx_ring_phys;
+        pio_write_32(rtl8169->regs + TNPDS, tmp & 0xffffffff);
+        pio_write_32(rtl8169->regs + TNPDS + 4, (tmp >> 32) & 0xffffffff);
         rtl8169->tx_head = 0;
         rtl8169->tx_tail = 0;
@@ -665 +667 @@
 
         /* Write RX ring address */
-        pio_write_32(rtl8169->regs + RDSAR, rtl8169->rx_ring_phys & 0xffffffff);
-        pio_write_32(rtl8169->regs + RDSAR + 4, (rtl8169->rx_ring_phys >> 32) & 0xffffffff);
+        tmp = rtl8169->rx_ring_phys;
+        pio_write_32(rtl8169->regs + RDSAR, tmp & 0xffffffff);
+        pio_write_32(rtl8169->regs + RDSAR + 4, (tmp >> 32) & 0xffffffff);
         rtl8169->rx_head = 0;
         rtl8169->rx_tail = 0;
@@ -895 +898 @@
         unsigned int head, tail;
         void *buff;
-        uintptr_t buff_phys;
+        uint64_t buff_phys;
         rtl8169_t *rtl8169 = nic_get_specific(nic_data);
 
@@ -906 +909 @@
         fibril_mutex_lock(&rtl8169->tx_lock);
 
-        ddf_msg(LVL_NOTE, "send_frame: size: %ld, tx_head=%d tx_tail=%d",
+        ddf_msg(LVL_NOTE, "send_frame: size: %zu, tx_head=%d tx_tail=%d",
             size, rtl8169->tx_head, rtl8169->tx_tail);