Index: uspace/drv/audio/sb16/Makefile =================================================================== --- uspace/drv/audio/sb16/Makefile (revision 1b93658e6a7f59e094263b89049076d3e014a81f) +++ uspace/drv/audio/sb16/Makefile (revision c885a217667f229b9378a27fddafda5a31f7163d) @@ -40,5 +40,4 @@ beep.c \ dsp.c \ - dma_controller.c \ main.c \ mixer.c \ Index: pace/drv/audio/sb16/dma_controller.c =================================================================== --- uspace/drv/audio/sb16/dma_controller.c (revision 1b93658e6a7f59e094263b89049076d3e014a81f) +++ (revision ) @@ -1,309 +1,0 @@ -/* - * Copyright (c) 2011 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup drvaudiosb16 - * @{ - */ -/** @file - * @brief DMA memory management - */ -#include -#include -#include -#include - -#include "ddf_log.h" -#include "dma_controller.h" - -#define DMA_CONTROLLER_FIRST_BASE ((void*)0x0) -typedef struct dma_controller_regs_first { - uint8_t channel_start0; - uint8_t channel_count0; - uint8_t channel_start1; - uint8_t channel_count1; - uint8_t channel_start2; - uint8_t channel_count2; - uint8_t channel_start3; - uint8_t channel_count3; - - uint8_t command_status; -#define DMA_STATUS_REQ(x) (1 << ((x % 4) + 4)) -#define DMA_STATUS_COMPLETE(x) (1 << (x % 4)) -/* http://wiki.osdev.org/DMA: The only bit that works is COND(bit 2) */ -#define DMA_COMMAND_COND (1 << 2) /* Disables DMA controller */ - - uint8_t request; /* Memory to memory transfers, NOT implemented on PCs*/ - uint8_t single_mask; -#define DMA_SINGLE_MASK_CHAN_SEL_MASK (0x3) -#define DMA_SINGLE_MASK_CHAN_SEL_SHIFT (0) -#define DMA_SINGLE_MASK_CHAN_TO_REG(x) \ - ((x & DMA_SINGLE_MASK_CHAN_SEL_MASK) << DMA_SINGLE_MASK_CHAN_SEL_SHIFT) -#define DMA_SINGLE_MASK_MASKED_FLAG (1 << 2) - - uint8_t mode; -#define DMA_MODE_CHAN_SELECT_MASK (0x3) -#define DMA_MODE_CHAN_SELECT_SHIFT (0) -#define DMA_MODE_CHAN_TO_REG(x) \ - ((x & DMA_MODE_CHAN_SELECT_MASK) << DMA_MODE_CHAN_SELECT_SHIFT) -#define DMA_MODE_CHAN_TRA_MASK (0x3) -#define DMA_MODE_CHAN_TRA_SHIFT (2) -#define DMA_MODE_CHAN_TRA_SELF_TEST (0) -#define DMA_MODE_CHAN_TRA_WRITE (0x1) -#define DMA_MODE_CHAN_TRA_READ (0x2) -#define DMA_MODE_CHAN_AUTO_FLAG (1 << 4) -#define DMA_MODE_CHAN_DOWN_FLAG (1 << 5) -#define DMA_MODE_CHAN_MODE_MASK (0x3) -#define DMA_MODE_CHAN_MODE_SHIFT (6) -#define DMA_MODE_CHAN_MODE_DEMAND (0) -#define DMA_MODE_CHAN_MODE_SINGLE (1) -#define DMA_MODE_CHAN_MODE_BLOCK (2) -#define DMA_MODE_CHAN_MODE_CASCADE (3) - - uint8_t flip_flop; - /* Master reset sets Flip-Flop low, clears status, - * sets all mask bits on */ - uint8_t master_reset; /* Intermediate is not implemented on PCs */ - uint8_t mask_reset; - - uint8_t multi_mask; -#define DMA_MULTI_MASK_CHAN(x) (1 << (x % 4)) - -} dma_controller_regs_first_t; - -#define DMA_CONTROLLER_SECOND_BASE ((void*)0xc0) -/* See dma_controller_regs_first_t for register values */ -typedef struct dma_controller_regs_second { - uint8_t channel_start4; - uint8_t reserved0; - uint8_t channel_count4; - uint8_t reserved1; - uint8_t channel_start5; - uint8_t reserved2; - uint8_t channel_count5; - uint8_t reserved3; - uint8_t channel_start6; - uint8_t reserved4; - uint8_t channel_count6; - uint8_t reserved5; - uint8_t channel_start7; - uint8_t reserved6; - uint8_t channel_count7; - - uint8_t command_status; - uint8_t reserved8; - uint8_t request; - uint8_t reserved9; - uint8_t single_mask; - uint8_t reserveda; - uint8_t mode; - uint8_t reservedb; - uint8_t flip_flop; - uint8_t reservedc; - uint8_t master_reset; - uint8_t reservedd; - uint8_t multi_mask; -} dma_controller_regs_second_t; - -#define DMA_CONTROLLER_PAGE_BASE ((void*)0x81) -typedef struct dma_page_regs { - uint8_t channel2; - uint8_t channel3; - uint8_t channel1; - uint8_t reserved0; - uint8_t reserved1; - uint8_t reserved2; - uint8_t channel0; - uint8_t reserved3; - uint8_t channel6; - uint8_t channel7; - uint8_t channel5; - uint8_t reserved4; - uint8_t reserved5; - uint8_t reserved6; - uint8_t channel4; -} dma_page_regs_t; - -typedef struct dma_channel { - uint8_t *offset_reg_address; - uint8_t *size_reg_address; - uint8_t *page_reg_address; - uint8_t *single_mask_address; - uint8_t *mode_address; - uint8_t *flip_flop_address; -} dma_channel_t; - -typedef struct dma_controller { - dma_channel_t channels[8]; - dma_page_regs_t *page_table; - dma_controller_regs_first_t *first; - dma_controller_regs_second_t *second; - bool initialized; -} dma_controller_t; - - -/* http://zet.aluzina.org/index.php/8237_DMA_controller#DMA_Channel_Registers */ -static dma_controller_t controller_8237 = { - .channels = { - /* The first chip 8-bit */ - { (uint8_t*)0x00, (uint8_t*)0x01, (uint8_t*)0x87, - (uint8_t*)0x0a, (uint8_t*)0x0b, (uint8_t*)0x0c, }, - { (uint8_t*)0x02, (uint8_t*)0x03, (uint8_t*)0x83, - (uint8_t*)0x0a, (uint8_t*)0x0b, (uint8_t*)0x0c, }, - { (uint8_t*)0x04, (uint8_t*)0x05, (uint8_t*)0x81, - (uint8_t*)0x0a, (uint8_t*)0x0b, (uint8_t*)0x0c, }, - { (uint8_t*)0x06, (uint8_t*)0x07, (uint8_t*)0x82, - (uint8_t*)0x0a, (uint8_t*)0x0b, (uint8_t*)0x0c, }, - - /* The second chip 16-bit */ - { (uint8_t*)0xc0, (uint8_t*)0xc2, (uint8_t*)0x8f, - (uint8_t*)0xd4, (uint8_t*)0xd6, (uint8_t*)0xd8, }, - { (uint8_t*)0xc4, (uint8_t*)0xc6, (uint8_t*)0x8b, - (uint8_t*)0xd4, (uint8_t*)0xd6, (uint8_t*)0xd8, }, - { (uint8_t*)0xc8, (uint8_t*)0xca, (uint8_t*)0x89, - (uint8_t*)0xd4, (uint8_t*)0xd6, (uint8_t*)0xd8, }, - { (uint8_t*)0xcc, (uint8_t*)0xce, (uint8_t*)0x8a, - (uint8_t*)0xd4, (uint8_t*)0xd6, (uint8_t*)0xd8, }, }, - - .page_table = NULL, - .first = NULL, - .second = NULL, - .initialized = false, -}; - -static inline int dma_controller_init(dma_controller_t *controller) -{ - assert(controller); - int ret = pio_enable(DMA_CONTROLLER_PAGE_BASE, sizeof(dma_page_regs_t), - (void**)&controller->page_table); - if (ret != EOK) - return EIO; - - ret = pio_enable(DMA_CONTROLLER_FIRST_BASE, - sizeof(dma_controller_regs_first_t), - (void**)&controller->first); - if (ret != EOK) - return EIO; - - ret = pio_enable(DMA_CONTROLLER_SECOND_BASE, - sizeof(dma_controller_regs_second_t), - (void**)&controller->second); - if (ret != EOK) - return EIO; - controller->initialized = true; - - pio_write_8(&controller->second->master_reset, 0xff); - pio_write_8(&controller->first->master_reset, 0xff); - - - return EOK; -} -/*----------------------------------------------------------------------------*/ -int dma_setup_channel( - unsigned channel, uintptr_t pa, uint16_t size, uint8_t mode) -{ - if (channel == 0 || channel == 4) - return ENOTSUP; - if (channel > 7) - return ENOENT; - - if (!controller_8237.initialized) - dma_controller_init(&controller_8237); - - if (!controller_8237.initialized) - return EIO; - - /* 16 bit transfers are a bit special */ - ddf_log_debug("Unspoiled address: %p and size: %zu.\n", pa, size); - if (channel > 4) { - /* Size is the count of 16bit words */ - assert(size % 2 == 0); - size >>= 1; - /* Address is fun: lower 16bits need to be shifted by 1 */ - pa = ((pa & 0xffff) >> 1) | (pa & 0xff0000); - } - - const dma_channel_t dma_channel = controller_8237.channels[channel]; - - ddf_log_debug("Setting channel %u, to address %p(%zu), mode %hhx.\n", - channel, pa, size, mode); - - /* Mask DMA request */ - uint8_t value = DMA_SINGLE_MASK_CHAN_TO_REG(channel) - | DMA_SINGLE_MASK_MASKED_FLAG; - pio_write_8(dma_channel.single_mask_address, value); - - /* Set mode */ - value = DMA_MODE_CHAN_TO_REG(channel) | mode; - ddf_log_verbose("Writing mode byte: %p:%hhx.\n", - dma_channel.mode_address, value); - pio_write_8(dma_channel.mode_address, value); - - /* Set address -- reset flip-flop*/ - pio_write_8(dma_channel.flip_flop_address, 0); - - /* Low byte */ - value = pa & 0xff; - ddf_log_verbose("Writing address low byte: %p:%hhx.\n", - dma_channel.offset_reg_address, value); - pio_write_8(dma_channel.offset_reg_address, value); - - /* High byte */ - value = (pa >> 8) & 0xff; - ddf_log_verbose("Writing address high byte: %p:%hhx.\n", - dma_channel.offset_reg_address, value); - pio_write_8(dma_channel.offset_reg_address, value); - - /* Page address - third byte */ - value = (pa >> 16) & 0xff; - ddf_log_verbose("Writing address page byte: %p:%hhx.\n", - dma_channel.page_reg_address, value); - pio_write_8(dma_channel.page_reg_address, value); - - /* Set size -- reset flip-flop */ - pio_write_8(dma_channel.flip_flop_address, 0); - - /* Low byte */ - value = (size - 1) & 0xff; - ddf_log_verbose("Writing size low byte: %p:%hhx.\n", - dma_channel.size_reg_address, value); - pio_write_8(dma_channel.size_reg_address, value); - - /* High byte */ - value = ((size - 1) >> 8) & 0xff; - ddf_log_verbose("Writing size high byte: %p:%hhx.\n", - dma_channel.size_reg_address, value); - pio_write_8(dma_channel.size_reg_address, value); - - /* Unmask DMA request */ - value = DMA_SINGLE_MASK_CHAN_TO_REG(channel); - pio_write_8(dma_channel.single_mask_address, value); - - return EOK; -} -/** - * @} - */ Index: pace/drv/audio/sb16/dma_controller.h =================================================================== --- uspace/drv/audio/sb16/dma_controller.h (revision 1b93658e6a7f59e094263b89049076d3e014a81f) +++ (revision ) @@ -1,52 +1,0 @@ -/* - * Copyright (c) 2011 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup drvaudiosb16 - * @{ - */ -/** @file - * @brief DMA memory management - */ -#ifndef DRV_AUDIO_SB16_DMA_CONTROLLER_H -#define DRV_AUDIO_SB16_DMA_CONTROLLER_H - -#include - -#define DMA_MODE_WRITE (1 << 2) -#define DMA_MODE_READ (1 << 3) -#define DMA_MODE_AUTO (1 << 4) -#define DMA_MODE_DOWN (1 << 5) -#define DMA_MODE_SINGLE (1 << 6) -#define DMA_MODE_BLOCK (1 << 7) -#define DMA_MODE_ON_DEMAND (0) - -int dma_setup_channel( - unsigned channel, uintptr_t pa, uint16_t size, uint8_t mode); -#endif -/** - * @} - */ Index: uspace/drv/audio/sb16/dsp.c =================================================================== --- uspace/drv/audio/sb16/dsp.c (revision 1b93658e6a7f59e094263b89049076d3e014a81f) +++ uspace/drv/audio/sb16/dsp.c (revision c885a217667f229b9378a27fddafda5a31f7163d) @@ -33,10 +33,12 @@ */ +#include +#include #include #include #include +#include #include "dma.h" -#include "dma_controller.h" #include "ddf_log.h" #include "dsp_commands.h" @@ -51,6 +53,4 @@ #define DSP_RESET_RESPONSE 0xaa -#define SB_DMA_CHAN_16 5 -#define SB_DMA_CHAN_8 1 #define AUTO_DMA_MODE @@ -105,4 +105,18 @@ } /*----------------------------------------------------------------------------*/ +static inline int sb_setup_dma(sb_dsp_t *dsp, uintptr_t pa, size_t size) +{ + async_sess_t *sess = devman_parent_device_connect(EXCHANGE_ATOMIC, + dsp->sb_dev->handle, IPC_FLAG_BLOCKING); + if (!sess) + return ENOMEM; + + const int ret = hw_res_dma_channel_setup(sess, + dsp->dma16_channel, pa, size, + DMA_MODE_READ | DMA_MODE_AUTO | DMA_MODE_ON_DEMAND); + async_hangup(sess); + return ret; +} +/*----------------------------------------------------------------------------*/ static inline int sb_setup_buffer(sb_dsp_t *dsp) { @@ -117,6 +131,5 @@ assert(pa < (1 << 25)); /* Set 16 bit channel */ - const int ret = dma_setup_channel(SB_DMA_CHAN_16, pa, BUFFER_SIZE, - DMA_MODE_READ | DMA_MODE_AUTO | DMA_MODE_ON_DEMAND); + const int ret = sb_setup_dma(dsp, pa, BUFFER_SIZE); if (ret == EOK) { dsp->buffer.data = buffer; @@ -148,8 +161,12 @@ } /*----------------------------------------------------------------------------*/ -int sb_dsp_init(sb_dsp_t *dsp, sb16_regs_t *regs) +int sb_dsp_init(sb_dsp_t *dsp, sb16_regs_t *regs, ddf_dev_t *dev, + int dma8, int dma16) { assert(dsp); dsp->regs = regs; + dsp->dma8_channel = dma8; + dsp->dma16_channel = dma16; + dsp->sb_dev = dev; sb_dsp_reset(dsp); /* "DSP takes about 100 microseconds to initialize itself" */ Index: uspace/drv/audio/sb16/dsp.h =================================================================== --- uspace/drv/audio/sb16/dsp.h (revision 1b93658e6a7f59e094263b89049076d3e014a81f) +++ uspace/drv/audio/sb16/dsp.h (revision c885a217667f229b9378a27fddafda5a31f7163d) @@ -35,4 +35,5 @@ #define DRV_AUDIO_SB16_DSP_H +#include #include #include @@ -42,4 +43,6 @@ typedef struct sb_dsp_t { sb16_regs_t *regs; + int dma8_channel; + int dma16_channel; struct { uint8_t major; @@ -57,7 +60,9 @@ uint8_t mode; } playing; + ddf_dev_t *sb_dev; } sb_dsp_t; -int sb_dsp_init(sb_dsp_t *dsp, sb16_regs_t *regs); +int sb_dsp_init(sb_dsp_t *dsp, sb16_regs_t *regs, ddf_dev_t *dev, + int dma8, int dma16); void sb_dsp_interrupt(sb_dsp_t *dsp); int sb_dsp_play_direct(sb_dsp_t *dsp, const uint8_t *data, size_t size, Index: uspace/drv/audio/sb16/main.c =================================================================== --- uspace/drv/audio/sb16/main.c (revision 1b93658e6a7f59e094263b89049076d3e014a81f) +++ uspace/drv/audio/sb16/main.c (revision c885a217667f229b9378a27fddafda5a31f7163d) @@ -50,5 +50,6 @@ static int sb_add_device(ddf_dev_t *device); static int sb_get_res(const ddf_dev_t *device, uintptr_t *sb_regs, - size_t *sb_regs_size, uintptr_t *mpu_regs, size_t *mpu_regs_size, int *irq); + size_t *sb_regs_size, uintptr_t *mpu_regs, size_t *mpu_regs_size, + int *irq, int *dma8, int *dma16); static int sb_enable_interrupts(ddf_dev_t *device); /*----------------------------------------------------------------------------*/ @@ -81,7 +82,6 @@ { assert(dev); - sb16_drv_t *sb = dev->driver_data; - assert(sb); - sb16_interrupt(sb); + assert(dev->driver_data); + sb16_interrupt(dev->driver_data); } /*----------------------------------------------------------------------------*/ @@ -101,5 +101,5 @@ assert(device); - sb16_drv_t *soft_state = ddf_dev_data_alloc(device, sizeof(sb16_drv_t)); + sb16_t *soft_state = ddf_dev_data_alloc(device, sizeof(sb16_t)); int ret = soft_state ? EOK : ENOMEM; CHECK_RET_RETURN(ret, "Failed to allocate sb16 structure.\n"); @@ -107,8 +107,8 @@ uintptr_t sb_regs = 0, mpu_regs = 0; size_t sb_regs_size = 0, mpu_regs_size = 0; - int irq = 0; + int irq = 0, dma8 = 0, dma16 = 0; ret = sb_get_res(device, &sb_regs, &sb_regs_size, &mpu_regs, - &mpu_regs_size, &irq); + &mpu_regs_size, &irq, &dma8, &dma16); CHECK_RET_RETURN(ret, "Failed to get resources: %s.\n", str_error(ret)); @@ -145,5 +145,6 @@ CHECK_RET_UNREG_DEST_RETURN(ret, "Failed to create mixer function."); - ret = sb16_init_sb16(soft_state, (void*)sb_regs, sb_regs_size); + ret = sb16_init_sb16( + soft_state, (void*)sb_regs, sb_regs_size, device, dma8, dma16); CHECK_RET_UNREG_DEST_RETURN(ret, "Failed to init sb16 driver: %s.\n", str_error(ret)); @@ -183,5 +184,6 @@ /*----------------------------------------------------------------------------*/ static int sb_get_res(const ddf_dev_t *device, uintptr_t *sb_regs, - size_t *sb_regs_size, uintptr_t *mpu_regs, size_t *mpu_regs_size, int *irq) + size_t *sb_regs_size, uintptr_t *mpu_regs, size_t *mpu_regs_size, + int *irq, int *dma8, int *dma16) { assert(device); @@ -191,4 +193,6 @@ assert(mpu_regs_size); assert(irq); + assert(dma8); + assert(dma16); async_sess_t *parent_sess = @@ -224,4 +228,11 @@ } break; + case DMA_CHANNEL_16: + *dma16 = res->res.dma_channel.dma16; + ddf_log_debug("Found DMA16 channel: %d.\n", *dma16); + break; + case DMA_CHANNEL_8: + *dma8 = res->res.dma_channel.dma8; + ddf_log_debug("Found DMA8 channel: %d.\n", *dma8); default: break; Index: uspace/drv/audio/sb16/sb16.c =================================================================== --- uspace/drv/audio/sb16/sb16.c (revision 1b93658e6a7f59e094263b89049076d3e014a81f) +++ uspace/drv/audio/sb16/sb16.c (revision c885a217667f229b9378a27fddafda5a31f7163d) @@ -40,5 +40,5 @@ static const irq_cmd_t irq_cmds[] = {{ .cmd = CMD_ACCEPT }}; static const irq_code_t irq_code = - { .cmdcount = 1, .cmds = (irq_cmd_t*)irq_cmds }; + { .cmdcount = 1, .cmds = (irq_cmd_t*)irq_cmds }; // FIXME: Remove cast static inline sb_mixer_type_t sb_mixer_type_by_dsp_version( @@ -57,18 +57,20 @@ irq_code_t * sb16_irq_code(void) { + // FIXME: Remove this cast return (irq_code_t*)&irq_code; } /*----------------------------------------------------------------------------*/ -int sb16_init_sb16(sb16_drv_t *drv, void *regs, size_t size) +int sb16_init_sb16(sb16_t *sb, void *regs, size_t size, + ddf_dev_t *dev, int dma8, int dma16) { - assert(drv); + assert(sb); /* Setup registers */ - int ret = pio_enable(regs, size, (void**)&drv->regs); + int ret = pio_enable(regs, size, (void**)&sb->regs); if (ret != EOK) return ret; - ddf_log_debug("PIO registers at %p accessible.\n", drv->regs); + ddf_log_debug("PIO registers at %p accessible.\n", sb->regs); /* Initialize DSP */ - ret = sb_dsp_init(&drv->dsp, drv->regs); + ret = sb_dsp_init(&sb->dsp, sb->regs, dev, dma8, dma16); if (ret != EOK) { ddf_log_error("Failed to initialize SB DSP: %s.\n", @@ -77,11 +79,11 @@ } ddf_log_note("Sound blaster DSP (%x.%x) initialized.\n", - drv->dsp.version.major, drv->dsp.version.minor); + sb->dsp.version.major, sb->dsp.version.minor); /* Initialize mixer */ const sb_mixer_type_t mixer_type = sb_mixer_type_by_dsp_version( - drv->dsp.version.major, drv->dsp.version.minor); + sb->dsp.version.major, sb->dsp.version.minor); - ret = sb_mixer_init(&drv->mixer, drv->regs, mixer_type); + ret = sb_mixer_init(&sb->mixer, sb->regs, mixer_type); if (ret != EOK) { ddf_log_error("Failed to initialize SB mixer: %s.\n", @@ -90,27 +92,27 @@ } ddf_log_note("Initialized mixer: %s.\n", - sb_mixer_type_str(drv->mixer.type)); + sb_mixer_type_str(sb->mixer.type)); ddf_log_note("Playing startup sound.\n"); - sb_dsp_play(&drv->dsp, beep, beep_size, 44100, 1, 8); + sb_dsp_play(&sb->dsp, beep, beep_size, 44100, 1, 8); return EOK; } /*----------------------------------------------------------------------------*/ -int sb16_init_mpu(sb16_drv_t *drv, void *regs, size_t size) +int sb16_init_mpu(sb16_t *sb, void *regs, size_t size) { - drv->mpu_regs = NULL; + sb->mpu_regs = NULL; return ENOTSUP; } /*----------------------------------------------------------------------------*/ -void sb16_interrupt(sb16_drv_t *drv) +void sb16_interrupt(sb16_t *sb) { - assert(drv); + assert(sb); /* The acknowledgment of interrupts on DSP version 4.xx is different; * It can contain MPU-401 indicator and DMA16 transfers are acked * differently */ - if (drv->dsp.version.major >= 4) { - pio_write_8(&drv->regs->mixer_address, MIXER_IRQ_STATUS_ADDRESS); - const uint8_t irq_mask = pio_read_8(&drv->regs->mixer_data); + if (sb->dsp.version.major >= 4) { + pio_write_8(&sb->regs->mixer_address, MIXER_IRQ_STATUS_ADDRESS); + const uint8_t irq_mask = pio_read_8(&sb->regs->mixer_data); /* Third bit is MPU-401 interrupt */ if (irq_mask & 0x4) { @@ -120,4 +122,4 @@ ddf_log_debug("SB16 interrupt.\n"); } - sb_dsp_interrupt(&drv->dsp); + sb_dsp_interrupt(&sb->dsp); } Index: uspace/drv/audio/sb16/sb16.h =================================================================== --- uspace/drv/audio/sb16/sb16.h (revision 1b93658e6a7f59e094263b89049076d3e014a81f) +++ uspace/drv/audio/sb16/sb16.h (revision c885a217667f229b9378a27fddafda5a31f7163d) @@ -43,15 +43,16 @@ #include "registers.h" -typedef struct sb16_drv { +typedef struct sb16 { sb16_regs_t *regs; mpu_regs_t *mpu_regs; sb_dsp_t dsp; sb_mixer_t mixer; -} sb16_drv_t; +} sb16_t; irq_code_t * sb16_irq_code(void); -int sb16_init_sb16(sb16_drv_t *drv, void *regs, size_t size); -int sb16_init_mpu(sb16_drv_t *drv, void *regs, size_t size); -void sb16_interrupt(sb16_drv_t *drv); +int sb16_init_sb16(sb16_t *sb, void *regs, size_t size, + ddf_dev_t *dev, int dma8, int dma16); +int sb16_init_mpu(sb16_t *sb, void *regs, size_t size); +void sb16_interrupt(sb16_t *sb); #endif