Changeset c7511ec in mainline

Timestamp:

2008-06-14T11:46:46Z (17 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

8605b24

Parents:

eeaf667

Message:

Maintain cache coherence after mips32 install exception handlers.

File:

• kernel/arch/mips32/src/mips32.c (modified) (6 diffs)

kernel/arch/mips32/src/mips32.c

@@ -51 +51 @@
 #include <arch/drivers/arc.h>
 #include <console/chardev.h>
+#include <arch/barrier.h>
 #include <arch/debugger.h>
 #include <genarch/fb/fb.h>
@@ -101 +102 @@
         /* Copy the exception vectors to the right places */
         memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
+        smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
         memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
+        smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
         memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
+        smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
         
         /*
-         * Switch to BEV normal level so that exception vectors point to the kernel.
-         * Clear the error level.
+         * Switch to BEV normal level so that exception vectors point to the
+         * kernel. Clear the error level.
          */
-        cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
+        cp0_status_write(cp0_status_read() &
+            ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
 
         /* 
@@ -123 +128 @@
         console_init(device_assign_devno());
 #ifdef CONFIG_FB
-        fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8); // gxemul framebuffer
+        /* GXemul framebuffer */
+        fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8);
 #endif
         sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1);
@@ -144 +150 @@
         /* EXL = 1, UM = 1, IE = 1 */
         cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
-                cp0_status_um_bit | cp0_status_ie_enabled_bit));
+            cp0_status_um_bit | cp0_status_ie_enabled_bit));
         cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
         userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE), 
-                (uintptr_t) kernel_uarg->uspace_uarg,
-                (uintptr_t) kernel_uarg->uspace_entry);
+            (uintptr_t) kernel_uarg->uspace_uarg,
+            (uintptr_t) kernel_uarg->uspace_entry);
         
-        while (1);
+        while (1)
+                ;
 }
 
@@ -161 +168 @@
 void before_thread_runs_arch(void)
 {
-        supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
+        supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
+            SP_DELTA];
 }
 
@@ -183 +191 @@
                 ___halt();
         
-        while (1);
+        while (1)
+                ;
 }