Index: kernel/arch/arm32/include/istate.h
===================================================================
--- kernel/arch/arm32/include/istate.h	(revision 26aafe8d909ecb61306a77910aeb374da3814391)
+++ kernel/arch/arm32/include/istate.h	(revision c6f087267a5341520c2f7f049eae7b1a387ecb14)
@@ -35,13 +35,15 @@
 #define KERN_arm32_ISTATE_H_
 
+#include <trace.h>
+
+#ifdef KERNEL
+
 #include <arch/regutils.h>
 
-#ifdef KERNEL
-#include <typedefs.h>
-#include <trace.h>
-#else
-#include <sys/types.h>
-#define NO_TRACE
-#endif
+#else /* KERNEL */
+
+#include <libarch/regutils.h>
+
+#endif /* KERNEL */
 
 /** Struct representing CPU state saved when an exception occurs. */
Index: kernel/arch/arm32/include/mm/frame.h
===================================================================
--- kernel/arch/arm32/include/mm/frame.h	(revision 26aafe8d909ecb61306a77910aeb374da3814391)
+++ kernel/arch/arm32/include/mm/frame.h	(revision c6f087267a5341520c2f7f049eae7b1a387ecb14)
@@ -40,5 +40,4 @@
 #define FRAME_SIZE   (1 << FRAME_WIDTH)
 
-#ifdef KERNEL
 #ifndef __ASM__
 
@@ -69,5 +68,4 @@
 
 #endif /* __ASM__ */
-#endif /* KERNEL */
 
 #endif
Index: kernel/arch/arm32/include/mm/page.h
===================================================================
--- kernel/arch/arm32/include/mm/page.h	(revision 26aafe8d909ecb61306a77910aeb374da3814391)
+++ kernel/arch/arm32/include/mm/page.h	(revision c6f087267a5341520c2f7f049eae7b1a387ecb14)
@@ -52,6 +52,4 @@
 #	define PA2KA(x)	((x) + 0x80000000)
 #endif
-
-#ifdef KERNEL
 
 /* Number of entries in each level. */
@@ -320,6 +318,4 @@
 #endif /* __ASM__ */
 
-#endif /* KERNEL */
-
 #endif
 
Index: kernel/arch/arm32/include/regutils.h
===================================================================
--- kernel/arch/arm32/include/regutils.h	(revision 26aafe8d909ecb61306a77910aeb374da3814391)
+++ kernel/arch/arm32/include/regutils.h	(revision c6f087267a5341520c2f7f049eae7b1a387ecb14)
@@ -30,5 +30,5 @@
  * @{
  */
-/** 
+/**
  * @file
  * @brief Utilities for convenient manipulation with ARM registers.
@@ -38,52 +38,49 @@
 #define KERN_arm32_REGUTILS_H_
 
-#define STATUS_REG_IRQ_DISABLED_BIT (1 << 7)
-#define STATUS_REG_MODE_MASK        0x1f
+#define STATUS_REG_IRQ_DISABLED_BIT  (1 << 7)
+#define STATUS_REG_MODE_MASK         0x1f
 
-#define CP15_R1_HIGH_VECTORS_BIT    (1 << 13)
-
+#define CP15_R1_HIGH_VECTORS_BIT     (1 << 13)
 
 /* ARM Processor Operation Modes */
-#define USER_MODE         0x10
-#define FIQ_MODE          0x11
-#define	IRQ_MODE          0x12
-#define	SUPERVISOR_MODE   0x13
-#define	ABORT_MODE        0x17
-#define	UNDEFINED_MODE    0x1b
-#define	SYSTEM_MODE       0x1f
+#define USER_MODE        0x10
+#define FIQ_MODE         0x11
+#define IRQ_MODE         0x12
+#define SUPERVISOR_MODE  0x13
+#define ABORT_MODE       0x17
+#define UNDEFINED_MODE   0x1b
+#define SYSTEM_MODE      0x1f
 
 /* [CS]PRS manipulation macros */
-#define GEN_STATUS_READ(nm,reg) \
-static inline uint32_t nm## _status_reg_read(void) \
-{ \
-	uint32_t retval; \
-	asm volatile( \
-		"mrs %[retval], " #reg \
-		: [retval] "=r" (retval) \
-	); \
-	return retval; \
-}
+#define GEN_STATUS_READ(nm, reg) \
+	static inline uint32_t nm## _status_reg_read(void) \
+	{ \
+		uint32_t retval; \
+		\
+		asm volatile ( \
+			"mrs %[retval], " #reg \
+			: [retval] "=r" (retval) \
+		); \
+		\
+		return retval; \
+	}
 
-#define GEN_STATUS_WRITE(nm,reg,fieldname, field) \
-static inline void nm## _status_reg_ ##fieldname## _write(uint32_t value) \
-{ \
-	asm volatile( \
-		"msr " #reg "_" #field ", %[value]" \
-		:: [value] "r" (value) \
-	); \
-}
+#define GEN_STATUS_WRITE(nm, reg, fieldname, field) \
+	static inline void nm## _status_reg_ ##fieldname## _write(uint32_t value) \
+	{ \
+		asm volatile ( \
+			"msr " #reg "_" #field ", %[value]" \
+			:: [value] "r" (value) \
+		); \
+	}
 
+/** Return the value of CPSR (Current Program Status Register). */
+GEN_STATUS_READ(current, cpsr);
 
-/** Returns the value of CPSR (Current Program Status Register). */
-GEN_STATUS_READ(current, cpsr)
-
-
-/** Sets control bits of CPSR. */
+/** Set control bits of CPSR. */
 GEN_STATUS_WRITE(current, cpsr, control, c);
 
-
-/** Returns the value of SPSR (Saved Program Status Register). */
-GEN_STATUS_READ(saved, spsr)
-
+/** Return the value of SPSR (Saved Program Status Register). */
+GEN_STATUS_READ(saved, spsr);
 
 #endif