Changeset c621f4aa in mainline for kernel/arch/amd64


Ignore:
Timestamp:
2010-07-25T10:11:13Z (16 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/fix-logger-deadlock, topic/msim-upgrade, topic/simplify-dev-export
Children:
377cce8
Parents:
24a2517 (diff), a2da43c (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge with mainline.

Location:
kernel/arch/amd64
Files:
1 added
2 deleted
44 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/amd64/Makefile.inc

    r24a2517 rc621f4aa  
    2727#
    2828
    29 ## Toolchain configuration
    30 #
    31 
    3229BFD_NAME = elf64-x86-64
    3330BFD_ARCH = i386:x86-64
    3431BFD = binary
    35 TARGET = amd64-linux-gnu
    3632CLANG_ARCH = x86_64
    37 TOOLCHAIN_DIR = $(CROSS_PREFIX)/amd64
    3833
    3934FPU_NO_CFLAGS = -mno-sse -mno-sse2
    40 CMN1 = -m64 -mcmodel=kernel -mno-red-zone -fno-unwind-tables -fno-omit-frame-pointer
     35CMN1 = -m64 -mcmodel=large -mno-red-zone -fno-unwind-tables -fno-omit-frame-pointer
    4136GCC_CFLAGS += $(CMN1)
    4237ICC_CFLAGS += $(CMN1)
    … …  
    7671        arch/$(KARCH)/src/mm/page.c \
    7772        arch/$(KARCH)/src/mm/tlb.c \
    78         arch/$(KARCH)/src/asm_utils.S \
     73        arch/$(KARCH)/src/asm.S \
    7974        arch/$(KARCH)/src/cpu/cpu.c \
    8075        arch/$(KARCH)/src/proc/scheduler.c \

  • kernel/arch/amd64/_link.ld.in

    r24a2517 rc621f4aa  
    11/** AMD64 linker script
    2  * 
     2 *
    33 * umapped section:
    4  *      kernel text
    5  *      kernel data
     4 *  kernel text
     5 *  kernel data
    66 * mapped section:
    7  *      kernel text
    8  *      kernel data
     7 *  kernel text
     8 *  kernel data
    99 */
    1010
    … …  
    1717                *(K_TEXT_START);
    1818                unmapped_ktext_end = .;
    19 
     19               
    2020                unmapped_kdata_start = .;
    2121                *(K_DATA_START);
    … …  
    2323                unmapped_kdata_end = .;
    2424        }
    25 
     25       
    2626        .mapped (PA2KA(BOOT_OFFSET)+SIZEOF(.unmapped)) : AT (SIZEOF(.unmapped)) {
    2727                ktext_start = .;
    2828                *(.text);
    2929                ktext_end = .;
    30 
     30               
    3131                kdata_start = .;
    32                 *(.data);               /* initialized data */
    33                 *(.rodata*);            /* string literals */
     32                *(.data);       /* initialized data */
     33                *(.rodata*);    /* string literals */
    3434                hardcoded_load_address = .;
    3535                QUAD(PA2KA(BOOT_OFFSET));
    … …  
    4242                hardcoded_unmapped_kdata_size = .;
    4343                QUAD(unmapped_kdata_end - unmapped_kdata_start);
    44                 *(COMMON);              /* global variables */
    45 
     44                *(COMMON);      /* global variables */
     45               
    4646                . = ALIGN(8);
    4747                symbol_table = .;
    48                 *(symtab.*);            /* Symbol table, must be LAST symbol!*/
    49 
    50                 *(.bss);                /* uninitialized static variables */
    51 
     48                *(symtab.*);    /* Symbol table, must be LAST symbol!*/
     49               
     50                *(.bss);        /* uninitialized static variables */
     51               
    5252                kdata_end = .;
    5353        }
    54 
     54       
    5555        /DISCARD/ : {
    5656                *(*);
    5757        }
    5858       
    59 #ifdef CONFIG_SMP       
     59#ifdef CONFIG_SMP
    6060        _hardcoded_unmapped_size = (unmapped_ktext_end - unmapped_ktext_start) + (unmapped_kdata_end - unmapped_kdata_start);
    6161        ap_boot = unmapped_ap_boot - BOOT_OFFSET + AP_BOOT_OFFSET;
    6262        ap_gdtr = unmapped_ap_gdtr - BOOT_OFFSET + AP_BOOT_OFFSET;
    6363        protected_ap_gdtr = PA2KA(ap_gdtr);
    64 
    6564#endif /* CONFIG_SMP */
    66 
     65       
    6766}

  • kernel/arch/amd64/include/arch.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup amd64   
     29/** @addtogroup amd64
    3030 * @{
    3131 */

  • kernel/arch/amd64/include/asm.h

    r24a2517 rc621f4aa  
    3737
    3838#include <config.h>
    39 #include <arch/types.h>
    4039#include <typedefs.h>
    41 
    42 extern void asm_delay_loop(uint32_t t);
    43 extern void asm_fake_loop(uint32_t t);
     40#include <arch/cpu.h>
     41#include <trace.h>
    4442
    4543/** Return base address of current stack.
    … …  
    5048 *
    5149 */
    52 static inline uintptr_t get_stack_base(void)
     50NO_TRACE static inline uintptr_t get_stack_base(void)
    5351{
    5452        uintptr_t v;
    … …  
    5755                "andq %%rsp, %[v]\n"
    5856                : [v] "=r" (v)
    59                 : "0" (~((uint64_t) STACK_SIZE-1))
     57                : "0" (~((uint64_t) STACK_SIZE - 1))
    6058        );
    6159       
    … …  
    6361}
    6462
    65 static inline void cpu_sleep(void)
    66 {
    67         asm volatile ("hlt\n");
    68 }
    69 
    70 static inline void __attribute__((noreturn)) cpu_halt(void)
     63NO_TRACE static inline void cpu_sleep(void)
     64{
     65        asm volatile (
     66                "hlt\n"
     67        );
     68}
     69
     70NO_TRACE static inline void __attribute__((noreturn)) cpu_halt(void)
    7171{
    7272        while (true) {
    … …  
    7777}
    7878
    79 
    8079/** Byte from port
    8180 *
    … …  
    8685 *
    8786 */
    88 static inline uint8_t pio_read_8(ioport8_t *port)
     87NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
    8988{
    9089        uint8_t val;
    … …  
    107106 *
    108107 */
    109 static inline uint16_t pio_read_16(ioport16_t *port)
     108NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
    110109{
    111110        uint16_t val;
    … …  
    128127 *
    129128 */
    130 static inline uint32_t pio_read_32(ioport32_t *port)
     129NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
    131130{
    132131        uint32_t val;
    … …  
    149148 *
    150149 */
    151 static inline void pio_write_8(ioport8_t *port, uint8_t val)
     150NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val)
    152151{
    153152        asm volatile (
    154153                "outb %b[val], %w[port]\n"
    155                 :: [val] "a" (val), [port] "d" (port)
     154                :: [val] "a" (val),
     155                   [port] "d" (port)
    156156        );
    157157}
    … …  
    165165 *
    166166 */
    167 static inline void pio_write_16(ioport16_t *port, uint16_t val)
     167NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val)
    168168{
    169169        asm volatile (
    170170                "outw %w[val], %w[port]\n"
    171                 :: [val] "a" (val), [port] "d" (port)
     171                :: [val] "a" (val),
     172                   [port] "d" (port)
    172173        );
    173174}
    … …  
    181182 *
    182183 */
    183 static inline void pio_write_32(ioport32_t *port, uint32_t val)
     184NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val)
    184185{
    185186        asm volatile (
    186187                "outl %[val], %w[port]\n"
    187                 :: [val] "a" (val), [port] "d" (port)
     188                :: [val] "a" (val),
     189                   [port] "d" (port)
    188190        );
    189191}
    190192
    191193/** Swap Hidden part of GS register with visible one */
    192 static inline void swapgs(void)
    193 {
    194         asm volatile("swapgs");
     194NO_TRACE static inline void swapgs(void)
     195{
     196        asm volatile (
     197                "swapgs"
     198        );
    195199}
    196200
    … …  
    203207 *
    204208 */
    205 static inline ipl_t interrupts_enable(void) {
     209NO_TRACE static inline ipl_t interrupts_enable(void) {
    206210        ipl_t v;
    207211       
    … …  
    224228 *
    225229 */
    226 static inline ipl_t interrupts_disable(void) {
     230NO_TRACE static inline ipl_t interrupts_disable(void) {
    227231        ipl_t v;
    228232       
    … …  
    244248 *
    245249 */
    246 static inline void interrupts_restore(ipl_t ipl) {
     250NO_TRACE static inline void interrupts_restore(ipl_t ipl) {
    247251        asm volatile (
    248252                "pushq %[ipl]\n"
    … …  
    259263 *
    260264 */
    261 static inline ipl_t interrupts_read(void) {
     265NO_TRACE static inline ipl_t interrupts_read(void) {
    262266        ipl_t v;
    263267       
    … …  
    271275}
    272276
     277/** Check interrupts state.
     278 *
     279 * @return True if interrupts are disabled.
     280 *
     281 */
     282NO_TRACE static inline bool interrupts_disabled(void)
     283{
     284        ipl_t v;
     285       
     286        asm volatile (
     287                "pushfq\n"
     288                "popq %[v]\n"
     289                : [v] "=r" (v)
     290        );
     291       
     292        return ((v & RFLAGS_IF) == 0);
     293}
     294
    273295/** Write to MSR */
    274 static inline void write_msr(uint32_t msr, uint64_t value)
     296NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value)
    275297{
    276298        asm volatile (
    … …  
    282304}
    283305
    284 static inline unative_t read_msr(uint32_t msr)
     306NO_TRACE static inline unative_t read_msr(uint32_t msr)
    285307{
    286308        uint32_t ax, dx;
    … …  
    295317}
    296318
    297 
    298319/** Enable local APIC
    299320 *
    … …  
    301322 *
    302323 */
    303 static inline void enable_l_apic_in_msr()
     324NO_TRACE static inline void enable_l_apic_in_msr()
    304325{
    305326        asm volatile (
    … …  
    309330                "orl $(0xfee00000),%%eax\n"
    310331                "wrmsr\n"
    311                 ::: "%eax","%ecx","%edx"
    312         );
    313 }
    314 
    315 static inline uintptr_t * get_ip()
    316 {
    317         uintptr_t *ip;
    318        
    319         asm volatile (
    320                 "mov %%rip, %[ip]"
    321                 : [ip] "=r" (ip)
    322         );
    323        
    324         return ip;
     332                ::: "%eax", "%ecx", "%edx"
     333        );
    325334}
    326335
    … …  
    330339 *
    331340 */
    332 static inline void invlpg(uintptr_t addr)
     341NO_TRACE static inline void invlpg(uintptr_t addr)
    333342{
    334343        asm volatile (
    … …  
    343352 *
    344353 */
    345 static inline void gdtr_load(ptr_16_64_t *gdtr_reg)
     354NO_TRACE static inline void gdtr_load(ptr_16_64_t *gdtr_reg)
    346355{
    347356        asm volatile (
    … …  
    356365 *
    357366 */
    358 static inline void gdtr_store(ptr_16_64_t *gdtr_reg)
     367NO_TRACE static inline void gdtr_store(ptr_16_64_t *gdtr_reg)
    359368{
    360369        asm volatile (
    … …  
    369378 *
    370379 */
    371 static inline void idtr_load(ptr_16_64_t *idtr_reg)
     380NO_TRACE static inline void idtr_load(ptr_16_64_t *idtr_reg)
    372381{
    373382        asm volatile (
    … …  
    381390 *
    382391 */
    383 static inline void tr_load(uint16_t sel)
     392NO_TRACE static inline void tr_load(uint16_t sel)
    384393{
    385394        asm volatile (
    … …  
    389398}
    390399
    391 #define GEN_READ_REG(reg) static inline unative_t read_ ##reg (void) \
     400#define GEN_READ_REG(reg) NO_TRACE static inline unative_t read_ ##reg (void) \
    392401        { \
    393402                unative_t res; \
    … …  
    399408        }
    400409
    401 #define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \
     410#define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg (unative_t regn) \
    402411        { \
    403412                asm volatile ( \
    … …  
    426435GEN_WRITE_REG(dr7)
    427436
    428 extern size_t interrupt_handler_size;
    429 extern void interrupt_handlers(void);
     437extern void asm_delay_loop(uint32_t);
     438extern void asm_fake_loop(uint32_t);
     439
     440extern uintptr_t int_0;
     441extern uintptr_t int_1;
     442extern uintptr_t int_2;
     443extern uintptr_t int_3;
     444extern uintptr_t int_4;
     445extern uintptr_t int_5;
     446extern uintptr_t int_6;
     447extern uintptr_t int_7;
     448extern uintptr_t int_8;
     449extern uintptr_t int_9;
     450extern uintptr_t int_10;
     451extern uintptr_t int_11;
     452extern uintptr_t int_12;
     453extern uintptr_t int_13;
     454extern uintptr_t int_14;
     455extern uintptr_t int_15;
     456extern uintptr_t int_16;
     457extern uintptr_t int_17;
     458extern uintptr_t int_18;
     459extern uintptr_t int_19;
     460extern uintptr_t int_20;
     461extern uintptr_t int_21;
     462extern uintptr_t int_22;
     463extern uintptr_t int_23;
     464extern uintptr_t int_24;
     465extern uintptr_t int_25;
     466extern uintptr_t int_26;
     467extern uintptr_t int_27;
     468extern uintptr_t int_28;
     469extern uintptr_t int_29;
     470extern uintptr_t int_30;
     471extern uintptr_t int_31;
     472extern uintptr_t int_32;
     473extern uintptr_t int_33;
     474extern uintptr_t int_34;
     475extern uintptr_t int_35;
     476extern uintptr_t int_36;
     477extern uintptr_t int_37;
     478extern uintptr_t int_38;
     479extern uintptr_t int_39;
     480extern uintptr_t int_40;
     481extern uintptr_t int_41;
     482extern uintptr_t int_42;
     483extern uintptr_t int_43;
     484extern uintptr_t int_44;
     485extern uintptr_t int_45;
     486extern uintptr_t int_46;
     487extern uintptr_t int_47;
     488extern uintptr_t int_48;
     489extern uintptr_t int_49;
     490extern uintptr_t int_50;
     491extern uintptr_t int_51;
     492extern uintptr_t int_52;
     493extern uintptr_t int_53;
     494extern uintptr_t int_54;
     495extern uintptr_t int_55;
     496extern uintptr_t int_56;
     497extern uintptr_t int_57;
     498extern uintptr_t int_58;
     499extern uintptr_t int_59;
     500extern uintptr_t int_60;
     501extern uintptr_t int_61;
     502extern uintptr_t int_62;
     503extern uintptr_t int_63;
    430504
    431505#endif

  • kernel/arch/amd64/include/atomic.h

    r24a2517 rc621f4aa  
    3636#define KERN_amd64_ATOMIC_H_
    3737
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939#include <arch/barrier.h>
    4040#include <preemption.h>
     41#include <trace.h>
    4142
    42 static inline void atomic_inc(atomic_t *val) {
     43NO_TRACE static inline void atomic_inc(atomic_t *val)
     44{
    4345#ifdef CONFIG_SMP
    4446        asm volatile (
    … …  
    5456}
    5557
    56 static inline void atomic_dec(atomic_t *val) {
     58NO_TRACE static inline void atomic_dec(atomic_t *val)
     59{
    5760#ifdef CONFIG_SMP
    5861        asm volatile (
    … …  
    6871}
    6972
    70 static inline long atomic_postinc(atomic_t *val)
     73NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val)
    7174{
    72         long r = 1;
     75        atomic_count_t r = 1;
    7376       
    7477        asm volatile (
    7578                "lock xaddq %[r], %[count]\n"
    76                 : [count] "+m" (val->count), [r] "+r" (r)
     79                : [count] "+m" (val->count),
     80                  [r] "+r" (r)
    7781        );
    7882       
    … …  
    8084}
    8185
    82 static inline long atomic_postdec(atomic_t *val)
     86NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val)
    8387{
    84         long r = -1;
     88        atomic_count_t r = -1;
    8589       
    8690        asm volatile (
    8791                "lock xaddq %[r], %[count]\n"
    88                 : [count] "+m" (val->count), [r] "+r" (r)
     92                : [count] "+m" (val->count),
     93                  [r] "+r" (r)
    8994        );
    9095       
    … …  
    95100#define atomic_predec(val)  (atomic_postdec(val) - 1)
    96101
    97 static inline uint64_t test_and_set(atomic_t *val) {
    98         uint64_t v;
     102NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val)
     103{
     104        atomic_count_t v = 1;
    99105       
    100106        asm volatile (
    101                 "movq $1, %[v]\n"
    102107                "xchgq %[v], %[count]\n"
    103                 : [v] "=r" (v), [count] "+m" (val->count)
     108                : [v] "+r" (v),
     109                  [count] "+m" (val->count)
    104110        );
    105111       
    … …  
    107113}
    108114
    109 
    110115/** amd64 specific fast spinlock */
    111 static inline void atomic_lock_arch(atomic_t *val)
     116NO_TRACE static inline void atomic_lock_arch(atomic_t *val)
    112117{
    113         uint64_t tmp;
     118        atomic_count_t tmp;
    114119       
    115120        preemption_disable();
    116121        asm volatile (
    117122                "0:\n"
    118                 "pause\n"
    119                 "mov %[count], %[tmp]\n"
    120                 "testq %[tmp], %[tmp]\n"
    121                 "jnz 0b\n"       /* lightweight looping on locked spinlock */
     123                "       pause\n"
     124                "       mov %[count], %[tmp]\n"
     125                "       testq %[tmp], %[tmp]\n"
     126                "       jnz 0b\n"       /* lightweight looping on locked spinlock */
    122127               
    123                 "incq %[tmp]\n"  /* now use the atomic operation */
    124                 "xchgq %[count], %[tmp]\n"
    125                 "testq %[tmp], %[tmp]\n"
    126                 "jnz 0b\n"
    127                 : [count] "+m" (val->count), [tmp] "=&r" (tmp)
     128                "       incq %[tmp]\n"  /* now use the atomic operation */
     129                "       xchgq %[count], %[tmp]\n"
     130                "       testq %[tmp], %[tmp]\n"
     131                "       jnz 0b\n"
     132                : [count] "+m" (val->count),
     133                  [tmp] "=&r" (tmp)
    128134        );
     135       
    129136        /*
    130137         * Prevent critical section code from bleeding out this way up.

  • kernel/arch/amd64/include/boot/boot.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup amd64   
     29/** @addtogroup amd64
    3030 * @{
    3131 */
    … …  
    3636#define KERN_amd64_BOOT_H_
    3737
    38 #define BOOT_OFFSET             0x108000
    39 #define AP_BOOT_OFFSET          0x8000
    40 #define BOOT_STACK_SIZE         0x400
     38#define BOOT_OFFSET      0x108000
     39#define AP_BOOT_OFFSET   0x008000
     40#define BOOT_STACK_SIZE  0x000400
    4141
    42 #define MULTIBOOT_HEADER_MAGIC  0x1BADB002
    43 #define MULTIBOOT_HEADER_FLAGS  0x00010003
     42#define MULTIBOOT_HEADER_MAGIC  0x1BADB002
     43#define MULTIBOOT_HEADER_FLAGS  0x00010003
    4444
    4545#ifndef __ASM__

  • kernel/arch/amd64/include/context.h

    r24a2517 rc621f4aa  
    3838#ifdef KERNEL
    3939
    40 #include <arch/types.h>
     40#include <typedefs.h>
    4141
    4242/* According to ABI the stack MUST be aligned on
    … …  
    5959 */
    6060typedef struct {
    61     uintptr_t sp;
    62     uintptr_t pc;
    63    
    64     uint64_t rbx;
    65     uint64_t rbp;
    66 
    67     uint64_t r12;
    68     uint64_t r13;
    69     uint64_t r14;
    70     uint64_t r15;
    71 
    72     ipl_t ipl;
     61        uintptr_t sp;
     62        uintptr_t pc;
     63       
     64        uint64_t rbx;
     65        uint64_t rbp;
     66       
     67        uint64_t r12;
     68        uint64_t r13;
     69        uint64_t r14;
     70        uint64_t r15;
     71       
     72        ipl_t ipl;
    7373} __attribute__ ((packed)) context_t;
    7474

  • kernel/arch/amd64/include/cpu.h

    r24a2517 rc621f4aa  
    4545#define RFLAGS_DF       (1 << 10)
    4646#define RFLAGS_OF       (1 << 11)
     47#define RFLAGS_NT       (1 << 14)
    4748#define RFLAGS_RF       (1 << 16)
    4849

  • kernel/arch/amd64/include/cpuid.h

    r24a2517 rc621f4aa  
    4848#ifndef __ASM__
    4949
    50 #include <arch/types.h>
     50#include <typedefs.h>
    5151
    5252typedef struct {

  • kernel/arch/amd64/include/cycle.h

    r24a2517 rc621f4aa  
    3636#define KERN_amd64_CYCLE_H_
    3737
    38 extern uint64_t get_cycle(void);
     38#include <trace.h>
     39
     40NO_TRACE static inline uint64_t get_cycle(void)
     41{
     42        uint32_t lower;
     43        uint32_t upper;
     44       
     45        asm volatile (
     46                "rdtsc\n"
     47                : "=a" (lower),
     48                  "=d" (upper)
     49        );
     50       
     51        return ((uint64_t) lower) | (((uint64_t) upper) << 32);
     52}
    3953
    4054#endif

  • kernel/arch/amd64/include/ddi/ddi.h

    r24a2517 rc621f4aa  
    3333/**
    3434 * @file
    35  * @brief       amd64 specific DDI declarations and macros.
     35 * @brief amd64 specific DDI declarations and macros.
    3636 */
    3737

  • kernel/arch/amd64/include/debugger.h

    r24a2517 rc621f4aa  
    3636#define KERN_amd64_DEBUGGER_H_
    3737
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939
    40 #define BKPOINTS_MAX 4
     40#define BKPOINTS_MAX  4
    4141
    4242/* Flags that are passed to breakpoint_add function */
    43 #define BKPOINT_INSTR        0x1
    44 #define BKPOINT_WRITE        0x2
    45 #define BKPOINT_READ_WRITE   0x4
     43#define BKPOINT_INSTR       0x1
     44#define BKPOINT_WRITE       0x2
     45#define BKPOINT_READ_WRITE  0x4
    4646
    47 #define BKPOINT_CHECK_ZERO   0x8
     47#define BKPOINT_CHECK_ZERO  0x8
    4848
    4949
    5050extern void debugger_init(void);
    51 extern int breakpoint_add(const void *where, const int flags, int curidx);
    52 extern void breakpoint_del(int slot);
     51extern int breakpoint_add(const void *, const unsigned int, int);
     52extern void breakpoint_del(int);
    5353
    5454#endif

  • kernel/arch/amd64/include/elf.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup amd64   
     29/** @addtogroup amd64
    3030 * @{
    3131 */
    … …  
    3636#define KERN_amd64_ELF_H_
    3737
    38 #define ELF_MACHINE             EM_X86_64
    39 #define ELF_DATA_ENCODING       ELFDATA2LSB
    40 #define ELF_CLASS               ELFCLASS64
     38#define ELF_MACHINE        EM_X86_64
     39#define ELF_DATA_ENCODING  ELFDATA2LSB
     40#define ELF_CLASS          ELFCLASS64
    4141
    4242#endif

  • kernel/arch/amd64/include/faddr.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup amd64   
     29/** @addtogroup amd64
    3030 * @{
    3131 */
    … …  
    3636#define KERN_amd64_FADDR_H_
    3737
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939
    40 #define FADDR(fptr)             ((uintptr_t) (fptr))
     40#define FADDR(fptr)  ((uintptr_t) (fptr))
    4141
    4242#endif

  • kernel/arch/amd64/include/interrupt.h

    r24a2517 rc621f4aa  
    3636#define KERN_amd64_INTERRUPT_H_
    3737
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939#include <arch/pm.h>
     40#include <trace.h>
    4041
    41 #define IVT_ITEMS               IDT_ITEMS
    42 #define IVT_FIRST               0
     42#define IVT_ITEMS  IDT_ITEMS
     43#define IVT_FIRST  0
    4344
    44 #define EXC_COUNT               32
    45 #define IRQ_COUNT               16
     45#define EXC_COUNT  32
     46#define IRQ_COUNT  16
    4647
    47 #define IVT_EXCBASE             0
    48 #define IVT_IRQBASE             (IVT_EXCBASE + EXC_COUNT)
    49 #define IVT_FREEBASE            (IVT_IRQBASE + IRQ_COUNT)
     48#define IVT_EXCBASE   0
     49#define IVT_IRQBASE   (IVT_EXCBASE + EXC_COUNT)
     50#define IVT_FREEBASE  (IVT_IRQBASE + IRQ_COUNT)
    5051
    51 #define IRQ_CLK                 0
    52 #define IRQ_KBD                 1
    53 #define IRQ_PIC1                2
    54 #define IRQ_PIC_SPUR            7
    55 #define IRQ_MOUSE               12
     52#define IRQ_CLK       0
     53#define IRQ_KBD       1
     54#define IRQ_PIC1      2
     55#define IRQ_PIC_SPUR  7
     56#define IRQ_MOUSE     12
     57#define IRQ_DP8390    9
    5658
    57 /* this one must have four least significant bits set to ones */
    58 #define VECTOR_APIC_SPUR        (IVT_ITEMS - 1)
     59/* This one must have four least significant bits set to ones */
     60#define VECTOR_APIC_SPUR  (IVT_ITEMS - 1)
    5961
    6062#if (((VECTOR_APIC_SPUR + 1) % 16) || VECTOR_APIC_SPUR >= IVT_ITEMS)
    … …  
    6264#endif
    6365
    64 #define VECTOR_DEBUG                    1
    65 #define VECTOR_CLK                      (IVT_IRQBASE + IRQ_CLK)
    66 #define VECTOR_PIC_SPUR                 (IVT_IRQBASE + IRQ_PIC_SPUR)
    67 #define VECTOR_SYSCALL                  IVT_FREEBASE
    68 #define VECTOR_TLB_SHOOTDOWN_IPI        (IVT_FREEBASE + 1)
    69 #define VECTOR_DEBUG_IPI                (IVT_FREEBASE + 2)
     66#define VECTOR_DEBUG              1
     67#define VECTOR_CLK                (IVT_IRQBASE + IRQ_CLK)
     68#define VECTOR_PIC_SPUR           (IVT_IRQBASE + IRQ_PIC_SPUR)
     69#define VECTOR_SYSCALL            IVT_FREEBASE
     70#define VECTOR_TLB_SHOOTDOWN_IPI  (IVT_FREEBASE + 1)
     71#define VECTOR_DEBUG_IPI          (IVT_FREEBASE + 2)
    7072
    7173/** This is passed to interrupt handlers */
    7274typedef struct istate {
    7375        uint64_t rax;
     76        uint64_t rbx;
    7477        uint64_t rcx;
    7578        uint64_t rdx;
    7679        uint64_t rsi;
    7780        uint64_t rdi;
     81        uint64_t rbp;
    7882        uint64_t r8;
    7983        uint64_t r9;
    8084        uint64_t r10;
    8185        uint64_t r11;
    82         uint64_t rbp;
    83         uint64_t error_word;
     86        uint64_t r12;
     87        uint64_t r13;
     88        uint64_t r14;
     89        uint64_t r15;
     90        uint64_t alignment;     /* align rbp_frame on multiple of 16 */
     91        uint64_t rbp_frame;     /* imitation of frame pointer linkage */
     92        uint64_t rip_frame;     /* imitation of return address linkage */
     93        uint64_t error_word;    /* real or fake error word */
    8494        uint64_t rip;
    8595        uint64_t cs;
    8696        uint64_t rflags;
    87         uint64_t stack[]; /* Additional data on stack */
     97        uint64_t rsp;           /* only if istate_t is from uspace */
     98        uint64_t ss;            /* only if istate_t is from uspace */
    8899} istate_t;
    89100
    90101/** Return true if exception happened while in userspace */
    91 static inline int istate_from_uspace(istate_t *istate)
     102NO_TRACE static inline int istate_from_uspace(istate_t *istate)
    92103{
    93104        return !(istate->rip & 0x8000000000000000);
    94105}
    95106
    96 static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
     107NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
     108    uintptr_t retaddr)
    97109{
    98110        istate->rip = retaddr;
    99111}
    100 static inline unative_t istate_get_pc(istate_t *istate)
     112
     113NO_TRACE static inline unative_t istate_get_pc(istate_t *istate)
    101114{
    102115        return istate->rip;
    103116}
    104 static inline unative_t istate_get_fp(istate_t *istate)
     117
     118NO_TRACE static inline unative_t istate_get_fp(istate_t *istate)
    105119{
    106120        return istate->rbp;
    107121}
    108122
    109 extern void (* disable_irqs_function)(uint16_t irqmask);
    110 extern void (* enable_irqs_function)(uint16_t irqmask);
     123extern void (* disable_irqs_function)(uint16_t);
     124extern void (* enable_irqs_function)(uint16_t);
    111125extern void (* eoi_function)(void);
    112126
    113 extern void decode_istate(int n, istate_t *istate);
    114127extern void interrupt_init(void);
    115 extern void trap_virtual_enable_irqs(uint16_t irqmask);
    116 extern void trap_virtual_disable_irqs(uint16_t irqmask);
    117 /* AMD64 - specific page handler */
    118 extern void ident_page_fault(int n, istate_t *istate);
     128extern void trap_virtual_enable_irqs(uint16_t);
     129extern void trap_virtual_disable_irqs(uint16_t);
    119130
    120131#endif

  • kernel/arch/amd64/include/memstr.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup amd64   
     29/** @addtogroup amd64
    3030 * @{
    3131 */
    … …  
    3838#define memcpy(dst, src, cnt)  __builtin_memcpy((dst), (src), (cnt))
    3939
    40 extern void memsetw(void *dst, size_t cnt, uint16_t x);
    41 extern void memsetb(void *dst, size_t cnt, uint8_t x);
    42 
    43 extern int memcmp(const void *a, const void *b, size_t cnt);
     40extern void memsetw(void *, size_t, uint16_t);
     41extern void memsetb(void *, size_t, uint8_t);
    4442
    4543#endif

  • kernel/arch/amd64/include/mm/as.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup amd64mm 
     29/** @addtogroup amd64mm
    3030 * @{
    3131 */
    … …  
    3636#define KERN_amd64_AS_H_
    3737
    38 #define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH      0
     38#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
    3939
    40 #define KERNEL_ADDRESS_SPACE_START_ARCH         (unsigned long) 0xffff800000000000
    41 #define KERNEL_ADDRESS_SPACE_END_ARCH           (unsigned long) 0xffffffff80000000
    42 #define USER_ADDRESS_SPACE_START_ARCH           (unsigned long) 0x0000000000000000
    43 #define USER_ADDRESS_SPACE_END_ARCH             (unsigned long) 0x00007fffffffffff
     40#define KERNEL_ADDRESS_SPACE_START_ARCH  (unsigned long) 0xffff800000000000
     41#define KERNEL_ADDRESS_SPACE_END_ARCH    (unsigned long) 0xffffffffffffffff
    4442
    45 #define USTACK_ADDRESS_ARCH     (USER_ADDRESS_SPACE_END_ARCH-(PAGE_SIZE-1))
     43#define USER_ADDRESS_SPACE_START_ARCH    (unsigned long) 0x0000000000000000
     44#define USER_ADDRESS_SPACE_END_ARCH      (unsigned long) 0x00007fffffffffff
    4645
    47 #define as_constructor_arch(as, flags)          (as != as)
    48 #define as_destructor_arch(as)                  (as != as)
    49 #define as_create_arch(as, flags)               (as != as)
     46#define USTACK_ADDRESS_ARCH  (USER_ADDRESS_SPACE_END_ARCH - (PAGE_SIZE - 1))
     47
     48#define as_constructor_arch(as, flags)  (as != as)
     49#define as_destructor_arch(as)          (as != as)
     50#define as_create_arch(as, flags)       (as != as)
     51
    5052#define as_install_arch(as)
    5153#define as_deinstall_arch(as)

  • kernel/arch/amd64/include/mm/frame.h

    r24a2517 rc621f4aa  
    3636#define KERN_amd64_FRAME_H_
    3737
    38 #ifndef __ASM__
    39 #include <arch/types.h>
    40 #endif /* __ASM__ */
    41 
    4238#define FRAME_WIDTH  12  /* 4K */
    4339#define FRAME_SIZE   (1 << FRAME_WIDTH)
    4440
     41#ifdef KERNEL
    4542#ifndef __ASM__
     43
     44#include <typedefs.h>
     45
    4646extern uintptr_t last_frame;
    4747extern void frame_arch_init(void);
    4848extern void physmem_print(void);
     49
    4950#endif /* __ASM__ */
     51#endif /* KERNEL */
    5052
    5153#endif

  • kernel/arch/amd64/include/mm/page.h

    r24a2517 rc621f4aa  
    3535/** Paging on AMD64
    3636 *
    37  * The space is divided in positive numbers - userspace and
    38  * negative numbers - kernel space. The 'negative' space starting
    39  * with 0xffff800000000000 and ending with 0xffffffff80000000
    40  * (-2GB) is identically mapped physical memory. The area
    41  * (0xffffffff80000000 ... 0xffffffffffffffff is again identically
    42  * mapped first 2GB.
    43  *
    44  * ATTENTION - PA2KA(KA2PA(x)) != x if 'x' is in kernel
     37 * The space is divided in positive numbers (uspace) and
     38 * negative numbers (kernel). The 'negative' space starting
     39 * with 0xffff800000000000 and ending with 0xffffffffffffffff
     40 * is identically mapped physical memory.
     41 *
    4542 */
    4643
    … …  
    4946
    5047#include <arch/mm/frame.h>
    51 
    52 #define PAGE_WIDTH      FRAME_WIDTH
    53 #define PAGE_SIZE       FRAME_SIZE
     48#include <trace.h>
     49
     50#define PAGE_WIDTH  FRAME_WIDTH
     51#define PAGE_SIZE   FRAME_SIZE
    5452
    5553#ifdef KERNEL
    5654
    5755#ifndef __ASM__
    58 #       include <mm/mm.h>
    59 #       include <arch/types.h>
    60 #       include <arch/interrupt.h>
    61 
    62 static inline uintptr_t ka2pa(uintptr_t x)
    63 {
    64         if (x > 0xffffffff80000000)
    65                 return x - 0xffffffff80000000;
    66         else
    67                 return x - 0xffff800000000000;
    68 }
    69 
    70 #       define KA2PA(x)         ka2pa((uintptr_t) x)
    71 #       define PA2KA_CODE(x)    (((uintptr_t) (x)) + 0xffffffff80000000)
    72 #       define PA2KA(x)         (((uintptr_t) (x)) + 0xffff800000000000)
    73 #else
    74 #       define KA2PA(x)         ((x) - 0xffffffff80000000)
    75 #       define PA2KA(x)         ((x) + 0xffffffff80000000)
    76 #endif
     56
     57#define KA2PA(x)  (((uintptr_t) (x)) - 0xffff800000000000)
     58#define PA2KA(x)  (((uintptr_t) (x)) + 0xffff800000000000)
     59
     60#else /* __ASM__ */
     61
     62#define KA2PA(x)  ((x) - 0xffff800000000000)
     63#define PA2KA(x)  ((x) + 0xffff800000000000)
     64
     65#endif /* __ASM__ */
    7766
    7867/* Number of entries in each level. */
    79 #define PTL0_ENTRIES_ARCH       512
    80 #define PTL1_ENTRIES_ARCH       512
    81 #define PTL2_ENTRIES_ARCH       512
    82 #define PTL3_ENTRIES_ARCH       512
     68#define PTL0_ENTRIES_ARCH  512
     69#define PTL1_ENTRIES_ARCH  512
     70#define PTL2_ENTRIES_ARCH  512
     71#define PTL3_ENTRIES_ARCH  512
    8372
    8473/* Page table sizes for each level. */
    85 #define PTL0_SIZE_ARCH          ONE_FRAME
    86 #define PTL1_SIZE_ARCH          ONE_FRAME
    87 #define PTL2_SIZE_ARCH          ONE_FRAME
    88 #define PTL3_SIZE_ARCH          ONE_FRAME
     74#define PTL0_SIZE_ARCH  ONE_FRAME
     75#define PTL1_SIZE_ARCH  ONE_FRAME
     76#define PTL2_SIZE_ARCH  ONE_FRAME
     77#define PTL3_SIZE_ARCH  ONE_FRAME
    8978
    9079/* Macros calculating indices into page tables in each level. */
    91 #define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 39) & 0x1ff)
    92 #define PTL1_INDEX_ARCH(vaddr)  (((vaddr) >> 30) & 0x1ff)
    93 #define PTL2_INDEX_ARCH(vaddr)  (((vaddr) >> 21) & 0x1ff)
    94 #define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x1ff)
     80#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 39) & 0x1ff)
     81#define PTL1_INDEX_ARCH(vaddr)  (((vaddr) >> 30) & 0x1ff)
     82#define PTL2_INDEX_ARCH(vaddr)  (((vaddr) >> 21) & 0x1ff)
     83#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x1ff)
    9584
    9685/* Get PTE address accessors for each level. */
    … …  
    156145#ifndef __ASM__
    157146
     147#include <mm/mm.h>
     148#include <arch/interrupt.h>
     149#include <typedefs.h>
     150
    158151/* Page fault error codes. */
    159152
    … …  
    161154 * page.
    162155 */
    163 #define PFERR_CODE_P            (1 << 0) 
     156#define PFERR_CODE_P  (1 << 0)
    164157
    165158/** When bit on this position is 1, the page fault was caused by a write. */
    166 #define PFERR_CODE_RW           (1 << 1)
     159#define PFERR_CODE_RW  (1 << 1)
    167160
    168161/** When bit on this position is 1, the page fault was caused in user mode. */
    169 #define PFERR_CODE_US           (1 << 2)
     162#define PFERR_CODE_US  (1 << 2)
    170163
    171164/** When bit on this position is 1, a reserved bit was set in page directory. */
    172 #define PFERR_CODE_RSVD         (1 << 3)
     165#define PFERR_CODE_RSVD  (1 << 3)
    173166
    174167/** When bit on this position os 1, the page fault was caused during instruction
    175168 * fecth.
    176169 */
    177 #define PFERR_CODE_ID           (1 << 4)
     170#define PFERR_CODE_ID  (1 << 4)
    178171
    179172/** Page Table Entry. */
    180173typedef struct {
    181         unsigned present : 1;
    182         unsigned writeable : 1;
    183         unsigned uaccessible : 1;
    184         unsigned page_write_through : 1;
    185         unsigned page_cache_disable : 1;
    186         unsigned accessed : 1;
    187         unsigned dirty : 1;
    188         unsigned unused: 1;
    189         unsigned global : 1;
    190         unsigned soft_valid : 1;                /**< Valid content even if present bit is cleared. */
    191         unsigned avl : 2;
    192         unsigned addr_12_31 : 30;
    193         unsigned addr_32_51 : 21;
    194         unsigned no_execute : 1;
     174        unsigned int present : 1;
     175        unsigned int writeable : 1;
     176        unsigned int uaccessible : 1;
     177        unsigned int page_write_through : 1;
     178        unsigned int page_cache_disable : 1;
     179        unsigned int accessed : 1;
     180        unsigned int dirty : 1;
     181        unsigned int unused: 1;
     182        unsigned int global : 1;
     183        unsigned int soft_valid : 1;  /**< Valid content even if present bit is cleared. */
     184        unsigned int avl : 2;
     185        unsigned int addr_12_31 : 30;
     186        unsigned int addr_32_51 : 21;
     187        unsigned int no_execute : 1;
    195188} __attribute__ ((packed)) pte_t;
    196189
    197 static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
     190NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
    198191{
    199192        pte_t *p = &pt[i];
    … …  
    208201}
    209202
    210 static inline void set_pt_addr(pte_t *pt, size_t i, uintptr_t a)
     203NO_TRACE static inline void set_pt_addr(pte_t *pt, size_t i, uintptr_t a)
    211204{
    212205        pte_t *p = &pt[i];
    213 
     206       
    214207        p->addr_12_31 = (a >> 12) & 0xfffff;
    215208        p->addr_32_51 = a >> 32;
    216209}
    217210
    218 static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
     211NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
    219212{
    220213        pte_t *p = &pt[i];
    … …  
    234227
    235228extern void page_arch_init(void);
    236 extern void page_fault(int n, istate_t *istate);
     229extern void page_fault(unsigned int, istate_t *);
    237230
    238231#endif /* __ASM__ */

  • kernel/arch/amd64/include/mm/ptl.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup amd64mm 
     29/** @addtogroup amd64mm
    3030 * @{
    3131 */
    … …  
    3636#define KERN_amd64_PTL_H_
    3737
    38 #define PTL_NO_EXEC       (1<<63)
    39 #define PTL_ACCESSED      (1<<5)
    40 #define PTL_CACHE_DISABLE (1<<4)
    41 #define PTL_CACHE_THROUGH (1<<3)
    42 #define PTL_USER          (1<<2)
    43 #define PTL_WRITABLE      (1<<1)
    44 #define PTL_PRESENT       1
    45 #define PTL_2MB_PAGE      (1<<7)
     38#define PTL_NO_EXEC        (1 << 63)
     39#define PTL_ACCESSED       (1 << 5)
     40#define PTL_CACHE_DISABLE  (1 << 4)
     41#define PTL_CACHE_THROUGH  (1 << 3)
     42#define PTL_USER           (1 << 2)
     43#define PTL_WRITABLE       (1 << 1)
     44#define PTL_PRESENT        1
     45#define PTL_2MB_PAGE       (1 << 7)
    4646
    4747

  • kernel/arch/amd64/include/mm/tlb.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup amd64mm 
     29/** @addtogroup amd64mm
    3030 * @{
    3131 */

  • kernel/arch/amd64/include/pm.h

    r24a2517 rc621f4aa  
    3737
    3838#ifndef __ASM__
    39         #include <arch/types.h>
     39        #include <typedefs.h>
    4040        #include <arch/context.h>
    4141#endif
    … …  
    7171#define PL_USER    3
    7272
    73 #define AR_PRESENT   ( 1 << 7)
     73#define AR_PRESENT    (1 << 7)
    7474#define AR_DATA       (2 << 3)
    7575#define AR_CODE       (3 << 3)

  • kernel/arch/amd64/include/proc/task.h

    r24a2517 rc621f4aa  
    3636#define KERN_amd64_TASK_H_
    3737
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939#include <adt/bitmap.h>
    4040

  • kernel/arch/amd64/include/proc/thread.h

    r24a2517 rc621f4aa  
    3737
    3838/* CAUTION: keep these in sync with low level assembly code in syscall_entry */
    39 #define SYSCALL_USTACK_RSP      0
    40 #define SYSCALL_KSTACK_RSP      1
     39#define SYSCALL_USTACK_RSP  0
     40#define SYSCALL_KSTACK_RSP  1
    4141
    4242typedef struct {
    4343        unative_t tls;
    4444        /** User and kernel RSP for syscalls. */
    45         uint64_t syscall_rsp[2];       
     45        uint64_t syscall_rsp[2];
    4646} thread_arch_t;
    4747

  • kernel/arch/amd64/include/types.h

    r24a2517 rc621f4aa  
    3636#define KERN_amd64_TYPES_H_
    3737
    38 typedef signed char int8_t;
    39 typedef signed short int16_t;
    40 typedef signed int int32_t;
    41 typedef signed long long int64_t;
    42 
    43 typedef unsigned char uint8_t;
    44 typedef unsigned short uint16_t;
    45 typedef unsigned int uint32_t;
    46 typedef unsigned long long uint64_t;
    47 
    4838typedef uint64_t size_t;
    4939
    … …  
    5545typedef uint64_t unative_t;
    5646typedef int64_t native_t;
     47typedef uint64_t atomic_count_t;
    5748
    5849typedef struct {
    5950} fncptr_t;
    6051
    61 /**< Formats for uintptr_t, size_t */
    62 #define PRIp "llx"
    63 #define PRIs "llu"
     52/* Formats for uintptr_t, size_t */
     53#define PRIp  "llx"
     54#define PRIs  "llu"
    6455
    65 /**< Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */
    66 #define PRId8 "d"
    67 #define PRId16 "d"
    68 #define PRId32 "d"
    69 #define PRId64 "lld"
    70 #define PRIdn "lld"
     56/* Formats for (u)int8_t, (u)int16_t, (u)int32_t, (u)int64_t and (u)native_t */
     57#define PRId8   "d"
     58#define PRId16  "d"
     59#define PRId32  "d"
     60#define PRId64  "lld"
     61#define PRIdn   "lld"
    7162
    72 #define PRIu8 "u"
    73 #define PRIu16 "u"
    74 #define PRIu32 "u"
    75 #define PRIu64 "llu"
    76 #define PRIun "llu"
     63#define PRIu8   "u"
     64#define PRIu16  "u"
     65#define PRIu32  "u"
     66#define PRIu64  "llu"
     67#define PRIun   "llu"
    7768
    78 #define PRIx8 "x"
    79 #define PRIx16 "x"
    80 #define PRIx32 "x"
    81 #define PRIx64 "llx"
    82 #define PRIxn "llx"
     69#define PRIx8   "x"
     70#define PRIx16  "x"
     71#define PRIx32  "x"
     72#define PRIx64  "llx"
     73#define PRIxn   "llx"
    8374
    8475#endif

  • kernel/arch/amd64/src/amd64.c

    r24a2517 rc621f4aa  
    3535#include <arch.h>
    3636
    37 #include <arch/types.h>
     37#include <typedefs.h>
    3838
    3939#include <config.h>
    … …  
    122122        /* Enable FPU */
    123123        cpu_setup_fpu();
    124 
     124       
    125125        /* Initialize segmentation */
    126126        pm_init();
    … …  
    132132        /* Disable alignment check */
    133133        clean_AM_flag();
    134 
     134       
    135135        if (config.cpu_active == 1) {
    136136                interrupt_init();
    … …  
    228228            (uintptr_t) I8042_BASE);
    229229#endif
     230       
     231        /*
     232         * This nasty hack should also go away ASAP.
     233         */
     234        trap_virtual_enable_irqs(1 << IRQ_DP8390);
     235        sysinfo_set_item_val("netif.dp8390.inr", NULL, IRQ_DP8390);
    230236}
    231237
    … …  
    254260        THREAD->arch.tls = addr;
    255261        write_msr(AMD_MSR_FS, addr);
     262       
    256263        return 0;
    257264}

  • kernel/arch/amd64/src/boot/boot.S

    r24a2517 rc621f4aa  
    1 #
    2 # Copyright (c) 2005 Ondrej Palkovsky
    3 # Copyright (c) 2006 Martin Decky
    4 # Copyright (c) 2008 Jakub Jermar
    5 # All rights reserved.
    6 #
    7 # Redistribution and use in source and binary forms, with or without
    8 # modification, are permitted provided that the following conditions
    9 # are met:
    10 #
    11 # - Redistributions of source code must retain the above copyright
    12 #   notice, this list of conditions and the following disclaimer.
    13 # - Redistributions in binary form must reproduce the above copyright
    14 #   notice, this list of conditions and the following disclaimer in the
    15 #   documentation and/or other materials provided with the distribution.
    16 # - The name of the author may not be used to endorse or promote products
    17 #   derived from this software without specific prior written permission.
    18 #
    19 # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
    20 # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
    21 # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
    22 # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
    23 # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    24 # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    25 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    26 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    27 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    28 # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    29 #
     1/*
     2 * Copyright (c) 2005 Ondrej Palkovsky
     3 * Copyright (c) 2006 Martin Decky
     4 * Copyright (c) 2008 Jakub Jermar
     5 * All rights reserved.
     6 *
     7 * Redistribution and use in source and binary forms, with or without
     8 * modification, are permitted provided that the following conditions
     9 * are met:
     10 *
     11 * - Redistributions of source code must retain the above copyright
     12 *   notice, this list of conditions and the following disclaimer.
     13 * - Redistributions in binary form must reproduce the above copyright
     14 *   notice, this list of conditions and the following disclaimer in the
     15 *   documentation and/or other materials provided with the distribution.
     16 * - The name of the author may not be used to endorse or promote products
     17 *   derived from this software without specific prior written permission.
     18 *
     19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     29 */
    3030
    3131#include <arch/boot/boot.h>
    3232#include <arch/boot/memmap.h>
    33 #include <arch/mm/page.h>       
     33#include <arch/mm/page.h>
    3434#include <arch/mm/ptl.h>
    3535#include <arch/pm.h>
    … …  
    3737#include <arch/cpuid.h>
    3838
    39 #define START_STACK     (BOOT_OFFSET - BOOT_STACK_SIZE)
     39#define START_STACK  (BOOT_OFFSET - BOOT_STACK_SIZE)
    4040
    4141.section K_TEXT_START, "ax"
    4242
    4343.code32
     44
     45.macro pm_error msg
     46        movl \msg, %esi
     47        jmp pm_error_halt
     48.endm
     49
     50.macro pm_status msg
     51#ifdef CONFIG_EGA
     52        pushl %esi
     53        movl \msg, %esi
     54        call pm_early_puts
     55        popl %esi
     56#endif
     57.endm
     58
     59.macro pm2_status msg
     60#ifndef CONFIG_FB
     61        pm_status \msg
     62#endif
     63.endm
     64
    4465.align 4
    4566.global multiboot_image_start
    … …  
    4768        .long MULTIBOOT_HEADER_MAGIC
    4869        .long MULTIBOOT_HEADER_FLAGS
    49         .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)  # checksum
     70        .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)  /* checksum */
    5071        .long multiboot_header
    5172        .long unmapped_ktext_start
    … …  
    5677multiboot_image_start:
    5778        cld
    58         movl $START_STACK, %esp             # initialize stack pointer
    59         lgdtl bootstrap_gdtr                # initialize Global Descriptor Table register
    60        
     79       
     80        /* Initialize stack pointer */
     81        movl $START_STACK, %esp
     82       
     83        /* Initialize Global Descriptor Table register */
     84        lgdtl bootstrap_gdtr
     85       
     86        /* Kernel data + stack */
    6187        movw $gdtselector(KDATA_DES), %cx
    6288        movw %cx, %es
    63         movw %cx, %ds                       # kernel data + stack
     89        movw %cx, %ds
    6490        movw %cx, %ss
    6591       
    66         #
    67         # Simics seems to remove hidden part of GS on entering user mode
    68         # when _visible_ part of GS does not point to user-mode segment.
    69         #
    70        
     92        /*
     93         * Simics seems to remove hidden part of GS on entering user mode
     94         * when _visible_ part of GS does not point to user-mode segment.
     95         */
    7196        movw $gdtselector(UDATA_DES), %cx
    7297        movw %cx, %fs
    … …  
    76101        multiboot_meeting_point:
    77102       
    78         movl %eax, grub_eax                 # save parameters from GRUB
     103        /* Save GRUB arguments */
     104        movl %eax, grub_eax
    79105        movl %ebx, grub_ebx
    80106       
    81         #
    82         # Protected 32-bit. We want to reuse the code-seg descriptor,
    83         # the Default operand size must not be 1 when entering long mode.
    84         #
     107        pm_status $status_prot
    85108       
    86109        movl $(INTEL_CPUID_EXTENDED), %eax
    … …  
    89112        ja extended_cpuid_supported
    90113       
    91                 movl $extended_cpuid_msg, %esi
    92                 jmp error_halt
     114                pm_error $err_extended_cpuid
    93115       
    94116        extended_cpuid_supported:
    … …  
    99121        jc long_mode_supported
    100122       
    101                 movl $long_mode_msg, %esi
    102                 jmp error_halt
     123                pm_error $err_long_mode
    103124       
    104125        long_mode_supported:
    … …  
    107128        jc noexecute_supported
    108129       
    109                 movl $noexecute_msg, %esi
    110                 jmp error_halt
     130                pm_error $err_noexecute
    111131       
    112132        noexecute_supported:
    … …  
    117137        jc fx_supported
    118138       
    119                 movl $fx_msg, %esi
    120                 jmp error_halt
     139                pm_error $err_fx
    121140       
    122141        fx_supported:
    … …  
    125144        jc sse2_supported
    126145       
    127                 movl $sse2_msg, %esi
    128                 jmp error_halt
     146                pm_error $err_sse2
    129147       
    130148        sse2_supported:
    131 
     149       
    132150#include "vesa_prot.inc"
    133 
    134         #
    135         # Enable 64-bit page translation entries - CR4.PAE = 1.
    136         # Paging is not enabled until after long mode is enabled.
    137         #
     151       
     152        /*
     153         * Protected 32-bit. We want to reuse the code-seg descriptor,
     154         * the Default operand size must not be 1 when entering long mode.
     155         */
     156       
     157        pm2_status $status_prot2
     158       
     159        /*
     160         * Enable 64-bit page translation entries - CR4.PAE = 1.
     161         * Paging is not enabled until after long mode is enabled.
     162         */
    138163       
    139164        movl %cr4, %eax
    … …  
    141166        movl %eax, %cr4
    142167       
    143         # set up paging tables
    144        
     168        /* Set up paging tables */
    145169        leal ptl_0, %eax
    146170        movl %eax, %cr3
    147171       
    148         # enable long mode
    149        
    150         movl $EFER_MSR_NUM, %ecx            # EFER MSR number
    151         rdmsr                               # read EFER
    152         btsl $AMD_LME_FLAG, %eax            # set LME = 1
    153         wrmsr                               # write EFER
    154        
    155         # enable paging to activate long mode (set CR0.PG = 1)
    156        
     172        /* Enable long mode */
     173        movl $EFER_MSR_NUM, %ecx
     174        rdmsr                     /* read EFER */
     175        btsl $AMD_LME_FLAG, %eax  /* set LME = 1 */
     176        wrmsr
     177       
     178        /* Enable paging to activate long mode (set CR0.PG = 1) */
    157179        movl %cr0, %eax
    158180        btsl $31, %eax
    159181        movl %eax, %cr0
    160182       
    161         # at this point we are in compatibility mode
    162        
     183        /* At this point we are in compatibility mode */
    163184        jmpl $gdtselector(KTEXT_DES), $start64
    164185
     186/** Print string to EGA display (in light red) and halt.
     187 *
     188 * Should be executed from 32 bit protected mode with paging
     189 * turned off. Stack is not required. This routine is used even
     190 * if CONFIG_EGA is not enabled. Since we are going to halt the
     191 * CPU anyway, it is always better to at least try to print
     192 * some hints.
     193 *
     194 * @param %esi Pointer to the NULL-terminated string
     195 *             to be print.
     196 *
     197 */
     198pm_error_halt:
     199        movl $0xb8000, %edi  /* base of EGA text mode memory */
     200        xorl %eax, %eax
     201       
     202        /* Read bits 8 - 15 of the cursor address */
     203        movw $0x3d4, %dx
     204        movb $0xe, %al
     205        outb %al, %dx
     206       
     207        movw $0x3d5, %dx
     208        inb %dx, %al
     209        shl $8, %ax
     210       
     211        /* Read bits 0 - 7 of the cursor address */
     212        movw $0x3d4, %dx
     213        movb $0xf, %al
     214        outb %al, %dx
     215       
     216        movw $0x3d5, %dx
     217        inb %dx, %al
     218       
     219        /* Sanity check for the cursor on screen */
     220        cmp $2000, %ax
     221        jb err_cursor_ok
     222       
     223                movw $1998, %ax
     224       
     225        err_cursor_ok:
     226       
     227        movw %ax, %bx
     228        shl $1, %eax
     229        addl %eax, %edi
     230       
     231        err_ploop:
     232                lodsb
     233               
     234                cmp $0, %al
     235                je err_ploop_end
     236               
     237                movb $0x0c, %ah  /* black background, light red foreground */
     238                stosw
     239               
     240                /* Sanity check for the cursor on the last line */
     241                inc %bx
     242                cmp $2000, %bx
     243                jb err_ploop
     244               
     245                /* Scroll the screen (24 rows) */
     246                movl %esi, %edx
     247                movl $0xb80a0, %esi
     248                movl $0xb8000, %edi
     249                movl $960, %ecx
     250                rep movsl
     251               
     252                /* Clear the 24th row */
     253                xorl %eax, %eax
     254                movl $40, %ecx
     255                rep stosl
     256               
     257                /* Go to row 24 */
     258                movl %edx, %esi
     259                movl $0xb8f00, %edi
     260                movw $1920, %bx
     261               
     262                jmp err_ploop
     263        err_ploop_end:
     264       
     265        /* Write bits 8 - 15 of the cursor address */
     266        movw $0x3d4, %dx
     267        movb $0xe, %al
     268        outb %al, %dx
     269       
     270        movw $0x3d5, %dx
     271        movb %bh, %al
     272        outb %al, %dx
     273       
     274        /* Write bits 0 - 7 of the cursor address */
     275        movw $0x3d4, %dx
     276        movb $0xf, %al
     277        outb %al, %dx
     278       
     279        movw $0x3d5, %dx
     280        movb %bl, %al
     281        outb %al, %dx
     282       
     283        cli
     284        hlt1:
     285                hlt
     286                jmp hlt1
     287
     288/** Print string to EGA display (in light green).
     289 *
     290 * Should be called from 32 bit protected mode with paging
     291 * turned off. A stack space of at least 24 bytes is required,
     292 * but the function does not establish a stack frame.
     293 *
     294 * Macros such as pm_status and pm2_status take care that
     295 * this function is used only when CONFIG_EGA is enabled
     296 * and CONFIG_FB is disabled.
     297 *
     298 * @param %esi Pointer to the NULL-terminated string
     299 *             to be print.
     300 *
     301 */
     302pm_early_puts:
     303        pushl %eax
     304        pushl %ebx
     305        pushl %ecx
     306        pushl %edx
     307        pushl %edi
     308       
     309        movl $0xb8000, %edi  /* base of EGA text mode memory */
     310        xorl %eax, %eax
     311       
     312        /* Read bits 8 - 15 of the cursor address */
     313        movw $0x3d4, %dx
     314        movb $0xe, %al
     315        outb %al, %dx
     316       
     317        movw $0x3d5, %dx
     318        inb %dx, %al
     319        shl $8, %ax
     320       
     321        /* Read bits 0 - 7 of the cursor address */
     322        movw $0x3d4, %dx
     323        movb $0xf, %al
     324        outb %al, %dx
     325       
     326        movw $0x3d5, %dx
     327        inb %dx, %al
     328       
     329        /* Sanity check for the cursor on screen */
     330        cmp $2000, %ax
     331        jb pm_puts_cursor_ok
     332       
     333                movw $1998, %ax
     334       
     335        pm_puts_cursor_ok:
     336       
     337        movw %ax, %bx
     338        shl $1, %eax
     339        addl %eax, %edi
     340       
     341        pm_puts_ploop:
     342                lodsb
     343               
     344                cmp $0, %al
     345                je pm_puts_ploop_end
     346               
     347                movb $0x0a, %ah  /* black background, light green foreground */
     348                stosw
     349               
     350                /* Sanity check for the cursor on the last line */
     351                inc %bx
     352                cmp $2000, %bx
     353                jb pm_puts_ploop
     354               
     355                /* Scroll the screen (24 rows) */
     356                movl %esi, %edx
     357                movl $0xb80a0, %esi
     358                movl $0xb8000, %edi
     359                movl $960, %ecx
     360                rep movsl
     361               
     362                /* Clear the 24th row */
     363                xorl %eax, %eax
     364                movl $40, %ecx
     365                rep stosl
     366               
     367                /* Go to row 24 */
     368                movl %edx, %esi
     369                movl $0xb8f00, %edi
     370                movw $1920, %bx
     371               
     372                jmp pm_puts_ploop
     373        pm_puts_ploop_end:
     374       
     375        /* Write bits 8 - 15 of the cursor address */
     376        movw $0x3d4, %dx
     377        movb $0xe, %al
     378        outb %al, %dx
     379       
     380        movw $0x3d5, %dx
     381        movb %bh, %al
     382        outb %al, %dx
     383       
     384        /* Write bits 0 - 7 of the cursor address */
     385        movw $0x3d4, %dx
     386        movb $0xf, %al
     387        outb %al, %dx
     388       
     389        movw $0x3d5, %dx
     390        movb %bl, %al
     391        outb %al, %dx
     392       
     393        popl %edi
     394        popl %edx
     395        popl %ecx
     396        popl %ebx
     397        popl %eax
     398       
     399        ret
     400
    165401.code64
     402
     403.macro long_status msg
     404        pushq %rdi
     405        movq \msg, %rdi
     406        call early_puts
     407        popq %rdi
     408.endm
     409
    166410start64:
     411       
     412        /*
     413         * Long mode.
     414         */
     415       
    167416        movq $(PA2KA(START_STACK)), %rsp
    168417       
    169         # call arch_pre_main(grub_eax, grub_ebx)
     418        /* Create the first stack frame */
     419        pushq $0
     420        movq %rsp, %rbp
     421       
     422        long_status $status_long
     423       
     424        /* Call arch_pre_main(grub_eax, grub_ebx) */
    170425        xorq %rdi, %rdi
    171426        movl grub_eax, %edi
    172427        xorq %rsi, %rsi
    173428        movl grub_ebx, %esi
    174         call arch_pre_main
    175        
    176         # create the first stack frame
    177         pushq $0
    178         movq %rsp, %rbp
    179 
    180         call main_bsp
    181        
    182         # not reached
    183        
     429       
     430        movabsq $arch_pre_main, %rax
     431        callq *%rax
     432       
     433        long_status $status_main
     434       
     435        /* Call main_bsp() */
     436        movabsq $main_bsp, %rax
     437        call *%rax
     438       
     439        /* Not reached */
    184440        cli
    185441        hlt0:
    … …  
    187443                jmp hlt0
    188444
    189 # Print string from %esi to EGA display (in red) and halt
    190 error_halt:
    191         movl $0xb8000, %edi       # base of EGA text mode memory
    192         xorl %eax, %eax
    193        
    194         movw $0x3d4, %dx          # read bits 8 - 15 of the cursor address
     445/** Print string to EGA display.
     446 *
     447 * Should be called from long mode (with paging enabled
     448 * and stack established). This function is ABI compliant
     449 * (without red-zone).
     450 *
     451 * If CONFIG_EGA is undefined or CONFIG_FB is defined
     452 * then this function does nothing.
     453 *
     454 * @param %rdi Pointer to the NULL-terminated string
     455 *             to be printed.
     456 *
     457 */
     458early_puts:
     459       
     460#if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB)))
     461       
     462        /* Prologue, save preserved registers */
     463        pushq %rbp
     464        movq %rsp, %rbp
     465        pushq %rbx
     466       
     467        movq %rdi, %rsi
     468        movq $(PA2KA(0xb8000)), %rdi  /* base of EGA text mode memory */
     469        xorq %rax, %rax
     470       
     471        /* Read bits 8 - 15 of the cursor address */
     472        movw $0x3d4, %dx
    195473        movb $0xe, %al
    196474        outb %al, %dx
    … …  
    200478        shl $8, %ax
    201479       
    202         movw $0x3d4, %dx          # read bits 0 - 7 of the cursor address
     480        /* Read bits 0 - 7 of the cursor address */
     481        movw $0x3d4, %dx
    203482        movb $0xf, %al
    204483        outb %al, %dx
    … …  
    207486        inb %dx, %al
    208487       
    209         cmp $1920, %ax
    210         jbe cursor_ok
    211        
    212                 movw $1920, %ax       # sanity check for the cursor on the last line
    213        
    214         cursor_ok:
     488        /* Sanity check for the cursor on screen */
     489        cmp $2000, %ax
     490        jb early_puts_cursor_ok
     491       
     492                movw $1998, %ax
     493       
     494        early_puts_cursor_ok:
    215495       
    216496        movw %ax, %bx
    217         shl $1, %eax
    218         addl %eax, %edi
    219        
    220         movw $0x0c00, %ax         # black background, light red foreground
    221        
    222         ploop:
     497        shl $1, %rax
     498        addq %rax, %rdi
     499       
     500        early_puts_ploop:
    223501                lodsb
     502               
    224503                cmp $0, %al
    225                 je ploop_end
     504                je early_puts_ploop_end
     505               
     506                movb $0x0e, %ah  /* black background, yellow foreground */
    226507                stosw
     508               
     509                /* Sanity check for the cursor on the last line */
    227510                inc %bx
    228                 jmp ploop
    229         ploop_end:
    230        
    231         movw $0x3d4, %dx          # write bits 8 - 15 of the cursor address
     511                cmp $2000, %bx
     512                jb early_puts_ploop
     513               
     514                /* Scroll the screen (24 rows) */
     515                movq %rsi, %rdx
     516                movq $(PA2KA(0xb80a0)), %rsi
     517                movq $(PA2KA(0xb8000)), %rdi
     518                movq $480, %rcx
     519                rep movsq
     520               
     521                /* Clear the 24th row */
     522                xorq %rax, %rax
     523                movq $20, %rcx
     524                rep stosq
     525               
     526                /* Go to row 24 */
     527                movq %rdx, %rsi
     528                movq $(PA2KA(0xb8f00)), %rdi
     529                movw $1920, %bx
     530               
     531                jmp early_puts_ploop
     532        early_puts_ploop_end:
     533       
     534        /* Write bits 8 - 15 of the cursor address */
     535        movw $0x3d4, %dx
    232536        movb $0xe, %al
    233537        outb %al, %dx
    … …  
    237541        outb %al, %dx
    238542       
    239         movw $0x3d4, %dx          # write bits 0 - 7 of the cursor address
     543        /* Write bits 0 - 7 of the cursor address */
     544        movw $0x3d4, %dx
    240545        movb $0xf, %al
    241546        outb %al, %dx
    … …  
    245550        outb %al, %dx
    246551       
    247         cli
    248         hlt1:
    249                 hlt
    250                 jmp hlt1
     552        /* Epilogue, restore preserved registers */
     553        popq %rbx
     554        leave
     555       
     556#endif
     557       
     558        ret
    251559
    252560#include "vesa_real.inc"
    … …  
    254562.section K_INI_PTLS, "aw", @progbits
    255563
    256 #
    257 # Macro for generating initial page table contents.
    258 # @param cnt Number of entries to generat. Must be multiple of 8.
    259 # @param g   Number of GB that will be added to the mapping.
    260 #
    261 .macro ptl2gen cnt g
    262 .if \cnt
    263         ptl2gen "\cnt - 8" \g
    264         .quad ((\cnt - 8) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
    265         .quad ((\cnt - 7) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
    266         .quad ((\cnt - 6) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
    267         .quad ((\cnt - 5) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
    268         .quad ((\cnt - 4) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
    269         .quad ((\cnt - 3) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
    270         .quad ((\cnt - 2) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
    271         .quad ((\cnt - 1) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
    272 .endif
     564/** Generate initial page table contents.
     565 *
     566 * @param cnt Number of entries to generate. Must be multiple of 8.
     567 * @param g   Number of GB that will be added to the mapping.
     568 *
     569 */
     570.macro ptl2gen cnt g
     571        .if \cnt
     572                ptl2gen "\cnt - 8" \g
     573                .quad ((\cnt - 8) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     574                .quad ((\cnt - 7) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     575                .quad ((\cnt - 6) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     576                .quad ((\cnt - 5) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     577                .quad ((\cnt - 4) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     578                .quad ((\cnt - 3) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     579                .quad ((\cnt - 2) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     580                .quad ((\cnt - 1) * 0x200000) + (\g * 1024 * 1024 * 1024) | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     581        .endif
    273582.endm
    274583
    275 # Page table for pages in the first gigabyte.
    276 .align 4096
    277 .global ptl_2_0g
    278 ptl_2_0g:       
     584/* Page table for pages in the 1st gigabyte. */
     585.align 4096
     586ptl_2_0g:
    279587        ptl2gen 512 0
    280588
    281 # Page table for pages in the second gigabyte.
    282 .align 4096
    283 .global ptl_2_1g
     589/* Page table for pages in the 2nd gigabyte. */
     590.align 4096
    284591ptl_2_1g:
    285592        ptl2gen 512 1
    286593
    287 # Page table for pages in the third gigabyte.
    288 .align 4096
    289 .global ptl_2_2g
     594/* Page table for pages in the 3rd gigabyte. */
     595.align 4096
    290596ptl_2_2g:
    291597        ptl2gen 512 2
    292598
    293 # Page table for pages in the fourth gigabyte.
    294 .align 4096
    295 .global ptl_2_3g
     599/* Page table for pages in the 4th gigabyte. */
     600.align 4096
    296601ptl_2_3g:
    297602        ptl2gen 512 3
    298603
    299 .align 4096
    300 .global ptl_1
     604/* Page table for pages in the 5th gigabyte. */
     605.align 4096
     606ptl_2_4g:
     607        ptl2gen 512 4
     608
     609/* Page table for pages in the 6th gigabyte. */
     610.align 4096
     611ptl_2_5g:
     612        ptl2gen 512 5
     613
     614/* Page table for pages in the 7th gigabyte. */
     615.align 4096
     616ptl_2_6g:
     617        ptl2gen 512 6
     618
     619/* Page table for pages in the 8th gigabyte. */
     620.align 4096
     621ptl_2_7g:
     622        ptl2gen 512 7
     623
     624.align 4096
    301625ptl_1:
    302         # Identity mapping for [0; 4G)
     626        /* Identity mapping for [0; 8G) */
    303627        .quad ptl_2_0g + (PTL_WRITABLE | PTL_PRESENT)
    304         .quad ptl_2_1g + (PTL_WRITABLE | PTL_PRESENT) 
     628        .quad ptl_2_1g + (PTL_WRITABLE | PTL_PRESENT)
    305629        .quad ptl_2_2g + (PTL_WRITABLE | PTL_PRESENT)
    306630        .quad ptl_2_3g + (PTL_WRITABLE | PTL_PRESENT)
    307         .fill 506, 8, 0
    308         # Mapping of [0; 1G) at -2G
    309         .quad ptl_2_0g + (PTL_WRITABLE | PTL_PRESENT)
    310         .fill 1, 8, 0
     631        .quad ptl_2_4g + (PTL_WRITABLE | PTL_PRESENT)
     632        .quad ptl_2_5g + (PTL_WRITABLE | PTL_PRESENT)
     633        .quad ptl_2_6g + (PTL_WRITABLE | PTL_PRESENT)
     634        .quad ptl_2_7g + (PTL_WRITABLE | PTL_PRESENT)
     635        .fill 504, 8, 0
    311636
    312637.align 4096
    … …  
    314639ptl_0:
    315640        .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
    316         .fill 255,8,0
     641        .fill 255, 8, 0
    317642        .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
    318         .fill 254,8,0
    319         .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
     643        .fill 255, 8, 0
    320644
    321645.section K_DATA_START, "aw", @progbits
    … …  
    332656        .long 0
    333657
    334 extended_cpuid_msg:
     658err_extended_cpuid:
    335659        .asciz "Error: Extended CPUID not supported -- CPU is not 64-bit. System halted."
    336 long_mode_msg:
     660err_long_mode:
    337661        .asciz "Error: 64-bit long mode not supported. System halted."
    338 noexecute_msg:
     662err_noexecute:
    339663        .asciz "Error: No-execute pages not supported. System halted."
    340 fx_msg:
     664err_fx:
    341665        .asciz "Error: FXSAVE/FXRESTORE instructions not supported. System halted."
    342 sse2_msg:
     666err_sse2:
    343667        .asciz "Error: SSE2 instructions not supported. System halted."
     668
     669status_prot:
     670        .asciz "[prot] "
     671status_vesa_copy:
     672        .asciz "[vesa_copy] "
     673status_grub_cmdline:
     674        .asciz "[grub_cmdline] "
     675status_vesa_real:
     676        .asciz "[vesa_real] "
     677status_prot2:
     678        .asciz "[prot2] "
     679status_long:
     680        .asciz "[long] "
     681status_main:
     682        .asciz "[main] "

  • kernel/arch/amd64/src/boot/vesa_ret.inc

    r24a2517 rc621f4aa  
    11.code32
    22vesa_init_protected:
     3        cld
     4       
     5        /* Initialize stack pointer */
     6        movl $START_STACK, %esp
     7       
     8        /* Kernel data + stack */
    39        movw $gdtselector(KDATA_DES), %cx
    410        movw %cx, %es
    5         movw %cx, %ds                       # kernel data + stack
     11        movw %cx, %ds
    612        movw %cx, %ss
    713       
    8         #
    9         # Simics seems to remove hidden part of GS on entering user mode
    10         # when _visible_ part of GS does not point to user-mode segment.
    11         #
     14        /*
     15         * Simics seems to remove hidden part of GS on entering user mode
     16         * when _visible_ part of GS does not point to user-mode segment.
     17         */
    1218       
    1319        movw $gdtselector(UDATA_DES), %cx
    … …  
    1521        movw %cx, %gs
    1622       
    17         movl $START_STACK, %esp             # initialize stack pointer
    18        
    1923        jmpl $gdtselector(KTEXT32_DES), $vesa_meeting_point

  • kernel/arch/amd64/src/context.S

    r24a2517 rc621f4aa  
    4141context_save_arch:
    4242        movq (%rsp), %rdx     # the caller's return %eip
    43 
    44         # In %edi is passed 1st argument
    45         CONTEXT_SAVE_ARCH_CORE %rdi %rdx
    4643       
    47         xorq %rax,%rax          # context_save returns 1
     44        # 1st argument passed in %edi
     45        CONTEXT_SAVE_ARCH_CORE %rdi %rdx
     46       
     47        xorq %rax, %rax       # context_save returns 1
    4848        incq %rax
    4949        ret
    … …  
    5555# pointed by the 1st argument. Returns 0 in EAX.
    5656#
    57 context_restore_arch:   
    58 
     57context_restore_arch:
    5958        CONTEXT_RESTORE_ARCH_CORE %rdi %rdx
    60 
    61         movq %rdx,(%rsp)
    62 
    63         xorq %rax,%rax          # context_restore returns 0
     59       
     60        movq %rdx, (%rsp)
     61       
     62        xorq %rax, %rax       # context_restore returns 0
    6463        ret

  • kernel/arch/amd64/src/cpu/cpu.c

    r24a2517 rc621f4aa  
    3939
    4040#include <arch.h>
    41 #include <arch/types.h>
     41#include <typedefs.h>
    4242#include <print.h>
    4343#include <fpu_context.h>
    … …  
    4747 * Contains only non-MP-Specification specific SMP code.
    4848 */
    49 #define AMD_CPUID_EBX   0x68747541
    50 #define AMD_CPUID_ECX   0x444d4163
    51 #define AMD_CPUID_EDX   0x69746e65
     49#define AMD_CPUID_EBX  0x68747541
     50#define AMD_CPUID_ECX  0x444d4163
     51#define AMD_CPUID_EDX  0x69746e65
    5252
    53 #define INTEL_CPUID_EBX 0x756e6547
    54 #define INTEL_CPUID_ECX 0x6c65746e
    55 #define INTEL_CPUID_EDX 0x49656e69
     53#define INTEL_CPUID_EBX  0x756e6547
     54#define INTEL_CPUID_ECX  0x6c65746e
     55#define INTEL_CPUID_EDX  0x49656e69
    5656
    5757
    … …  
    6262};
    6363
    64 static char *vendor_str[] = {
     64static const char *vendor_str[] = {
    6565        "Unknown Vendor",
    6666        "AuthenticAMD",
    … …  
    127127{
    128128        cpu_info_t info;
    129 
     129       
    130130        CPU->arch.vendor = VendorUnknown;
    131131        if (has_cpuid()) {
    132132                cpuid(INTEL_CPUID_LEVEL, &info);
    133 
     133               
    134134                /*
    135135                 * Check for AMD processor.
    136136                 */
    137                 if (info.cpuid_ebx == AMD_CPUID_EBX &&
    138                     info.cpuid_ecx == AMD_CPUID_ECX &&
    139                     info.cpuid_edx == AMD_CPUID_EDX) {
     137                if ((info.cpuid_ebx == AMD_CPUID_EBX) &&
     138                    (info.cpuid_ecx == AMD_CPUID_ECX) &&
     139                    (info.cpuid_edx == AMD_CPUID_EDX)) {
    140140                        CPU->arch.vendor = VendorAMD;
    141141                }
    142 
     142               
    143143                /*
    144144                 * Check for Intel processor.
    145                  */             
    146                 if (info.cpuid_ebx == INTEL_CPUID_EBX &&
    147                     info.cpuid_ecx == INTEL_CPUID_ECX &&
    148                     info.cpuid_edx == INTEL_CPUID_EDX) {
     145                 */
     146                if ((info.cpuid_ebx == INTEL_CPUID_EBX) &&
     147                    (info.cpuid_ecx == INTEL_CPUID_ECX) &&
     148                    (info.cpuid_edx == INTEL_CPUID_EDX)) {
    149149                        CPU->arch.vendor = VendorIntel;
    150150                }
    151                                
     151               
    152152                cpuid(INTEL_CPUID_STANDARD, &info);
    153153                CPU->arch.family = (info.cpuid_eax >> 8) & 0xf;
    154154                CPU->arch.model = (info.cpuid_eax >> 4) & 0xf;
    155                 CPU->arch.stepping = (info.cpuid_eax >> 0) & 0xf;                                               
     155                CPU->arch.stepping = (info.cpuid_eax >> 0) & 0xf;
    156156        }
    157157}

  • kernel/arch/amd64/src/ddi/ddi.c

    r24a2517 rc621f4aa  
    3636#include <arch/ddi/ddi.h>
    3737#include <proc/task.h>
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939#include <adt/bitmap.h>
    4040#include <mm/slab.h>
    … …  
    4949 * Interrupts are disabled and task is locked.
    5050 *
    51  * @param task Task.
     51 * @param task   Task.
    5252 * @param ioaddr Startign I/O space address.
    53  * @param size Size of the enabled I/O range.
     53 * @param size   Size of the enabled I/O range.
    5454 *
    5555 * @return 0 on success or an error code from errno.h.
     56 *
    5657 */
    5758int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
    5859{
    59         size_t bits;
    60        
    61         bits = ioaddr + size;
     60        size_t bits = ioaddr + size;
    6261        if (bits > IO_PORTS)
    6362                return ENOENT;
    6463       
    6564        if (task->arch.iomap.bits < bits) {
    66                 bitmap_t oldiomap;
    67                 uint8_t *newmap;
    68                
    6965                /*
    7066                 * The I/O permission bitmap is too small and needs to be grown.
    7167                 */
    7268               
    73                 newmap = (uint8_t *) malloc(BITS2BYTES(bits), FRAME_ATOMIC);
     69                uint8_t *newmap = (uint8_t *) malloc(BITS2BYTES(bits), FRAME_ATOMIC);
    7470                if (!newmap)
    7571                        return ENOMEM;
    7672               
     73                bitmap_t oldiomap;
    7774                bitmap_initialize(&oldiomap, task->arch.iomap.map,
    7875                    task->arch.iomap.bits);
    … …  
    115112 *
    116113 * Interrupts must be disabled prior this call.
     114 *
    117115 */
    118116void io_perm_bitmap_install(void)
    119117{
    120         size_t bits;
    121         ptr_16_64_t cpugdtr;
    122         descriptor_t *gdt_p;
    123         tss_descriptor_t *tss_desc;
    124         size_t ver;
    125        
    126118        /* First, copy the I/O Permission Bitmap. */
    127         spinlock_lock(&TASK->lock);
    128         ver = TASK->arch.iomapver;
    129         if ((bits = TASK->arch.iomap.bits)) {
     119        irq_spinlock_lock(&TASK->lock, false);
     120        size_t ver = TASK->arch.iomapver;
     121        size_t bits = TASK->arch.iomap.bits;
     122        if (bits) {
     123                ASSERT(TASK->arch.iomap.map);
     124               
    130125                bitmap_t iomap;
    131        
    132                 ASSERT(TASK->arch.iomap.map);
    133126                bitmap_initialize(&iomap, CPU->arch.tss->iomap,
    134127                    TSS_IOMAP_SIZE * 8);
    135128                bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
     129               
    136130                /*
    137131                 * It is safe to set the trailing eight bits because of the
    … …  
    140134                bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8);
    141135        }
    142         spinlock_unlock(&TASK->lock);
     136        irq_spinlock_unlock(&TASK->lock, false);
    143137       
    144138        /*
    … …  
    146140         * Take the extra ending byte will all bits set into account.
    147141         */
     142        ptr_16_64_t cpugdtr;
    148143        gdtr_store(&cpugdtr);
    149         gdt_p = (descriptor_t *) cpugdtr.base;
     144       
     145        descriptor_t *gdt_p = (descriptor_t *) cpugdtr.base;
    150146        gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits));
    151147        gdtr_load(&cpugdtr);
    … …  
    155151         * type must be changed to describe inactive TSS.
    156152         */
    157         tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
     153        tss_descriptor_t *tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
    158154        tss_desc->type = AR_TSS;
    159155        tr_load(gdtselector(TSS_DES));

  • kernel/arch/amd64/src/debug/stacktrace.c

    r24a2517 rc621f4aa  
    3535#include <stacktrace.h>
    3636#include <syscall/copy.h>
    37 #include <arch/types.h>
    3837#include <typedefs.h>
    3938
    40 #define FRAME_OFFSET_FP_PREV    0
    41 #define FRAME_OFFSET_RA         1
     39#define FRAME_OFFSET_FP_PREV  0
     40#define FRAME_OFFSET_RA       1
    4241
    43 bool kernel_frame_pointer_validate(uintptr_t fp)
     42bool kernel_stack_trace_context_validate(stack_trace_context_t *ctx)
    4443{
    45         return fp != 0;
     44        return ctx->fp != 0;
    4645}
    4746
    48 bool kernel_frame_pointer_prev(uintptr_t fp, uintptr_t *prev)
     47bool kernel_frame_pointer_prev(stack_trace_context_t *ctx, uintptr_t *prev)
    4948{
    50         uint64_t *stack = (void *) fp;
     49        uint64_t *stack = (void *) ctx->fp;
    5150        *prev = stack[FRAME_OFFSET_FP_PREV];
     51       
    5252        return true;
    5353}
    5454
    55 bool kernel_return_address_get(uintptr_t fp, uintptr_t *ra)
     55bool kernel_return_address_get(stack_trace_context_t *ctx, uintptr_t *ra)
    5656{
    57         uint64_t *stack = (void *) fp;
     57        uint64_t *stack = (void *) ctx->fp;
    5858        *ra = stack[FRAME_OFFSET_RA];
     59       
    5960        return true;
    6061}
    6162
    62 bool uspace_frame_pointer_validate(uintptr_t fp)
     63bool uspace_stack_trace_context_validate(stack_trace_context_t *ctx)
    6364{
    64         return fp != 0;
     65        return ctx->fp != 0;
    6566}
    6667
    67 bool uspace_frame_pointer_prev(uintptr_t fp, uintptr_t *prev)
     68bool uspace_frame_pointer_prev(stack_trace_context_t *ctx, uintptr_t *prev)
    6869{
    6970        return !copy_from_uspace((void *) prev,
    70             (uint64_t *) fp + FRAME_OFFSET_FP_PREV, sizeof(*prev));
     71            (uint64_t *) ctx->fp + FRAME_OFFSET_FP_PREV, sizeof(*prev));
    7172}
    7273
    73 bool uspace_return_address_get(uintptr_t fp, uintptr_t *ra)
     74bool uspace_return_address_get(stack_trace_context_t *ctx, uintptr_t *ra)
    7475{
    75         return !copy_from_uspace((void *) ra, (uint64_t *) fp + FRAME_OFFSET_RA,
    76             sizeof(*ra));
     76        return !copy_from_uspace((void *) ra,
     77            (uint64_t *) ctx->fp + FRAME_OFFSET_RA, sizeof(*ra));
    7778}
    7879

  • kernel/arch/amd64/src/debugger.c

    r24a2517 rc621f4aa  
    4646#include <symtab.h>
    4747
     48#ifdef __64_BITS__
     49        #define getip(x)  ((x)->rip)
     50#endif
     51
     52#ifdef __32_BITS__
     53        #define getip(x)  ((x)->eip)
     54#endif
     55
    4856typedef struct  {
    49         uintptr_t address;      /**< Breakpoint address */
    50         int flags;              /**< Flags regarding breakpoint */
    51         int counter;            /**< How many times the exception occured */
     57        uintptr_t address;   /**< Breakpoint address */
     58        unsigned int flags;  /**< Flags regarding breakpoint */
     59        size_t counter;      /**< How many times the exception occured */
    5260} bpinfo_t;
    5361
    5462static bpinfo_t breakpoints[BKPOINTS_MAX];
    55 SPINLOCK_INITIALIZE(bkpoint_lock);
     63IRQ_SPINLOCK_STATIC_INITIALIZE(bkpoint_lock);
    5664
    5765#ifdef CONFIG_KCONSOLE
    5866
    59 static int cmd_print_breakpoints(cmd_arg_t *argv);
     67static int cmd_print_breakpoints(cmd_arg_t *);
     68static int cmd_del_breakpoint(cmd_arg_t *);
     69static int cmd_add_breakpoint(cmd_arg_t *);
     70
    6071static cmd_info_t bkpts_info = {
    6172        .name = "bkpts",
    … …  
    6576};
    6677
    67 static int cmd_del_breakpoint(cmd_arg_t *argv);
    6878static cmd_arg_t del_argv = {
    6979        .type = ARG_TYPE_INT
    7080};
     81
    7182static cmd_info_t delbkpt_info = {
    7283        .name = "delbkpt",
    73         .description = "delbkpt <number> - Delete breakpoint.",
     84        .description = "Delete breakpoint.",
    7485        .func = cmd_del_breakpoint,
    7586        .argc = 1,
    … …  
    7788};
    7889
    79 static int cmd_add_breakpoint(cmd_arg_t *argv);
    8090static cmd_arg_t add_argv = {
    8191        .type = ARG_TYPE_INT
    8292};
     93
    8394static cmd_info_t addbkpt_info = {
    8495        .name = "addbkpt",
    85         .description = "addbkpt <&symbol> - new breakpoint.",
     96        .description = "Add breakpoint.",
    8697        .func = cmd_add_breakpoint,
    8798        .argc = 1,
    … …  
    92103        .type = ARG_TYPE_INT
    93104};
     105
    94106static cmd_info_t addwatchp_info = {
    95107        .name = "addwatchp",
    96         .description = "addbwatchp <&symbol> - new write watchpoint.",
     108        .description = "Add write watchpoint.",
    97109        .func = cmd_add_breakpoint,
    98110        .argc = 1,
    … …  
    102114#endif /* CONFIG_KCONSOLE */
    103115
    104 /* Setup DR register according to table */
     116/** Setup DR register according to table
     117 *
     118 */
    105119static void setup_dr(int curidx)
    106120{
    107         unative_t dr7;
     121        ASSERT(curidx >= 0);
     122       
    108123        bpinfo_t *cur = &breakpoints[curidx];
    109         int flags = breakpoints[curidx].flags;
    110 
     124        unsigned int flags = breakpoints[curidx].flags;
     125       
    111126        /* Disable breakpoint in DR7 */
    112         dr7 = read_dr7();
    113         dr7 &= ~(0x2 << (curidx*2));
    114 
    115         if (cur->address) { /* Setup DR register */
     127        unative_t dr7 = read_dr7();
     128        dr7 &= ~(0x2 << (curidx * 2));
     129       
     130        /* Setup DR register */
     131        if (cur->address) {
    116132                /* Set breakpoint to debug registers */
    117133                switch (curidx) {
    … …  
    129145                        break;
    130146                }
     147               
    131148                /* Set type to requested breakpoint & length*/
    132                 dr7 &= ~ (0x3 << (16 + 4*curidx));
    133                 dr7 &= ~ (0x3 << (18 + 4*curidx));
    134                 if ((flags & BKPOINT_INSTR)) {
    135                         ;
    136                 } else {
     149                dr7 &= ~(0x3 << (16 + 4 * curidx));
     150                dr7 &= ~(0x3 << (18 + 4 * curidx));
    137151               
     152                if (!(flags & BKPOINT_INSTR)) {
    138153#ifdef __32_BITS__
    139154                        dr7 |= ((unative_t) 0x3) << (18 + 4 * curidx);
    140155#endif
    141 
     156                       
    142157#ifdef __64_BITS__
    143158                        dr7 |= ((unative_t) 0x2) << (18 + 4 * curidx);
    … …  
    149164                                dr7 |= ((unative_t) 0x3) << (16 + 4 * curidx);
    150165                }
    151 
     166               
    152167                /* Enable global breakpoint */
    153168                dr7 |= 0x2 << (curidx * 2);
    154 
     169               
    155170                write_dr7(dr7);
    156                
    157         }
    158 }
    159        
     171        }
     172}
     173
    160174/** Enable hardware breakpoint
    161175 *
    162176 * @param where Address of HW breakpoint
    163177 * @param flags Type of breakpoint (EXECUTE, WRITE)
     178 *
    164179 * @return Debug slot on success, -1 - no available HW breakpoint
    165  */
    166 int breakpoint_add(const void *where, const int flags, int curidx)
    167 {
    168         ipl_t ipl;
    169         int i;
    170         bpinfo_t *cur;
    171 
     180 *
     181 */
     182int breakpoint_add(const void *where, const unsigned int flags, int curidx)
     183{
    172184        ASSERT(flags & (BKPOINT_INSTR | BKPOINT_WRITE | BKPOINT_READ_WRITE));
    173 
    174         ipl = interrupts_disable();
    175         spinlock_lock(&bkpoint_lock);
     185       
     186        irq_spinlock_lock(&bkpoint_lock, true);
    176187       
    177188        if (curidx == -1) {
    178189                /* Find free space in slots */
    179                 for (i = 0; i < BKPOINTS_MAX; i++)
     190                unsigned int i;
     191                for (i = 0; i < BKPOINTS_MAX; i++) {
    180192                        if (!breakpoints[i].address) {
    181193                                curidx = i;
    182194                                break;
    183195                        }
     196                }
     197               
    184198                if (curidx == -1) {
    185199                        /* Too many breakpoints */
    186                         spinlock_unlock(&bkpoint_lock);
    187                         interrupts_restore(ipl);
     200                        irq_spinlock_unlock(&bkpoint_lock, true);
    188201                        return -1;
    189202                }
    190203        }
    191         cur = &breakpoints[curidx];
    192 
     204       
     205        bpinfo_t *cur = &breakpoints[curidx];
     206       
    193207        cur->address = (uintptr_t) where;
    194208        cur->flags = flags;
    195209        cur->counter = 0;
    196 
     210       
    197211        setup_dr(curidx);
    198 
    199         spinlock_unlock(&bkpoint_lock);
    200         interrupts_restore(ipl);
    201 
     212       
     213        irq_spinlock_unlock(&bkpoint_lock, true);
     214       
    202215        /* Send IPI */
    203 #ifdef CONFIG_SMP
    204216//      ipi_broadcast(VECTOR_DEBUG_IPI);
    205 #endif 
    206 
     217       
    207218        return curidx;
    208219}
    209220
    210 #ifdef __64_BITS__
    211         #define getip(x)  ((x)->rip)
    212 #else
    213         #define getip(x)  ((x)->eip)
    214 #endif
    215 
    216221static void handle_exception(int slot, istate_t *istate)
    217222{
     223        ASSERT(slot >= 0);
    218224        ASSERT(breakpoints[slot].address);
    219 
     225       
    220226        /* Handle zero checker */
    221         if (! (breakpoints[slot].flags & BKPOINT_INSTR)) {
     227        if (!(breakpoints[slot].flags & BKPOINT_INSTR)) {
    222228                if ((breakpoints[slot].flags & BKPOINT_CHECK_ZERO)) {
    223229                        if (*((unative_t *) breakpoints[slot].address) != 0)
    224230                                return;
    225                         printf("*** Found ZERO on address %lx (slot %d) ***\n",
     231                       
     232                        printf("*** Found ZERO on address %" PRIp " (slot %d) ***\n",
    226233                            breakpoints[slot].address, slot);
    227234                } else {
    228                         printf("Data watchpoint - new data: %lx\n",
     235                        printf("Data watchpoint - new data: %" PRIp "\n",
    229236                            *((unative_t *) breakpoints[slot].address));
    230237                }
    231238        }
    232 
    233         printf("Reached breakpoint %d:%lx (%s)\n", slot, getip(istate),
     239       
     240        printf("Reached breakpoint %d:%" PRIp " (%s)\n", slot, getip(istate),
    234241            symtab_fmt_name_lookup(getip(istate)));
    235 
     242       
    236243#ifdef CONFIG_KCONSOLE
    237244        atomic_set(&haltstate, 1);
    … …  
    243250void breakpoint_del(int slot)
    244251{
    245         bpinfo_t *cur;
    246         ipl_t ipl;
    247 
    248         ipl = interrupts_disable();
    249         spinlock_lock(&bkpoint_lock);
    250 
    251         cur = &breakpoints[slot];
     252        ASSERT(slot >= 0);
     253       
     254        irq_spinlock_lock(&bkpoint_lock, true);
     255       
     256        bpinfo_t *cur = &breakpoints[slot];
    252257        if (!cur->address) {
    253                 spinlock_unlock(&bkpoint_lock);
    254                 interrupts_restore(ipl);
     258                irq_spinlock_unlock(&bkpoint_lock, true);
    255259                return;
    256260        }
    257 
     261       
    258262        cur->address = NULL;
    259 
     263       
    260264        setup_dr(slot);
    261 
    262         spinlock_unlock(&bkpoint_lock);
    263         interrupts_restore(ipl);
    264 #ifdef CONFIG_SMP
    265 //      ipi_broadcast(VECTOR_DEBUG_IPI);       
    266 #endif
    267 }
    268 
    269 
    270 
    271 static void debug_exception(int n __attribute__((unused)), istate_t *istate)
    272 {
    273         unative_t dr6;
    274         int i;
    275        
     265       
     266        irq_spinlock_unlock(&bkpoint_lock, true);
     267//      ipi_broadcast(VECTOR_DEBUG_IPI);
     268}
     269
     270static void debug_exception(unsigned int n __attribute__((unused)), istate_t *istate)
     271{
    276272        /* Set RF to restart the instruction  */
    277273#ifdef __64_BITS__
    278274        istate->rflags |= RFLAGS_RF;
    279 #else
     275#endif
     276       
     277#ifdef __32_BITS__
    280278        istate->eflags |= EFLAGS_RF;
    281279#endif
    282 
    283         dr6 = read_dr6();
    284         for (i=0; i < BKPOINTS_MAX; i++) {
     280       
     281        unative_t dr6 = read_dr6();
     282       
     283        unsigned int i;
     284        for (i = 0; i < BKPOINTS_MAX; i++) {
    285285                if (dr6 & (1 << i)) {
    286286                        dr6 &= ~ (1 << i);
    … …  
    293293
    294294#ifdef CONFIG_SMP
    295 static void
    296 debug_ipi(int n __attribute__((unused)),
     295static void debug_ipi(unsigned int n __attribute__((unused)),
    297296    istate_t *istate __attribute__((unused)))
    298297{
    299         int i;
    300 
    301         spinlock_lock(&bkpoint_lock);
     298        irq_spinlock_lock(&bkpoint_lock, false);
     299       
     300        unsigned int i;
    302301        for (i = 0; i < BKPOINTS_MAX; i++)
    303302                setup_dr(i);
    304         spinlock_unlock(&bkpoint_lock);
    305 }
    306 #endif
    307 
    308 /** Initialize debugger */
     303       
     304        irq_spinlock_unlock(&bkpoint_lock, false);
     305}
     306#endif /* CONFIG_SMP */
     307
     308/** Initialize debugger
     309 *
     310 */
    309311void debugger_init()
    310312{
    311         int i;
    312 
     313        unsigned int i;
    313314        for (i = 0; i < BKPOINTS_MAX; i++)
    314315                breakpoints[i].address = NULL;
    315 
     316       
    316317#ifdef CONFIG_KCONSOLE
    317318        cmd_initialize(&bkpts_info);
    318319        if (!cmd_register(&bkpts_info))
    319320                printf("Cannot register command %s\n", bkpts_info.name);
    320 
     321       
    321322        cmd_initialize(&delbkpt_info);
    322323        if (!cmd_register(&delbkpt_info))
    323324                printf("Cannot register command %s\n", delbkpt_info.name);
    324 
     325       
    325326        cmd_initialize(&addbkpt_info);
    326327        if (!cmd_register(&addbkpt_info))
    327328                printf("Cannot register command %s\n", addbkpt_info.name);
    328 
     329       
    329330        cmd_initialize(&addwatchp_info);
    330331        if (!cmd_register(&addwatchp_info))
    … …  
    332333#endif /* CONFIG_KCONSOLE */
    333334       
    334         exc_register(VECTOR_DEBUG, "debugger", debug_exception);
     335        exc_register(VECTOR_DEBUG, "debugger", true,
     336            debug_exception);
     337       
    335338#ifdef CONFIG_SMP
    336         exc_register(VECTOR_DEBUG_IPI, "debugger_smp", debug_ipi);
    337 #endif
     339        exc_register(VECTOR_DEBUG_IPI, "debugger_smp", true,
     340            debug_ipi);
     341#endif /* CONFIG_SMP */
    338342}
    339343
    340344#ifdef CONFIG_KCONSOLE
    341 /** Print table of active breakpoints */
     345/** Print table of active breakpoints
     346 *
     347 */
    342348int cmd_print_breakpoints(cmd_arg_t *argv __attribute__((unused)))
    343349{
     350#ifdef __32_BITS__
     351        printf("[nr] [count] [address ] [in symbol\n");
     352#endif
     353       
     354#ifdef __64_BITS__
     355        printf("[nr] [count] [address         ] [in symbol\n");
     356#endif
     357       
    344358        unsigned int i;
    345         char *symbol;
    346 
     359        for (i = 0; i < BKPOINTS_MAX; i++) {
     360                if (breakpoints[i].address) {
     361                        const char *symbol = symtab_fmt_name_lookup(
     362                            breakpoints[i].address);
     363                       
    347364#ifdef __32_BITS__
    348         printf("#  Count Address    In symbol\n");
    349         printf("-- ----- ---------- ---------\n");
    350 #endif
    351 
    352 #ifdef __64_BITS__
    353         printf("#  Count Address            In symbol\n");
    354         printf("-- ----- ------------------ ---------\n");
    355 #endif
    356        
    357         for (i = 0; i < BKPOINTS_MAX; i++)
    358                 if (breakpoints[i].address) {
    359                         symbol = symtab_fmt_name_lookup(
    360                             breakpoints[i].address);
    361 
    362 #ifdef __32_BITS__
    363                         printf("%-2u %-5d %#10zx %s\n", i,
     365                        printf("%-4u %7" PRIs " %p %s\n", i,
    364366                            breakpoints[i].counter, breakpoints[i].address,
    365367                            symbol);
    366368#endif
    367 
     369                       
    368370#ifdef __64_BITS__
    369                         printf("%-2u %-5d %#18zx %s\n", i,
     371                        printf("%-4u %7" PRIs " %p %s\n", i,
    370372                            breakpoints[i].counter, breakpoints[i].address,
    371373                            symbol);
    372374#endif
    373 
    374                 }
     375                }
     376        }
     377       
    375378        return 1;
    376379}
    377380
    378 /** Remove breakpoint from table */
     381/** Remove breakpoint from table
     382 *
     383 */
    379384int cmd_del_breakpoint(cmd_arg_t *argv)
    380385{
    … …  
    384389                return 0;
    385390        }
     391       
    386392        breakpoint_del(argv->intval);
    387393        return 1;
    388394}
    389395
    390 /** Add new breakpoint to table */
     396/** Add new breakpoint to table
     397 *
     398 */
    391399static int cmd_add_breakpoint(cmd_arg_t *argv)
    392400{
    393         int flags;
    394         int id;
    395 
    396         if (argv == &add_argv) {
     401        unsigned int flags;
     402        if (argv == &add_argv)
    397403                flags = BKPOINT_INSTR;
    398         } else { /* addwatchp */
     404        else
    399405                flags = BKPOINT_WRITE;
    400         }
     406       
    401407        printf("Adding breakpoint on address: %p\n", argv->intval);
    402         id = breakpoint_add((void *)argv->intval, flags, -1);
     408       
     409        int id = breakpoint_add((void *)argv->intval, flags, -1);
    403410        if (id < 0)
    404411                printf("Add breakpoint failed.\n");

  • kernel/arch/amd64/src/delay.S

    r24a2517 rc621f4aa  
    3737
    3838asm_delay_loop:
    39 0:      dec %rdi
    40         jnz 0b
     39        0:
     40                dec %rdi
     41                jnz 0b
     42       
    4143        ret
    4244
    4345asm_fake_loop:
    44 0:      dec %rdi
    45         jz 0b
     46        0:
     47                dec %rdi
     48                jz 0b
     49       
    4650        ret

  • kernel/arch/amd64/src/fpu_context.c

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup amd64   
     29/** @addtogroup amd64
    3030 * @{
    3131 */

  • kernel/arch/amd64/src/interrupt.c

    r24a2517 rc621f4aa  
    6363void (* eoi_function)(void) = NULL;
    6464
    65 void decode_istate(int n, istate_t *istate)
    66 {
    67         char *symbol;
    68 
    69         symbol = symtab_fmt_name_lookup(istate->rip);
    70 
    71         printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n", n, __func__);
    72         printf("%%rip: %#llx (%s)\n", istate->rip, symbol);
    73         printf("ERROR_WORD=%#llx\n", istate->error_word);
    74         printf("%%cs=%#llx, rflags=%#llx, %%cr0=%#llx\n", istate->cs,
    75             istate->rflags, read_cr0());
    76         printf("%%rax=%#llx, %%rcx=%#llx, %%rdx=%#llx\n", istate->rax,
    77             istate->rcx, istate->rdx);
    78         printf("%%rsi=%#llx, %%rdi=%#llx, %%r8=%#llx\n", istate->rsi,
    79             istate->rdi, istate->r8);
    80         printf("%%r9=%#llx, %%r10=%#llx, %%r11=%#llx\n", istate->r9,
    81             istate->r10, istate->r11);
    82         printf("%%rsp=%#llx\n", &istate->stack[0]);
    83        
    84         stack_trace_istate(istate);
     65void istate_decode(istate_t *istate)
     66{
     67        printf("cs =%p\trip=%p\trfl=%p\terr=%p\n",
     68            istate->cs, istate->rip, istate->rflags, istate->error_word);
     69
     70        if (istate_from_uspace(istate))
     71                printf("ss =%p\n", istate->ss);
     72       
     73        printf("rax=%p\trbx=%p\trcx=%p\trdx=%p\n",
     74            istate->rax, istate->rbx, istate->rcx, istate->rdx);
     75        printf("rsi=%p\trdi=%p\trbp=%p\trsp=%p\n",
     76            istate->rsi, istate->rdi, istate->rbp,
     77            istate_from_uspace(istate) ? istate->rsp : (uintptr_t)&istate->rsp);
     78        printf("r8 =%p\tr9 =%p\tr10=%p\tr11=%p\n",
     79            istate->r8, istate->r9, istate->r10, istate->r11);
     80        printf("r12=%p\tr13=%p\tr14=%p\tr15=%p\n",
     81            istate->r12, istate->r13, istate->r14, istate->r15);
    8582}
    8683
    … …  
    9491}
    9592
    96 static void null_interrupt(int n, istate_t *istate)
    97 {
    98         fault_if_from_uspace(istate, "Unserviced interrupt: %d.", n);
    99         decode_istate(n, istate);
    100         panic("Unserviced interrupt.");
    101 }
    102 
    103 static void de_fault(int n, istate_t *istate)
     93static void null_interrupt(unsigned int n, istate_t *istate)
     94{
     95        fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
     96        panic_badtrap(istate, n, "Unserviced interrupt.");
     97}
     98
     99static void de_fault(unsigned int n, istate_t *istate)
    104100{
    105101        fault_if_from_uspace(istate, "Divide error.");
    106         decode_istate(n, istate);
    107         panic("Divide error.");
    108 }
    109 
    110 /** General Protection Fault. */
    111 static void gp_fault(int n, istate_t *istate)
     102        panic_badtrap(istate, n, "Divide error.");
     103}
     104
     105/** General Protection Fault.
     106 *
     107 */
     108static void gp_fault(unsigned int n, istate_t *istate)
    112109{
    113110        if (TASK) {
    114                 size_t ver;
    115 
    116                 spinlock_lock(&TASK->lock);
    117                 ver = TASK->arch.iomapver;
    118                 spinlock_unlock(&TASK->lock);
    119 
     111                irq_spinlock_lock(&TASK->lock, false);
     112                size_t ver = TASK->arch.iomapver;
     113                irq_spinlock_unlock(&TASK->lock, false);
     114               
    120115                if (CPU->arch.iomapver_copy != ver) {
    121116                        /*
    … …  
    131126                fault_if_from_uspace(istate, "General protection fault.");
    132127        }
    133 
    134         decode_istate(n, istate);
    135         panic("General protection fault.");
    136 }
    137 
    138 static void ss_fault(int n, istate_t *istate)
     128        panic_badtrap(istate, n, "General protection fault.");
     129}
     130
     131static void ss_fault(unsigned int n, istate_t *istate)
    139132{
    140133        fault_if_from_uspace(istate, "Stack fault.");
    141         decode_istate(n, istate);
    142         panic("Stack fault.");
    143 }
    144 
    145 static void nm_fault(int n, istate_t *istate)
     134        panic_badtrap(istate, n, "Stack fault.");
     135}
     136
     137static void nm_fault(unsigned int n, istate_t *istate)
    146138{
    147139#ifdef CONFIG_FPU_LAZY
    … …  
    154146
    155147#ifdef CONFIG_SMP
    156 static void tlb_shootdown_ipi(int n, istate_t *istate)
     148static void tlb_shootdown_ipi(unsigned int n, istate_t *istate)
    157149{
    158150        trap_virtual_eoi();
    … …  
    161153#endif
    162154
    163 /** Handler of IRQ exceptions */
    164 static void irq_interrupt(int n, istate_t *istate)
     155/** Handler of IRQ exceptions.
     156 *
     157 */
     158static void irq_interrupt(unsigned int n, istate_t *istate)
    165159{
    166160        ASSERT(n >= IVT_IRQBASE);
    167161       
    168         int inum = n - IVT_IRQBASE;
     162        unsigned int inum = n - IVT_IRQBASE;
    169163        bool ack = false;
    170164        ASSERT(inum < IRQ_COUNT);
    … …  
    176170                 * The IRQ handler was found.
    177171                 */
    178                  
     172               
    179173                if (irq->preack) {
    180174                        /* Send EOI before processing the interrupt */
    … …  
    183177                }
    184178                irq->handler(irq);
    185                 spinlock_unlock(&irq->lock);
     179                irq_spinlock_unlock(&irq->lock, false);
    186180        } else {
    187181                /*
    … …  
    189183                 */
    190184#ifdef CONFIG_DEBUG
    191                 printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum);
     185                printf("cpu%u: spurious interrupt (inum=%u)\n", CPU->id, inum);
    192186#endif
    193187        }
    … …  
    199193void interrupt_init(void)
    200194{
    201         int i;
     195        unsigned int i;
    202196       
    203197        for (i = 0; i < IVT_ITEMS; i++)
    204                 exc_register(i, "null", (iroutine) null_interrupt);
     198                exc_register(i, "null", false, (iroutine_t) null_interrupt);
    205199       
    206200        for (i = 0; i < IRQ_COUNT; i++) {
    207201                if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
    208                         exc_register(IVT_IRQBASE + i, "irq",
    209                             (iroutine) irq_interrupt);
     202                        exc_register(IVT_IRQBASE + i, "irq", true,
     203                            (iroutine_t) irq_interrupt);
    210204        }
    211205       
    212         exc_register(0, "de_fault", (iroutine) de_fault);
    213         exc_register(7, "nm_fault", (iroutine) nm_fault);
    214         exc_register(12, "ss_fault", (iroutine) ss_fault);
    215         exc_register(13, "gp_fault", (iroutine) gp_fault);
    216         exc_register(14, "ident_mapper", (iroutine) ident_page_fault);
     206        exc_register(0, "de_fault", true, (iroutine_t) de_fault);
     207        exc_register(7, "nm_fault", true, (iroutine_t) nm_fault);
     208        exc_register(12, "ss_fault", true, (iroutine_t) ss_fault);
     209        exc_register(13, "gp_fault", true, (iroutine_t) gp_fault);
    217210       
    218211#ifdef CONFIG_SMP
    219         exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
    220             (iroutine) tlb_shootdown_ipi);
     212        exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
     213            (iroutine_t) tlb_shootdown_ipi);
    221214#endif
    222215}

  • kernel/arch/amd64/src/mm/page.c

    r24a2517 rc621f4aa  
    3939#include <mm/frame.h>
    4040#include <mm/as.h>
    41 #include <arch/interrupt.h>
    4241#include <arch/asm.h>
    4342#include <config.h>
    … …  
    4847#include <align.h>
    4948
    50 /* Definitions for identity page mapper */
    51 pte_t helper_ptl1[512] __attribute__((aligned (PAGE_SIZE)));
    52 pte_t helper_ptl2[512] __attribute__((aligned (PAGE_SIZE)));
    53 pte_t helper_ptl3[512] __attribute__((aligned (PAGE_SIZE)));
    54 extern pte_t ptl_0; /* From boot.S */
    55 
    56 #define PTL1_PRESENT(ptl0, page) (!(GET_PTL1_FLAGS_ARCH(ptl0, PTL0_INDEX_ARCH(page)) & PAGE_NOT_PRESENT))
    57 #define PTL2_PRESENT(ptl1, page) (!(GET_PTL2_FLAGS_ARCH(ptl1, PTL1_INDEX_ARCH(page)) & PAGE_NOT_PRESENT))
    58 #define PTL3_PRESENT(ptl2, page) (!(GET_PTL3_FLAGS_ARCH(ptl2, PTL2_INDEX_ARCH(page)) & PAGE_NOT_PRESENT))
    59 
    60 #define PTL1_ADDR(ptl0, page) ((pte_t *)PA2KA(GET_PTL1_ADDRESS_ARCH(ptl0, PTL0_INDEX_ARCH(page))))
    61 #define PTL2_ADDR(ptl1, page) ((pte_t *)PA2KA(GET_PTL2_ADDRESS_ARCH(ptl1, PTL1_INDEX_ARCH(page))))
    62 #define PTL3_ADDR(ptl2, page) ((pte_t *)PA2KA(GET_PTL3_ADDRESS_ARCH(ptl2, PTL2_INDEX_ARCH(page))))
    63 
    64 #define SETUP_PTL1(ptl0, page, tgt)  {  \
    65         SET_PTL1_ADDRESS_ARCH(ptl0, PTL0_INDEX_ARCH(page), (uintptr_t)KA2PA(tgt)); \
    66         SET_PTL1_FLAGS_ARCH(ptl0, PTL0_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
    67     }
    68 #define SETUP_PTL2(ptl1, page, tgt)  {  \
    69         SET_PTL2_ADDRESS_ARCH(ptl1, PTL1_INDEX_ARCH(page), (uintptr_t)KA2PA(tgt)); \
    70         SET_PTL2_FLAGS_ARCH(ptl1, PTL1_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
    71     }
    72 #define SETUP_PTL3(ptl2, page, tgt)  {  \
    73         SET_PTL3_ADDRESS_ARCH(ptl2, PTL2_INDEX_ARCH(page), (uintptr_t)KA2PA(tgt)); \
    74         SET_PTL3_FLAGS_ARCH(ptl2, PTL2_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
    75     }
    76 #define SETUP_FRAME(ptl3, page, tgt)  { \
    77         SET_FRAME_ADDRESS_ARCH(ptl3, PTL3_INDEX_ARCH(page), (uintptr_t)KA2PA(tgt)); \
    78         SET_FRAME_FLAGS_ARCH(ptl3, PTL3_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
    79     }
    80 
    81 
    8249void page_arch_init(void)
    8350{
    84         uintptr_t cur;
    85         unsigned int i;
    86         int identity_flags = PAGE_CACHEABLE | PAGE_EXEC | PAGE_GLOBAL | PAGE_WRITE;
    87 
    8851        if (config.cpu_active == 1) {
     52                uintptr_t cur;
     53                unsigned int identity_flags =
     54                    PAGE_CACHEABLE | PAGE_EXEC | PAGE_GLOBAL | PAGE_WRITE;
     55               
    8956                page_mapping_operations = &pt_mapping_operations;
    90 
     57               
     58                page_table_lock(AS_KERNEL, true);
     59               
    9160                /*
    9261                 * PA2KA(identity) mapping for all frames.
    9362                 */
    94                 for (cur = 0; cur < last_frame; cur += FRAME_SIZE) {
    95                         /* Standard identity mapping */
     63                for (cur = 0; cur < last_frame; cur += FRAME_SIZE)
    9664                        page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, identity_flags);
    97                 }
    9865               
    99                 /* Upper kernel mapping
    100                  * - from zero to top of kernel (include bottom addresses
    101                  *   because some are needed for init)
    102                  */
    103                 for (cur = PA2KA_CODE(0); cur < config.base + config.kernel_size; cur += FRAME_SIZE)
    104                         page_mapping_insert(AS_KERNEL, cur, KA2PA(cur), identity_flags);
     66                page_table_unlock(AS_KERNEL, true);
    10567               
    106                 for (cur = config.stack_base; cur < config.stack_base + config.stack_size; cur += FRAME_SIZE)
    107                         page_mapping_insert(AS_KERNEL, cur, KA2PA(cur), identity_flags);
    108                
    109                 for (i = 0; i < init.cnt; i++) {
    110                         for (cur = init.tasks[i].addr; cur < init.tasks[i].addr + init.tasks[i].size; cur += FRAME_SIZE)
    111                                 page_mapping_insert(AS_KERNEL, PA2KA_CODE(KA2PA(cur)), KA2PA(cur), identity_flags);
    112                 }
    113 
    114                 exc_register(14, "page_fault", (iroutine) page_fault);
     68                exc_register(14, "page_fault", true, (iroutine_t) page_fault);
    11569                write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
    116         } else 
     70        } else
    11771                write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
    11872}
    11973
    120 
    121 /** Identity page mapper
    122  *
    123  * We need to map whole physical memory identically before the page subsystem
    124  * is initializaed. This thing clears page table and fills in the specific
    125  * items.
    126  */
    127 void ident_page_fault(int n, istate_t *istate)
     74void page_fault(unsigned int n, istate_t *istate)
    12875{
    129         uintptr_t page;
    130         static uintptr_t oldpage = 0;
    131         pte_t *aptl_1, *aptl_2, *aptl_3;
    132 
    133         page = read_cr2();
    134         if (oldpage) {
    135                 /* Unmap old address */
    136                 aptl_1 = PTL1_ADDR(&ptl_0, oldpage);
    137                 aptl_2 = PTL2_ADDR(aptl_1, oldpage);
    138                 aptl_3 = PTL3_ADDR(aptl_2, oldpage);
    139 
    140                 SET_FRAME_FLAGS_ARCH(aptl_3, PTL3_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
    141                 if (KA2PA(aptl_3) == KA2PA(helper_ptl3))
    142                         SET_PTL3_FLAGS_ARCH(aptl_2, PTL2_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
    143                 if (KA2PA(aptl_2) == KA2PA(helper_ptl2))
    144                         SET_PTL2_FLAGS_ARCH(aptl_1, PTL1_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
    145                 if (KA2PA(aptl_1) == KA2PA(helper_ptl1))
    146                         SET_PTL1_FLAGS_ARCH(&ptl_0, PTL0_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
    147         }
    148         if (PTL1_PRESENT(&ptl_0, page))
    149                 aptl_1 = PTL1_ADDR(&ptl_0, page);
    150         else {
    151                 SETUP_PTL1(&ptl_0, page, helper_ptl1);
    152                 aptl_1 = helper_ptl1;
    153         }
    154            
    155         if (PTL2_PRESENT(aptl_1, page))
    156                 aptl_2 = PTL2_ADDR(aptl_1, page);
    157         else {
    158                 SETUP_PTL2(aptl_1, page, helper_ptl2);
    159                 aptl_2 = helper_ptl2;
    160         }
    161 
    162         if (PTL3_PRESENT(aptl_2, page))
    163                 aptl_3 = PTL3_ADDR(aptl_2, page);
    164         else {
    165                 SETUP_PTL3(aptl_2, page, helper_ptl3);
    166                 aptl_3 = helper_ptl3;
    167         }
    168        
    169         SETUP_FRAME(aptl_3, page, page);
    170 
    171         oldpage = page;
    172 }
    173 
    174 
    175 void page_fault(int n, istate_t *istate)
    176 {
    177         uintptr_t page;
    178         pf_access_t access;
    179        
    180         page = read_cr2();
     76        uintptr_t page = read_cr2();
    18177       
    18278        if (istate->error_word & PFERR_CODE_RSVD)
    18379                panic("Reserved bit set in page table entry.");
     80       
     81        pf_access_t access;
    18482       
    18583        if (istate->error_word & PFERR_CODE_RW)
    … …  
    19290        if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
    19391                fault_if_from_uspace(istate, "Page fault: %#x.", page);
    194 
    195                 decode_istate(n, istate);
    196                 printf("Page fault address: %llx.\n", page);
    197                 panic("Page fault.");
     92                panic_memtrap(istate, access, page, NULL);
    19893        }
    19994}
    200 
    20195
    20296uintptr_t hw_map(uintptr_t physaddr, size_t size)
    20397{
    20498        if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
    205                 panic("Unable to map physical memory %p (%d bytes).", physaddr,
     99                panic("Unable to map physical memory %p (%" PRIs " bytes).", physaddr,
    206100                    size);
    207101       
    208102        uintptr_t virtaddr = PA2KA(last_frame);
    209103        pfn_t i;
     104       
     105        page_table_lock(AS_KERNEL, true);
     106       
    210107        for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
    211108                page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE | PAGE_WRITE);
     109       
     110        page_table_unlock(AS_KERNEL, true);
    212111       
    213112        last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);

  • kernel/arch/amd64/src/pm.c

    r24a2517 rc621f4aa  
    175175                d->present = 1;
    176176                d->type = AR_INTERRUPT; /* masking interrupt */
    177 
    178                 idt_setoffset(d, ((uintptr_t) interrupt_handlers) +
    179                     i * interrupt_handler_size);
    180177        }
     178
     179        d = &idt[0];
     180        idt_setoffset(d++, (uintptr_t) &int_0);
     181        idt_setoffset(d++, (uintptr_t) &int_1);
     182        idt_setoffset(d++, (uintptr_t) &int_2);
     183        idt_setoffset(d++, (uintptr_t) &int_3);
     184        idt_setoffset(d++, (uintptr_t) &int_4);
     185        idt_setoffset(d++, (uintptr_t) &int_5);
     186        idt_setoffset(d++, (uintptr_t) &int_6);
     187        idt_setoffset(d++, (uintptr_t) &int_7);
     188        idt_setoffset(d++, (uintptr_t) &int_8);
     189        idt_setoffset(d++, (uintptr_t) &int_9);
     190        idt_setoffset(d++, (uintptr_t) &int_10);
     191        idt_setoffset(d++, (uintptr_t) &int_11);
     192        idt_setoffset(d++, (uintptr_t) &int_12);
     193        idt_setoffset(d++, (uintptr_t) &int_13);
     194        idt_setoffset(d++, (uintptr_t) &int_14);
     195        idt_setoffset(d++, (uintptr_t) &int_15);
     196        idt_setoffset(d++, (uintptr_t) &int_16);
     197        idt_setoffset(d++, (uintptr_t) &int_17);
     198        idt_setoffset(d++, (uintptr_t) &int_18);
     199        idt_setoffset(d++, (uintptr_t) &int_19);
     200        idt_setoffset(d++, (uintptr_t) &int_20);
     201        idt_setoffset(d++, (uintptr_t) &int_21);
     202        idt_setoffset(d++, (uintptr_t) &int_22);
     203        idt_setoffset(d++, (uintptr_t) &int_23);
     204        idt_setoffset(d++, (uintptr_t) &int_24);
     205        idt_setoffset(d++, (uintptr_t) &int_25);
     206        idt_setoffset(d++, (uintptr_t) &int_26);
     207        idt_setoffset(d++, (uintptr_t) &int_27);
     208        idt_setoffset(d++, (uintptr_t) &int_28);
     209        idt_setoffset(d++, (uintptr_t) &int_29);
     210        idt_setoffset(d++, (uintptr_t) &int_30);
     211        idt_setoffset(d++, (uintptr_t) &int_31);
     212        idt_setoffset(d++, (uintptr_t) &int_32);
     213        idt_setoffset(d++, (uintptr_t) &int_33);
     214        idt_setoffset(d++, (uintptr_t) &int_34);
     215        idt_setoffset(d++, (uintptr_t) &int_35);
     216        idt_setoffset(d++, (uintptr_t) &int_36);
     217        idt_setoffset(d++, (uintptr_t) &int_37);
     218        idt_setoffset(d++, (uintptr_t) &int_38);
     219        idt_setoffset(d++, (uintptr_t) &int_39);
     220        idt_setoffset(d++, (uintptr_t) &int_40);
     221        idt_setoffset(d++, (uintptr_t) &int_41);
     222        idt_setoffset(d++, (uintptr_t) &int_42);
     223        idt_setoffset(d++, (uintptr_t) &int_43);
     224        idt_setoffset(d++, (uintptr_t) &int_44);
     225        idt_setoffset(d++, (uintptr_t) &int_45);
     226        idt_setoffset(d++, (uintptr_t) &int_46);
     227        idt_setoffset(d++, (uintptr_t) &int_47);
     228        idt_setoffset(d++, (uintptr_t) &int_48);
     229        idt_setoffset(d++, (uintptr_t) &int_49);
     230        idt_setoffset(d++, (uintptr_t) &int_50);
     231        idt_setoffset(d++, (uintptr_t) &int_51);
     232        idt_setoffset(d++, (uintptr_t) &int_52);
     233        idt_setoffset(d++, (uintptr_t) &int_53);
     234        idt_setoffset(d++, (uintptr_t) &int_54);
     235        idt_setoffset(d++, (uintptr_t) &int_55);
     236        idt_setoffset(d++, (uintptr_t) &int_56);
     237        idt_setoffset(d++, (uintptr_t) &int_57);
     238        idt_setoffset(d++, (uintptr_t) &int_58);
     239        idt_setoffset(d++, (uintptr_t) &int_59);
     240        idt_setoffset(d++, (uintptr_t) &int_60);
     241        idt_setoffset(d++, (uintptr_t) &int_61);
     242        idt_setoffset(d++, (uintptr_t) &int_62);
     243        idt_setoffset(d++, (uintptr_t) &int_63);
    181244}
    182245

  • kernel/arch/amd64/src/proc/scheduler.c

    r24a2517 rc621f4aa  
    3838#include <proc/thread.h>
    3939#include <arch.h>
    40 #include <arch/context.h>       /* SP_DELTA */
    4140#include <arch/asm.h>
    4241#include <print.h>
    … …  
    5756{
    5857        CPU->arch.tss->rsp0 =
    59             (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA];
    60 
     58            (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE];
     59       
    6160        /*
    6261         * Syscall support.
    6362         */
    6463        swapgs();
    65         write_msr(AMD_MSR_GS, (uintptr_t)THREAD->arch.syscall_rsp);
     64        write_msr(AMD_MSR_GS, (uintptr_t) THREAD->arch.syscall_rsp);
    6665        swapgs();
    67 
     66       
    6867        /* TLS support - set FS to thread local storage */
    6968        write_msr(AMD_MSR_FS, THREAD->arch.tls);

  • kernel/arch/amd64/src/proc/task.c

    r24a2517 rc621f4aa  
    3535#include <proc/task.h>
    3636#include <mm/slab.h>
    37 #include <arch/types.h>
     37#include <typedefs.h>
    3838
    3939/** Perform amd64 specific task initialization.
    4040 *
    41  * @param t Task to be initialized.
     41 * @param task Task to be initialized.
     42 *
    4243 */
    43 void task_create_arch(task_t *t)
     44void task_create_arch(task_t *task)
    4445{
    45         t->arch.iomapver = 0;
    46         bitmap_initialize(&t->arch.iomap, NULL, 0);
     46        task->arch.iomapver = 0;
     47        bitmap_initialize(&task->arch.iomap, NULL, 0);
    4748}
    4849
    4950/** Perform amd64 specific task destruction.
    5051 *
    51  * @param t Task to be initialized.
     52 * @param task Task to be initialized.
     53 *
    5254 */
    53 void task_destroy_arch(task_t *t)
     55void task_destroy_arch(task_t *task)
    5456{
    55         if (t->arch.iomap.map)
    56                 free(t->arch.iomap.map);
     57        if (task->arch.iomap.map)
     58                free(task->arch.iomap.map);
    5759}
    5860

  • kernel/arch/amd64/src/proc/thread.c

    r24a2517 rc621f4aa  
    3434
    3535#include <proc/thread.h>
     36#include <arch/interrupt.h>
    3637
    3738/** Perform amd64 specific thread initialization.
    3839 *
    39  * @param t Thread to be initialized.
     40 * @param thread Thread to be initialized.
     41 *
    4042 */
    41 void thread_create_arch(thread_t *t)
     43void thread_create_arch(thread_t *thread)
    4244{
    43         t->arch.tls = 0;
    44         t->arch.syscall_rsp[SYSCALL_USTACK_RSP] = 0;
     45        thread->arch.tls = 0;
     46        thread->arch.syscall_rsp[SYSCALL_USTACK_RSP] = 0;
     47       
    4548        /*
    4649         * Kernel RSP can be precalculated at thread creation time.
    4750         */
    48         t->arch.syscall_rsp[SYSCALL_KSTACK_RSP] =
    49             (uintptr_t) &t->kstack[PAGE_SIZE - sizeof(uint64_t)];
     51        thread->arch.syscall_rsp[SYSCALL_KSTACK_RSP] =
     52            (uintptr_t) &thread->kstack[PAGE_SIZE - sizeof(istate_t)];
    5053}
    5154

  • kernel/arch/amd64/src/smp/ap.S

    r24a2517 rc621f4aa  
    5555        xorw %ax, %ax
    5656        movw %ax, %ds
    57 
    58         lgdtl ap_gdtr           # initialize Global Descriptor Table register
     57       
     58        lgdtl ap_gdtr       # initialize Global Descriptor Table register
    5959       
    6060        movl %cr0, %eax
    6161        orl $1, %eax
    62         movl %eax, %cr0         # switch to protected mode
     62        movl %eax, %cr0     # switch to protected mode
    6363        jmpl $gdtselector(KTEXT32_DES), $jump_to_kernel - BOOT_OFFSET + AP_BOOT_OFFSET
    64        
     64
    6565jump_to_kernel:
    6666.code32
    … …  
    7272        movw %ax, %gs
    7373       
    74         # Enable 64-bit page transaltion entries - CR4.PAE = 1.
     74        # Enable 64-bit page transaltion entries (CR4.PAE = 1).
    7575        # Paging is not enabled until after long mode is enabled
    7676       
    … …  
    7878        btsl $5, %eax
    7979        movl %eax, %cr4
    80 
     80       
    8181        leal ptl_0, %eax
    8282        movl %eax, %cr3
    8383       
    8484        # Enable long mode
    85         movl $EFER_MSR_NUM, %ecx        # EFER MSR number
    86         rdmsr                           # Read EFER
    87         btsl $AMD_LME_FLAG, %eax        # Set LME=1
    88         wrmsr                           # Write EFER
     85        movl $EFER_MSR_NUM, %ecx  # EFER MSR number
     86        rdmsr                     # Read EFER
     87        btsl $AMD_LME_FLAG, %eax  # Set LME=1
     88        wrmsr                     # Write EFER
    8989       
    90         # Enable paging to activate long mode (set CR0.PG=1)
     90        # Enable paging to activate long mode (set CR0.PG = 1)
    9191        movl %cr0, %eax
    9292        btsl $31, %eax
    … …  
    9898.code64
    9999start64:
    100         movq (ctx), %rsp
     100        movabsq $ctx, %rsp
     101        movq (%rsp), %rsp
     102       
    101103        pushq $0
    102104        movq %rsp, %rbp
    103         call main_ap - AP_BOOT_OFFSET + BOOT_OFFSET   # never returns
     105       
     106        movabsq $main_ap, %rax
     107        callq *%rax   # never returns
    104108
    105109#endif /* CONFIG_SMP */

  • kernel/arch/amd64/src/syscall.c

    r24a2517 rc621f4aa  
    6666         * - clear DF so that the string instructions operate in
    6767         *   the right direction
     68         * - clear NT to prevent a #GP should the flag proliferate to an IRET
    6869         */
    69         write_msr(AMD_MSR_SFMASK, RFLAGS_IF | RFLAGS_DF);
     70        write_msr(AMD_MSR_SFMASK, RFLAGS_IF | RFLAGS_DF | RFLAGS_NT);
    7071}
    7172

  • kernel/arch/amd64/src/userspace.c

    r24a2517 rc621f4aa  
    3636#include <arch/cpu.h>
    3737#include <arch/pm.h>
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939#include <arch.h>
    4040#include <proc/uarg.h>
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