Changeset c4c5de5 in mainline for libc/arch/mips32/include


Ignore:
Timestamp:
2006-03-24T14:29:19Z (20 years ago)
Author:
Ondrej Palkovsky <ondrap@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
8fe1cdb
Parents:
520492a
Message:

Completed support for TLS in GCC (modifier thread) for ia32,amd64,ia64 and mips.

Location:
libc/arch/mips32/include
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • libc/arch/mips32/include/psthread.h

    r520492a rc4c5de5  
    3232#include <types.h>
    3333
     34/* We define our own context_set, because we need to set
     35 * the TLS pointer to the tcb+0x7000
     36 *
     37 * See tls_set in thread.h
     38 */
     39#define context_set(c, _pc, stack, size, ptls)                  \
     40        (c)->pc = (sysarg_t) (_pc);                             \
     41        (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA;     \
     42        (c)->tls = ((sysarg_t)(ptls)) + 0x7000 + sizeof(tcb_t);
     43
     44
    3445/* +16 is just for sure that the called function
    3546 * have space to store it's arguments
  • libc/arch/mips32/include/thread.h

    r520492a rc4c5de5  
    3232#define __LIBC__mips32THREAD_H__
    3333
    34 static inline void __tls_set(void *tls)
     34/* I did not find any specification (neither MIPS nor PowerPC), but
     35 * as I found it
     36 * - it uses Variant II
     37 * - TCB is at Address(First TLS Block)+0x7000.
     38 * - DTV is at Address(First TLS Block)+0x8000
     39 * - What would happen if the TLS data was larger then 0x7000?
     40 * - The linker never accesses DTV directly, has the second definition any
     41 *   sense?
     42 * We will make it this way:
     43 * - TCB is at TP-0x7000-sizeof(tcb)
     44 * - No assumption about DTV etc., but it will not have a fixed address
     45 */
     46#define MIPS_TP_OFFSET 0x7000
     47
     48typedef struct {
     49        void *pst_data;
     50} tcb_t;
     51
     52static inline void __tcb_set(tcb_t *tcb)
    3553{
    36         __asm__ volatile ("add $27, %0, $0" : : "r"(tls)); /* Move tls to K1 */
     54        void *tp = tcb;
     55        tp += MIPS_TP_OFFSET + sizeof(tcb_t);
     56
     57        __asm__ volatile ("add $27, %0, $0" : : "r"(tp)); /* Move tls to K1 */
    3758}
    3859
    39 static inline void * __tls_get(void)
     60static inline tcb_t * __tcb_get(void)
    4061{
    4162        void * retval;
    4263
    4364        __asm__ volatile("add %0, $27, $0" : "=r"(retval));
    44         return retval;
     65
     66        return (tcb_t *)(retval - MIPS_TP_OFFSET - sizeof(tcb_t));
    4567}
    4668
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