Index: kernel/arch/arm32/src/ras.c
===================================================================
--- kernel/arch/arm32/src/ras.c	(revision 8cbf1c333889cf14d44353c7d7d73d9dbf0441a3)
+++ kernel/arch/arm32/src/ras.c	(revision c310f9b28fce022b97a4f2d6a6cfcba70ee6e090)
@@ -51,13 +51,12 @@
 void ras_init(void)
 {
-	uintptr_t frame;
-
-	frame = frame_alloc(ONE_FRAME,
+	uintptr_t frame = frame_alloc(ONE_FRAME,
 	    FRAME_ATOMIC | FRAME_HIGHMEM, 0);
 	if (!frame)
 		frame = frame_alloc(ONE_FRAME, FRAME_LOWMEM, 0);
+	
 	ras_page = (uintptr_t *) km_map(frame,
 	    PAGE_SIZE, PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);
-
+	
 	memsetb(ras_page, PAGE_SIZE, 0); 
 	ras_page[RAS_START] = 0;
Index: kernel/arch/ia64/src/mm/vhpt.c
===================================================================
--- kernel/arch/ia64/src/mm/vhpt.c	(revision 8cbf1c333889cf14d44353c7d7d73d9dbf0441a3)
+++ kernel/arch/ia64/src/mm/vhpt.c	(revision c310f9b28fce022b97a4f2d6a6cfcba70ee6e090)
@@ -46,4 +46,5 @@
 	if (!vhpt_base)
 		panic("Kernel configured with VHPT but no memory for table.");
+	
 	vhpt_invalidate_all();
 	return (uintptr_t) vhpt_base;
Index: kernel/arch/mips32/include/arch/mm/page.h
===================================================================
--- kernel/arch/mips32/include/arch/mm/page.h	(revision 8cbf1c333889cf14d44353c7d7d73d9dbf0441a3)
+++ kernel/arch/mips32/include/arch/mm/page.h	(revision c310f9b28fce022b97a4f2d6a6cfcba70ee6e090)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup mips32mm	
+/** @addtogroup mips32mm
  * @{
  */
@@ -70,10 +70,10 @@
  * - PTL3 has 4096 entries (12 bits)
  */
- 
+
 /* Macros describing number of entries in each level. */
-#define PTL0_ENTRIES_ARCH	64
-#define PTL1_ENTRIES_ARCH	0
-#define PTL2_ENTRIES_ARCH	0
-#define PTL3_ENTRIES_ARCH	4096
+#define PTL0_ENTRIES_ARCH  64
+#define PTL1_ENTRIES_ARCH  0
+#define PTL2_ENTRIES_ARCH  0
+#define PTL3_ENTRIES_ARCH  4096
 
 /* Macros describing size of page tables in each level. */
@@ -84,13 +84,13 @@
 
 /* Macros calculating entry indices for each level. */
-#define PTL0_INDEX_ARCH(vaddr)	((vaddr) >> 26) 
-#define PTL1_INDEX_ARCH(vaddr)	0
-#define PTL2_INDEX_ARCH(vaddr)	0
-#define PTL3_INDEX_ARCH(vaddr)	(((vaddr) >> 14) & 0xfff)
+#define PTL0_INDEX_ARCH(vaddr)  ((vaddr) >> 26)
+#define PTL1_INDEX_ARCH(vaddr)  0
+#define PTL2_INDEX_ARCH(vaddr)  0
+#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 14) & 0xfff)
 
 /* Set accessor for PTL0 address. */
 #define SET_PTL0_ADDRESS_ARCH(ptl0)
 
-/* Get PTE address accessors for each level. */ 
+/* Get PTE address accessors for each level. */
 #define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
 	(((pte_t *) (ptl0))[(i)].pfn << 12)
Index: kernel/arch/sparc64/src/mm/sun4u/as.c
===================================================================
--- kernel/arch/sparc64/src/mm/sun4u/as.c	(revision 8cbf1c333889cf14d44353c7d7d73d9dbf0441a3)
+++ kernel/arch/sparc64/src/mm/sun4u/as.c	(revision c310f9b28fce022b97a4f2d6a6cfcba70ee6e090)
@@ -72,5 +72,4 @@
 	
 	uintptr_t tsb = PA2KA(frame_alloc(order, flags, 0));
-	
 	if (!tsb)
 		return -1;
Index: kernel/arch/sparc64/src/mm/sun4v/as.c
===================================================================
--- kernel/arch/sparc64/src/mm/sun4v/as.c	(revision 8cbf1c333889cf14d44353c7d7d73d9dbf0441a3)
+++ kernel/arch/sparc64/src/mm/sun4v/as.c	(revision c310f9b28fce022b97a4f2d6a6cfcba70ee6e090)
@@ -70,5 +70,4 @@
 	
 	uintptr_t tsb = frame_alloc(order, flags, 0);
-	
 	if (!tsb)
 		return -1;