Index: kernel/arch/mips32/include/atomic.h
===================================================================
--- kernel/arch/mips32/include/atomic.h	(revision 26d3ae2d56cbdf7eaecdc582b53cef8f6ebf6f7c)
+++ kernel/arch/mips32/include/atomic.h	(revision c2efbb4ffae4b59dd2f12995a3926eb4251bfa3d)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup mips32	
+/** @addtogroup mips32
  * @{
  */
@@ -51,8 +51,10 @@
  *
  * @return Value after addition.
+ *
  */
-static inline long atomic_add(atomic_t *val, int i)
+static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i)
 {
-	long tmp, v;
+	atomic_count_t tmp;
+	atomic_count_t v;
 	
 	asm volatile (
@@ -64,6 +66,9 @@
 		"	beq %0, %4, 1b\n"   /* if the atomic operation failed, try again */
 		"	nop\n"
-		: "=&r" (tmp), "+m" (val->count), "=&r" (v)
-		: "r" (i), "i" (0)
+		: "=&r" (tmp),
+		  "+m" (val->count),
+		  "=&r" (v)
+		: "r" (i),
+		  "i" (0)
 	);
 	
@@ -71,6 +76,8 @@
 }
 
-static inline uint32_t test_and_set(atomic_t *val) {
-	uint32_t tmp, v;
+static inline atomic_count_t test_and_set(atomic_t *val)
+{
+	atomic_count_t tmp;
+	atomic_count_t v;
 	
 	asm volatile (
@@ -82,5 +89,7 @@
 		"	beqz %0, 1b\n"
 		"2:\n"
-		: "=&r" (tmp), "+m" (val->count), "=&r" (v)
+		: "=&r" (tmp),
+		  "+m" (val->count),
+		  "=&r" (v)
 		: "i" (1)
 	);
@@ -89,8 +98,8 @@
 }
 
-static inline void atomic_lock_arch(atomic_t *val) {
+static inline void atomic_lock_arch(atomic_t *val)
+{
 	do {
-		while (val->count)
-			;
+		while (val->count);
 	} while (test_and_set(val));
 }
Index: kernel/arch/mips32/include/types.h
===================================================================
--- kernel/arch/mips32/include/types.h	(revision 26d3ae2d56cbdf7eaecdc582b53cef8f6ebf6f7c)
+++ kernel/arch/mips32/include/types.h	(revision c2efbb4ffae4b59dd2f12995a3926eb4251bfa3d)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup mips32	
+/** @addtogroup mips32
  * @{
  */
@@ -55,4 +55,5 @@
 typedef uint32_t unative_t;
 typedef int32_t native_t;
+typedef uint32_t atomic_count_t;
 
 typedef struct {