Index: kernel/arch/ia64/src/mm/tlb.c
===================================================================
--- kernel/arch/ia64/src/mm/tlb.c	(revision 38dc82d20695b43a799be28d4fd2b2cd2c5bb785)
+++ kernel/arch/ia64/src/mm/tlb.c	(revision c1f7a3156becd4f74fa2d6074b6f098f70960f28)
@@ -662,4 +662,5 @@
 		t.d = true;
 		dtc_pte_copy(&t);
+		page_mapping_update(as, va, true, &t);
 	} else {
 		as_page_fault(va, PF_ACCESS_WRITE, istate);
@@ -694,4 +695,5 @@
 		t.a = true;
 		itc_pte_copy(&t);
+		page_mapping_update(AS, va, true, &t);
 	} else {
 		as_page_fault(va, PF_ACCESS_EXEC, istate);
@@ -728,4 +730,5 @@
 		t.a = true;
 		dtc_pte_copy(&t);
+		page_mapping_update(as, va, true, &t);
 	} else {
 		if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
Index: kernel/arch/mips32/src/mm/tlb.c
===================================================================
--- kernel/arch/mips32/src/mm/tlb.c	(revision 38dc82d20695b43a799be28d4fd2b2cd2c5bb785)
+++ kernel/arch/mips32/src/mm/tlb.c	(revision c1f7a3156becd4f74fa2d6074b6f098f70960f28)
@@ -111,4 +111,6 @@
 		    pte.cacheable, pte.pfn);
 
+		page_mapping_update(AS, badvaddr, true, &pte);
+
 		/*
 		 * New entry is to be inserted into TLB
@@ -176,4 +178,6 @@
 		tlb_prepare_entry_lo(&lo, pte.g, pte.p, pte.d,
 		    pte.cacheable, pte.pfn);
+
+		page_mapping_update(AS, badvaddr, true, &pte);
 
 		/*
@@ -239,4 +243,6 @@
 		tlb_prepare_entry_lo(&lo, pte.g, pte.p, pte.w,
 		    pte.cacheable, pte.pfn);
+
+		page_mapping_update(AS, badvaddr, true, &pte);
 
 		/*
Index: kernel/arch/sparc64/src/mm/sun4u/tlb.c
===================================================================
--- kernel/arch/sparc64/src/mm/sun4u/tlb.c	(revision 38dc82d20695b43a799be28d4fd2b2cd2c5bb785)
+++ kernel/arch/sparc64/src/mm/sun4u/tlb.c	(revision c1f7a3156becd4f74fa2d6074b6f098f70960f28)
@@ -210,4 +210,5 @@
 		itsb_pte_copy(&t, index);
 #endif
+		page_mapping_update(AS, istate->tpc, true, &t);
 	} else {
 		/*
@@ -264,4 +265,5 @@
 		dtsb_pte_copy(&t, index, true);
 #endif
+		page_mapping_update(as, page_16k, true, &t);
 	} else {
 		/*
@@ -308,4 +310,5 @@
 		dtsb_pte_copy(&t, index, false);
 #endif
+		page_mapping_update(as, page_16k, true, &t);
 	} else {
 		/*
Index: kernel/arch/sparc64/src/mm/sun4v/tlb.c
===================================================================
--- kernel/arch/sparc64/src/mm/sun4v/tlb.c	(revision 38dc82d20695b43a799be28d4fd2b2cd2c5bb785)
+++ kernel/arch/sparc64/src/mm/sun4v/tlb.c	(revision c1f7a3156becd4f74fa2d6074b6f098f70960f28)
@@ -224,4 +224,5 @@
 		itsb_pte_copy(&t);
 #endif
+		page_mapping_update(AS, va, true, &t);
 	} else {
 		/*
@@ -271,4 +272,5 @@
 		dtsb_pte_copy(&t, true);
 #endif
+		page_mapping_update(as, va, true, &t);
 	} else {
 		/*
@@ -309,4 +311,5 @@
 		dtsb_pte_copy(&t, false);
 #endif
+		page_mapping_update(as, va, true, &t);
 	} else {
 		/*
