Index: kernel/arch/arm32/include/arch/cycle.h
===================================================================
--- kernel/arch/arm32/include/arch/cycle.h	(revision 3cf22f98e8b62fe3239495266885864a48c85a80)
+++ kernel/arch/arm32/include/arch/cycle.h	(revision c1f44ca9058d587a92a07d661a9e0197a5bf1f93)
@@ -52,7 +52,10 @@
 	if ((ID_PFR1_read() & ID_PFR1_GEN_TIMER_EXT_MASK) ==
 	    ID_PFR1_GEN_TIMER_EXT) {
-	    uint32_t low = 0, high = 0;
-	    asm volatile( "MRRC p15, 0, %[low], %[high], c14": [low]"=r"(low), [high]"=r"(high));
-	   return ((uint64_t)high << 32) | low;
+		uint32_t low = 0, high = 0;
+		asm volatile (
+		    "MRRC p15, 0, %[low], %[high], c14"
+		    : [low] "=r" (low), [high] "=r" (high)
+		);
+		return ((uint64_t)high << 32) | low;
 	} else {
 		return (uint64_t)PMCCNTR_read() * 64;
Index: kernel/arch/arm32/src/mach/integratorcp/integratorcp.c
===================================================================
--- kernel/arch/arm32/src/mach/integratorcp/integratorcp.c	(revision 3cf22f98e8b62fe3239495266885864a48c85a80)
+++ kernel/arch/arm32/src/mach/integratorcp/integratorcp.c	(revision c1f44ca9058d587a92a07d661a9e0197a5bf1f93)
@@ -245,5 +245,6 @@
 void icp_cpu_halt(void)
 {
-	while (true);
+	while (true)
+		;
 }
 
@@ -345,11 +346,11 @@
 
 #ifdef CONFIG_PL011_UART
-        srln_instance_t *srln_instance = srln_init();
-        if (srln_instance) {
-                indev_t *sink = stdin_wire();
-                indev_t *srln = srln_wire(srln_instance, sink);
-                pl011_uart_input_wire(&icp.uart, srln);
-                icp_irqc_unmask(ICP_UART0_IRQ);
-        }
+	srln_instance_t *srln_instance = srln_init();
+	if (srln_instance) {
+		indev_t *sink = stdin_wire();
+		indev_t *srln = srln_wire(srln_instance, sink);
+		pl011_uart_input_wire(&icp.uart, srln);
+		icp_irqc_unmask(ICP_UART0_IRQ);
+	}
 #endif
 }