Changeset bfc6e11 in mainline for uspace/drv/infrastructure/rootamdm37x/prm/clock_control.h
- Timestamp:
- 2012-11-19T16:03:44Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 52e020b
- Parents:
- 9b11a971
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/infrastructure/rootamdm37x/prm/clock_control.h
r9b11a971 rbfc6e11 43 43 44 44 /** Clock control PRM register map 45 *46 * Periph DPLL == DPLL447 * Core DPLL == DPLL348 45 */ 49 46 typedef struct { … … 52 49 #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_12M (0x0) 53 50 #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_13M (0x1) 54 #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_19 .2M (0x2)51 #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_19_2M (0x2) 55 52 #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_26M (0x3) 56 #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_38 .4M (0x4)57 #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_16 .8M (0x5)53 #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_38_4M (0x4) 54 #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_16_8M (0x5) 58 55 59 PADD32[12] 56 PADD32[12]; 60 57 ioport32_t clkout_ctrl; 61 58 #define CLOCK_CONTROL_PRM_CLKOUT_CTRL_CLKOUOUT_EN_FLAG (1 << 7) … … 63 60 } clock_control_prm_regs_t; 64 61 62 static unsigned sys_clk_freq_kHz(unsigned reg_val) 63 { 64 switch(reg_val) 65 { 66 case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_12M: return 12000; 67 case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_13M: return 13000; 68 case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_19_2M: return 19200; 69 case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_26M: return 26000; 70 case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_38_4M: return 38400; 71 case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_16_8M: return 16800; 72 } 73 return 0; 74 } 75 76 65 77 #endif 66 78 /**
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