Index: kernel/arch/arm32/include/barrier.h
===================================================================
--- kernel/arch/arm32/include/barrier.h	(revision a14f3465b7d65eb909b06cf7a9a15f60743bcabe)
+++ kernel/arch/arm32/include/barrier.h	(revision bfb6576e89c4d2600b157907c8fa8b70434a94d0)
@@ -113,5 +113,6 @@
 	inst_barrier();              /* Wait for Inst refetch */\
 } while (0)
-//TODO would be better to use cacheline size here
+/* @note: Cache type register is not awailable in uspace. We would need
+ * to export the cache line value, or use syscall for uspace smc_coherence */
 #define smc_coherence_block(a, l) \
 do { \
