Changeset bfb6576 in mainline for boot/arch/arm32/src/mm.c

Timestamp:

2013-01-23T00:12:15Z (12 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

b80d132

Parents:

c19808fd

Message:

arm32, boot: Rework boot time cache handling. Enable Icache early.

Dcache still hangs after jumping to kernel.

File:

• boot/arch/arm32/src/mm.c (modified) (3 diffs)

boot/arch/arm32/src/mm.c

@@ -59 +59 @@
         const unsigned long address = section << PTE_SECTION_SHIFT;
         if (address >= BBXM_RAM_START && address < BBXM_RAM_END)
-                return 0;
+                return 1;
 #endif
         return 0;
@@ -133 +133 @@
                 "mcr p15, 0, r0, c3, c0, 0\n"
                 
-#ifdef PROCESSOR_ARCH_armv7_a
-                /* armv7 no longer requires cache entries to be invalid
-                 * upon reset, do this manually */
-                /* Invalidate ICache */
-                "mcr p15, 0, r0, c7, c5, 6\n"
-                //TODO: Invalidate data cache
-#endif
-
                 /* Current settings */
                 "mrc p15, 0, r0, c1, c0, 0\n"
@@ -151 +143 @@
                  * It's safe for gta02 too because we turn the caches off
                  * before switching to kernel. */
-                "ldr r1, =0x00001805\n"
+                "ldr r1, =0x00001801\n"
 #elif defined(PROCESSOR_ARCH_armv7_a) | defined(PROCESSOR_ARCH_armv6)
                 /* Enable paging, data cache and branch prediction