Index: kernel/arch/mips32/include/arch/barrier.h
===================================================================
--- kernel/arch/mips32/include/arch/barrier.h	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/mips32/include/arch/barrier.h	(revision bd41ac52cf7d20e9e568c519bf2cb5ac7104b86a)
@@ -48,6 +48,5 @@
 #ifdef KERNEL
 
-#define smc_coherence(a)
-#define smc_coherence_block(a, l)
+#define smc_coherence(a, l)
 
 #endif	/* KERNEL */
Index: kernel/arch/mips32/src/debugger.c
===================================================================
--- kernel/arch/mips32/src/debugger.c	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/mips32/src/debugger.c	(revision bd41ac52cf7d20e9e568c519bf2cb5ac7104b86a)
@@ -213,5 +213,5 @@
 	/* Set breakpoint */
 	*((sysarg_t *) cur->address) = 0x0d;
-	smc_coherence(cur->address);
+	smc_coherence(cur->address, 4);
 
 	irq_spinlock_unlock(&bkpoint_lock, true);
@@ -246,7 +246,7 @@
 
 	((uint32_t *) cur->address)[0] = cur->instruction;
-	smc_coherence(((uint32_t *) cur->address)[0]);
+	smc_coherence(((uint32_t *) cur->address)[0], 4);
 	((uint32_t *) cur->address)[1] = cur->nextinstruction;
-	smc_coherence(((uint32_t *) cur->address)[1]);
+	smc_coherence(((uint32_t *) cur->address)[1], 4);
 
 	cur->address = (uintptr_t) NULL;
@@ -358,9 +358,9 @@
 			/* Set breakpoint on first instruction */
 			((uint32_t *) cur->address)[0] = 0x0d;
-			smc_coherence(((uint32_t *)cur->address)[0]);
+			smc_coherence(((uint32_t *)cur->address)[0], 4);
 
 			/* Return back the second */
 			((uint32_t *) cur->address)[1] = cur->nextinstruction;
-			smc_coherence(((uint32_t *) cur->address)[1]);
+			smc_coherence(((uint32_t *) cur->address)[1], 4);
 
 			cur->flags &= ~BKPOINT_REINST;
@@ -380,5 +380,5 @@
 		/* Return first instruction back */
 		((uint32_t *)cur->address)[0] = cur->instruction;
-		smc_coherence(cur->address);
+		smc_coherence(cur->address, 4);
 
 		if (!(cur->flags & BKPOINT_ONESHOT)) {
Index: kernel/arch/mips32/src/mips32.c
===================================================================
--- kernel/arch/mips32/src/mips32.c	(revision 05882233d8ca97c6879ac5c42456c344c8569d89)
+++ kernel/arch/mips32/src/mips32.c	(revision bd41ac52cf7d20e9e568c519bf2cb5ac7104b86a)
@@ -121,9 +121,9 @@
 	/* Copy the exception vectors to the right places */
 	memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
-	smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
+	smc_coherence(TLB_EXC, EXCEPTION_JUMP_SIZE);
 	memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
-	smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
+	smc_coherence(NORM_EXC, EXCEPTION_JUMP_SIZE);
 	memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
-	smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
+	smc_coherence(CACHE_EXC, EXCEPTION_JUMP_SIZE);
 
 	/*