Changeset bc73be3 in mainline for kernel/arch/mips32


Ignore:
Timestamp:
2019-06-27T08:51:20Z (7 years ago)
Author:
Jaroslav Jindrak <dzejrou@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/fix-logger-deadlock, topic/msim-upgrade, topic/simplify-dev-export
Children:
8add15e0
Parents:
ad40b74b (diff), aeba767 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

cpp: merge and resolve conflicts

Location:
kernel/arch/mips32
Files:
1 added
18 edited
1 moved

Legend:

Unmodified
Added
Removed

  • kernel/arch/mips32/Makefile.inc

    rad40b74b rbc73be3  
    7070        arch/$(KARCH)/src/machine_func.c
    7171
    72 ifeq ($(MACHINE),msim)
    73         ARCH_SOURCES += \
    74                 arch/$(KARCH)/src/smp/dorder.c
    75 endif
    76 
    7772ifeq ($(MACHINE),$(filter lmalta bmalta,$(MACHINE)))
    7873        ARCH_SOURCES += arch/$(KARCH)/src/mach/malta/malta.c
    … …  
    8075
    8176ifeq ($(MACHINE),msim)
    82         ARCH_SOURCES += arch/$(KARCH)/src/mach/msim/msim.c
     77        ARCH_SOURCES += \
     78                arch/$(KARCH)/src/mach/msim/msim.c \
     79                arch/$(KARCH)/src/mach/msim/dorder.c
    8380endif
    8481

  • kernel/arch/mips32/include/arch/arch.h

    rad40b74b rbc73be3  
    4242#define CPUMAP_MAX_RECORDS         32
    4343#define BOOTINFO_TASK_NAME_BUFLEN  32
     44#define BOOTINFO_BOOTARGS_BUFLEN   256
    4445
    4546extern size_t cpu_count;
    … …  
    6667        uint32_t cpumap;
    6768        taskmap_t taskmap;
     69        char bootargs[BOOTINFO_BOOTARGS_BUFLEN];
    6870} bootinfo_t;
    6971

  • kernel/arch/mips32/include/arch/asm.h

    rad40b74b rbc73be3  
    4040#include <trace.h>
    4141
    42 NO_TRACE static inline void cpu_sleep(void)
     42_NO_TRACE static inline void cpu_sleep(void)
    4343{
    4444        asm volatile ("wait");
    … …  
    5252 *
    5353 */
    54 NO_TRACE static inline uintptr_t get_stack_base(void)
     54_NO_TRACE static inline uintptr_t get_stack_base(void)
    5555{
    5656        uintptr_t base;
    … …  
    6565}
    6666
    67 NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v)
     67_NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v)
    6868{
    6969        *port = v;
    7070}
    7171
    72 NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v)
     72_NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v)
    7373{
    7474        *port = v;
    7575}
    7676
    77 NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v)
     77_NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v)
    7878{
    7979        *port = v;
    8080}
    8181
    82 NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
     82_NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
    8383{
    8484        return *port;
    8585}
    8686
    87 NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
     87_NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
    8888{
    8989        return *port;
    9090}
    9191
    92 NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
     92_NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
    9393{
    9494        return *port;

  • kernel/arch/mips32/include/arch/cycle.h

    rad40b74b rbc73be3  
    4040#include <trace.h>
    4141
    42 NO_TRACE static inline uint64_t get_cycle(void)
     42_NO_TRACE static inline uint64_t get_cycle(void)
    4343{
    4444        return ((uint64_t) count_hi << 32) + ((uint64_t) cp0_count_read());

  • kernel/arch/mips32/include/arch/exception.h

    rad40b74b rbc73be3  
    5757#define EXC_VCED   31
    5858
     59#define INT_SW0    0
     60#define INT_SW1    1
     61#define INT_HW0    2
     62#define INT_HW1    3
     63#define INT_HW2    4
     64#define INT_HW3    5
     65#define INT_HW4    6
     66#define INT_TIMER  7
     67
     68#define MIPS_INTERRUPTS    8
     69#define HW_INTERRUPTS      (MIPS_INTERRUPTS - 3)
     70
     71typedef void (*int_handler_t)(unsigned int);
     72extern int_handler_t int_handler[];
     73
    5974extern void exception(istate_t *istate);
    6075extern void tlb_refill_entry(void);

  • kernel/arch/mips32/include/arch/istate.h

    rad40b74b rbc73be3  
    5050#endif /* KERNEL */
    5151
    52 NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
     52_NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
    5353    uintptr_t retaddr)
    5454{
    … …  
    5757
    5858/** Return true if exception happened while in userspace */
    59 NO_TRACE static inline int istate_from_uspace(istate_t *istate)
     59_NO_TRACE static inline int istate_from_uspace(istate_t *istate)
    6060{
    6161        return istate->status & cp0_status_um_bit;
    6262}
    6363
    64 NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate)
     64_NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate)
    6565{
    6666        return istate->epc;
    6767}
    6868
    69 NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate)
     69_NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate)
    7070{
    7171        return istate->sp;

  • kernel/arch/mips32/include/arch/mach/malta/malta.h

    rad40b74b rbc73be3  
    3838
    3939#include <arch/machine_func.h>
     40#include <arch/mm/page.h>
     41#include <typedefs.h>
     42
     43#define MALTA_PCI_PHYSBASE      0x18000000UL
     44
     45#define MALTA_PCI_BASE          PA2KSEG1(MALTA_PCI_PHYSBASE)
     46#define MALTA_GT64120_BASE      PA2KSEG1(0x1be00000UL)
     47
     48#define PIC0_BASE               (MALTA_PCI_BASE + 0x20)
     49#define PIC1_BASE               (MALTA_PCI_BASE + 0xa0)
     50
     51#define ISA_IRQ_COUNT           16
     52
     53#define TTY_BASE                (MALTA_PCI_PHYSBASE + 0x3f8)
     54#define TTY_ISA_IRQ             4
     55
     56#define GT64120_PCI0_INTACK     ((ioport32_t *) (MALTA_GT64120_BASE + 0xc34))
    4057
    4158extern struct mips32_machine_ops malta_machine_ops;

  • kernel/arch/mips32/include/arch/mach/msim/dorder.h

    rad40b74b rbc73be3  
    3838#include <stdint.h>
    3939
     40extern void dorder_init(void);
    4041extern uint32_t dorder_cpuid(void);
    4142extern void dorder_ipi_ack(uint32_t);

  • kernel/arch/mips32/include/arch/mach/msim/msim.h

    rad40b74b rbc73be3  
    3838
    3939#include <arch/machine_func.h>
     40#include <arch/mm/page.h>
     41
     42/** Address of devices. */
     43#define MSIM_VIDEORAM        PA2KSEG1(0x10000000)
     44#define MSIM_KBD_ADDRESS     PA2KSEG1(0x10000000)
     45#define MSIM_DORDER_ADDRESS  PA2KSEG1(0x10000100)
     46
     47#define MSIM_KBD_IRQ      2
     48#define MSIM_DORDER_IRQ   5
     49#define MSIM_DDISK_IRQ    6
    4050
    4151extern struct mips32_machine_ops msim_machine_ops;

  • kernel/arch/mips32/include/arch/machine_func.h

    rad40b74b rbc73be3  
    4343
    4444#include <typedefs.h>
     45#include <stdbool.h>
    4546
    4647struct mips32_machine_ops {

  • kernel/arch/mips32/include/arch/mm/as.h

    rad40b74b rbc73be3  
    3737
    3838#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH  0
     39#define KERNEL_SEPARATE_PTL0_ARCH           0
    3940
    4041#define KERNEL_ADDRESS_SPACE_START_ARCH  UINT32_C(0x80000000)

  • kernel/arch/mips32/include/arch/mm/page.h

    rad40b74b rbc73be3  
    4343
    4444#ifndef __ASSEMBLER__
     45#       define KSEG12PA(x)      (((uintptr_t) (x)) - 0xa0000000)
     46#       define PA2KSEG1(x)      (((uintptr_t) (x)) + 0xa0000000)
    4547#       define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
    4648#       define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
    … …  
    161163} pte_t;
    162164
    163 NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
     165_NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
    164166{
    165167        pte_t *p = &pt[i];
    … …  
    174176}
    175177
    176 NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
     178_NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
    177179{
    178180        pte_t *p = &pt[i];
    … …  
    189191}
    190192
    191 NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i)
     193_NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i)
    192194{
    193195        pte_t *p = &pt[i];

  • kernel/arch/mips32/include/arch/mm/tlb.h

    rad40b74b rbc73be3  
    135135 * Probe TLB for Matching Entry.
    136136 */
    137 NO_TRACE static inline void tlbp(void)
     137_NO_TRACE static inline void tlbp(void)
    138138{
    139139        asm volatile ("tlbp\n\t");
    … …  
    144144 * Read Indexed TLB Entry.
    145145 */
    146 NO_TRACE static inline void tlbr(void)
     146_NO_TRACE static inline void tlbr(void)
    147147{
    148148        asm volatile ("tlbr\n\t");
    … …  
    153153 * Write Indexed TLB Entry.
    154154 */
    155 NO_TRACE static inline void tlbwi(void)
     155_NO_TRACE static inline void tlbwi(void)
    156156{
    157157        asm volatile ("tlbwi\n\t");
    … …  
    162162 * Write Random TLB Entry.
    163163 */
    164 NO_TRACE static inline void tlbwr(void)
     164_NO_TRACE static inline void tlbwr(void)
    165165{
    166166        asm volatile ("tlbwr\n\t");

  • kernel/arch/mips32/src/exception.c

    rad40b74b rbc73be3  
    4747#include <symtab.h>
    4848#include <log.h>
     49#include <arch/machine_func.h>
    4950
    5051static const char *exctable[] = {
    … …  
    174175
    175176        unsigned int i;
    176         for (i = 0; i < 8; i++) {
     177        for (i = 0; i < MIPS_INTERRUPTS; i++) {
    177178
    178179                /*
    … …  
    183184                 */
    184185                if (im & ip & (1 << i)) {
    185                         irq_t *irq = irq_dispatch_and_lock(i);
    186                         if (irq) {
    187                                 /*
    188                                  * The IRQ handler was found.
    189                                  */
    190                                 irq->handler(irq);
    191                                 irq_spinlock_unlock(&irq->lock, false);
    192                         } else {
     186                        if (int_handler[i])
     187                                int_handler[i](i);
     188                        else {
    193189                                /*
    194190                                 * Spurious interrupt.

  • kernel/arch/mips32/src/interrupt.c

    rad40b74b rbc73be3  
    3838#include <arch.h>
    3939#include <arch/cp0.h>
    40 #include <arch/smp/dorder.h>
    4140#include <time/clock.h>
    4241#include <ipc/sysipc.h>
    43 
    44 #define IRQ_COUNT   8
    45 #define TIMER_IRQ   7
    46 
    47 #ifdef MACHINE_msim
    48 #define DORDER_IRQ  5
    49 #endif
    50 
    51 function virtual_timer_fnc = NULL;
    52 static irq_t timer_irq;
    53 
    54 #ifdef MACHINE_msim
    55 static irq_t dorder_irq;
    56 #endif
    5742
    5843// TODO: This is SMP unsafe!!!
    … …  
    6146static unsigned long nextcount;
    6247static unsigned long lastcount;
     48
     49/** Table of interrupt handlers. */
     50int_handler_t int_handler[MIPS_INTERRUPTS] = { };
    6351
    6452/** Disable interrupts.
    … …  
    122110}
    123111
    124 static irq_ownership_t timer_claim(irq_t *irq)
    125 {
    126         return IRQ_ACCEPT;
    127 }
    128 
    129 static void timer_irq_handler(irq_t *irq)
     112static void timer_interrupt_handler(unsigned int intr)
    130113{
    131114        if (cp0_count_read() < lastcount)
    … …  
    144127        cp0_compare_write(nextcount);
    145128
    146         /*
    147          * We are holding a lock which prevents preemption.
    148          * Release the lock, call clock() and reacquire the lock again.
    149          */
    150         irq_spinlock_unlock(&irq->lock, false);
    151129        clock();
    152         irq_spinlock_lock(&irq->lock, false);
    153 
    154         if (virtual_timer_fnc != NULL)
    155                 virtual_timer_fnc();
    156130}
    157 
    158 #ifdef MACHINE_msim
    159 static irq_ownership_t dorder_claim(irq_t *irq)
    160 {
    161         return IRQ_ACCEPT;
    162 }
    163 
    164 static void dorder_irq_handler(irq_t *irq)
    165 {
    166         dorder_ipi_ack(1 << dorder_cpuid());
    167 }
    168 #endif
    169131
    170132/* Initialize basic tables for exception dispatching */
    171133void interrupt_init(void)
    172134{
    173         irq_init(IRQ_COUNT, IRQ_COUNT);
    174 
    175         irq_initialize(&timer_irq);
    176         timer_irq.inr = TIMER_IRQ;
    177         timer_irq.claim = timer_claim;
    178         timer_irq.handler = timer_irq_handler;
    179         irq_register(&timer_irq);
     135        int_handler[INT_TIMER] = timer_interrupt_handler;
    180136
    181137        timer_start();
    182         cp0_unmask_int(TIMER_IRQ);
    183 
    184 #ifdef MACHINE_msim
    185         irq_initialize(&dorder_irq);
    186         dorder_irq.inr = DORDER_IRQ;
    187         dorder_irq.claim = dorder_claim;
    188         dorder_irq.handler = dorder_irq_handler;
    189         irq_register(&dorder_irq);
    190 
    191         cp0_unmask_int(DORDER_IRQ);
    192 #endif
     138        cp0_unmask_int(INT_TIMER);
    193139}
    194140

  • kernel/arch/mips32/src/mach/malta/malta.c

    rad40b74b rbc73be3  
    3838#include <console/chardev.h>
    3939#include <arch/mm/page.h>
     40#include <genarch/drivers/i8259/i8259.h>
     41#include <genarch/drivers/ns16550/ns16550.h>
     42#include <genarch/srln/srln.h>
     43#include <arch/interrupt.h>
     44#include <stdbool.h>
     45#include <byteorder.h>
     46#include <sysinfo/sysinfo.h>
     47#include <log.h>
    4048
    4149static void malta_init(void);
    … …  
    5765};
    5866
     67#ifdef CONFIG_NS16550
     68static ns16550_instance_t *tty_instance;
     69#endif
     70#ifdef CONFIG_NS16550_OUT
     71static outdev_t *tty_out;
     72#endif
     73
     74static void malta_isa_irq_handler(unsigned int i)
     75{
     76        uint8_t isa_irq = host2uint32_t_le(pio_read_32(GT64120_PCI0_INTACK));
     77        if (i8259_is_spurious(isa_irq)) {
     78                i8259_handle_spurious(isa_irq);
     79#ifdef CONFIG_DEBUG
     80                log(LF_ARCH, LVL_DEBUG, "cpu%u: PIC spurious interrupt %u",
     81                    CPU->id, isa_irq);
     82                return;
     83#endif
     84        }
     85        irq_t *irq = irq_dispatch_and_lock(isa_irq);
     86        if (irq) {
     87                irq->handler(irq);
     88                irq_spinlock_unlock(&irq->lock, false);
     89        } else {
     90#ifdef CONFIG_DEBUG
     91                log(LF_ARCH, LVL_DEBUG, "cpu%u: unhandled IRQ (irq=%u)",
     92                    CPU->id, isa_irq);
     93#endif
     94        }
     95        i8259_eoi(isa_irq);
     96}
     97
    5998void malta_init(void)
    6099{
     100        irq_init(ISA_IRQ_COUNT, ISA_IRQ_COUNT);
     101
     102        i8259_init((i8259_t *) PIC0_BASE, (i8259_t *) PIC1_BASE, 0);
     103        sysinfo_set_item_val("i8259", NULL, true);
     104
     105        int_handler[INT_HW0] = malta_isa_irq_handler;
     106        cp0_unmask_int(INT_HW0);
     107
     108#if (defined(CONFIG_NS16550) || defined(CONFIG_NS16550_OUT))
     109#ifdef CONFIG_NS16550_OUT
     110        outdev_t **tty_out_ptr = &tty_out;
     111#else
     112        outdev_t **tty_out_ptr = NULL;
     113#endif
     114        tty_instance = ns16550_init((ioport8_t *) TTY_BASE, 0, TTY_ISA_IRQ,
     115            NULL, NULL, tty_out_ptr);
     116#endif
    61117}
    62118
    … …  
    73129}
    74130
    75 #define YAMON_SUBR_BASE         PA2KA(0x1fc00500)
    76 #define YAMON_SUBR_PRINT_COUNT  (YAMON_SUBR_BASE + 0x4)
    77 
    78 typedef void (**yamon_print_count_ptr_t)(uint32_t, const char *, uint32_t);
    79 
    80 yamon_print_count_ptr_t yamon_print_count =
    81     (yamon_print_count_ptr_t) YAMON_SUBR_PRINT_COUNT;
    82 
    83 static void yamon_putwchar(outdev_t *dev, const wchar_t wch)
    84 {
    85 
    86         const char ch = (char) wch;
    87 
    88         (*yamon_print_count)(0, &ch, 1);
    89 }
    90 
    91 static outdev_t yamon_outdev;
    92 static outdev_operations_t yamon_outdev_ops = {
    93         .write = yamon_putwchar,
    94         .redraw = NULL,
    95         .scroll_up = NULL,
    96         .scroll_down = NULL
    97 };
    98 
    99131void malta_output_init(void)
    100132{
    101         outdev_initialize("yamon", &yamon_outdev, &yamon_outdev_ops);
    102         stdout_wire(&yamon_outdev);
     133#ifdef CONFIG_NS16550_OUT
     134        if (tty_out)
     135                stdout_wire(tty_out);
     136#endif
    103137}
    104138
    105139void malta_input_init(void)
    106140{
    107         (void) stdin_wire();
     141#ifdef CONFIG_NS16550
     142        if (tty_instance) {
     143                srln_instance_t *srln_instance = srln_init();
     144                if (srln_instance) {
     145                        indev_t *sink = stdin_wire();
     146                        indev_t *srln = srln_wire(srln_instance, sink);
     147                        ns16550_wire(tty_instance, srln);
     148                        i8259_enable_irqs(1 << TTY_ISA_IRQ);
     149                }
     150        }
     151#endif
    108152}
    109153

  • kernel/arch/mips32/src/mach/msim/msim.c

    rad40b74b rbc73be3  
    3535
    3636#include <arch/mach/msim/msim.h>
     37#include <arch/mach/msim/dorder.h>
    3738#include <console/console.h>
    3839#include <sysinfo/sysinfo.h>
    39 #include <arch/drivers/msim.h>
    4040#include <genarch/drivers/dsrln/dsrlnin.h>
    4141#include <genarch/drivers/dsrln/dsrlnout.h>
    4242#include <genarch/srln/srln.h>
     43#include <stdbool.h>
    4344
    4445static void msim_init(void);
    … …  
    6061};
    6162
     63static void msim_irq_handler(unsigned int i)
     64{
     65        irq_t *irq = irq_dispatch_and_lock(i);
     66        if (irq) {
     67                irq->handler(irq);
     68                irq_spinlock_unlock(&irq->lock, false);
     69        } else {
     70#ifdef CONFIG_DEBUG
     71                log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious IRQ (irq=%u)",
     72                    CPU->id, i);
     73#endif
     74        }
     75}
     76
    6277void msim_init(void)
    6378{
     79        irq_init(HW_INTERRUPTS, HW_INTERRUPTS);
     80
     81        int_handler[INT_HW0] = msim_irq_handler;
     82        int_handler[INT_HW1] = msim_irq_handler;
     83        int_handler[INT_HW2] = msim_irq_handler;
     84        int_handler[INT_HW3] = msim_irq_handler;
     85        int_handler[INT_HW4] = msim_irq_handler;
     86
     87        dorder_init();
    6488        cp0_unmask_int(MSIM_DDISK_IRQ);
    6589}
    … …  
    80104{
    81105#ifdef CONFIG_MSIM_PRN
    82         outdev_t *dsrlndev = dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS);
     106        outdev_t *dsrlndev = dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS,
     107            KSEG12PA(MSIM_KBD_ADDRESS));
    83108        if (dsrlndev)
    84109                stdout_wire(dsrlndev);

  • kernel/arch/mips32/src/mips32.c

    rad40b74b rbc73be3  
    7171arch_ops_t *arch_ops = &mips32_ops;
    7272
    73 /*
    74  * Why the linker moves the variable 64K away in assembler
    75  * when not in .text section?
    76  */
    77 
    7873/* Stack pointer saved when entering user mode */
    79 uintptr_t supervisor_sp __attribute__((section(".text")));
     74// FIXME: This won't work with SMP unless thread creation is globally serialized.
     75uintptr_t supervisor_sp;
    8076
    8177size_t cpu_count = 0;
    … …  
    106102        sdram_size = bootinfo->sdram_size;
    107103#endif
     104
     105        str_cpy(bargs, CONFIG_BOOT_ARGUMENTS_BUFLEN, bootinfo->bootargs);
    108106
    109107        /* Initialize machine_ops pointer. */

  • kernel/arch/mips32/src/mm/frame.c

    rad40b74b rbc73be3  
    4141#include <config.h>
    4242#ifdef MACHINE_msim
    43 #include <arch/drivers/msim.h>
     43#include <arch/mach/msim/msim.h>
    4444#endif
    4545#include <arch/arch.h>
    … …  
    5757
    5858#define ZERO_PAGE_VALUE_KSEG1(frame) \
    59         (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
     59        (((volatile uint32_t *) PA2KSEG1(frame << ZERO_PAGE_WIDTH))[ZERO_PAGE_OFFSET])
    6060
    6161#define MAX_REGIONS  32
    … …  
    8080#ifdef MACHINE_msim
    8181        /* MSIM device (dprinter) */
    82         if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
     82        if (frame == (KSEG12PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
    8383                return false;
    8484
    8585        /* MSIM device (dkeyboard) */
    86         if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
     86        if (frame == (KSEG12PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
    8787                return false;
    8888#endif
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