Changeset bc314be8 in mainline for arch/ia64/include

Timestamp:

2006-03-05T16:21:36Z (20 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

83d2d0e

Parents:

9e5938dc

Message:

ia64 work.

Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.

Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.

Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.)

Location:

arch/ia64/include

Files:

• mm/frame.h (modified) (1 diff)
• register.h (modified) (1 diff)

arch/ia64/include/mm/frame.h

@@ -30 +30 @@
 #define __ia64_FRAME_H__
 
-#define FRAME_WIDTH   14        /* 16K */
+/*
+ * Frame is defined to be 64K long.
+ * Such a relatively big frame size is used because of kernel stack requirements
+ * and organization. Portion of the stack reserved for RSE must be at least 16K
+ * long. If the memory stack is to have some space allocated, the next available
+ * frame size (i.e. 64K) needs to be used.
+ */
+#define FRAME_WIDTH   16        /* 64K */
 #define FRAME_SIZE              (1<<FRAME_WIDTH)
 

arch/ia64/include/register.h

@@ -42 +42 @@
 #define PSR_RT_MASK     (1<<27)
 #define PSR_IT_MASK     0x0000001000000000
-
-
 
 /** Application registers. */