Index: uspace/lib/libc/Makefile =================================================================== --- uspace/lib/libc/Makefile (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/Makefile (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -64,5 +64,5 @@ generic/io/printf_core.c \ malloc/malloc.c \ - generic/psthread.c \ + generic/fibril.c \ generic/sysinfo.c \ generic/ipc.c \ Index: uspace/lib/libc/arch/amd64/Makefile.inc =================================================================== --- uspace/lib/libc/arch/amd64/Makefile.inc (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/amd64/Makefile.inc (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -34,5 +34,5 @@ ARCH_SOURCES += arch/$(ARCH)/src/syscall.S \ - arch/$(ARCH)/src/psthread.S \ + arch/$(ARCH)/src/fibril.S \ arch/$(ARCH)/src/thread.c Index: uspace/lib/libc/arch/amd64/include/fibril.h =================================================================== --- uspace/lib/libc/arch/amd64/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/amd64/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2006 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup libcamd64 + * @{ + */ +/** @file + */ + +#ifndef LIBC_amd64_FIBRIL_H_ +#define LIBC_amd64_FIBRIL_H_ + +#include + +/* According to ABI the stack MUST be aligned on + * 16-byte boundary. If it is not, the va_arg calling will + * panic sooner or later + */ +#define SP_DELTA 16 + +/* We include only registers that must be preserved + * during function call + */ +typedef struct { + uint64_t sp; + uint64_t pc; + + uint64_t rbx; + uint64_t rbp; + + uint64_t r12; + uint64_t r13; + uint64_t r14; + uint64_t r15; + + uint64_t tls; +} context_t; + +#endif + +/** @} + */ Index: uspace/lib/libc/arch/amd64/include/psthread.h =================================================================== --- uspace/lib/libc/arch/amd64/include/psthread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,67 +1,0 @@ -/* - * Copyright (c) 2006 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup libcamd64 - * @{ - */ -/** @file - */ - -#ifndef LIBC_amd64_PSTHREAD_H_ -#define LIBC_amd64_PSTHREAD_H_ - -#include - -/* According to ABI the stack MUST be aligned on - * 16-byte boundary. If it is not, the va_arg calling will - * panic sooner or later - */ -#define SP_DELTA 16 - -/* We include only registers that must be preserved - * during function call - */ -typedef struct { - uint64_t sp; - uint64_t pc; - - uint64_t rbx; - uint64_t rbp; - - uint64_t r12; - uint64_t r13; - uint64_t r14; - uint64_t r15; - - uint64_t tls; -} context_t; - -#endif - -/** @} - */ Index: uspace/lib/libc/arch/amd64/include/thread.h =================================================================== --- uspace/lib/libc/arch/amd64/include/thread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/amd64/include/thread.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -40,5 +40,5 @@ typedef struct { void *self; - void *pst_data; + void *fibril_data; } tcb_t; Index: uspace/lib/libc/arch/amd64/src/fibril.S =================================================================== --- uspace/lib/libc/arch/amd64/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/amd64/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,87 @@ +# +# Copyright (c) 2001-2004 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +.text + +.global context_save +.global context_restore + +#include + +## Save current CPU context +# +# Save CPU context to context_t variable +# pointed by the 1st argument. Returns 1 in EAX. +# +context_save: + movq (%rsp), %rdx # the caller's return %eip + # In %edi is passed 1st argument + movq %rdx, OFFSET_PC(%rdi) + movq %rsp, OFFSET_SP(%rdi) + + movq %rbx, OFFSET_RBX(%rdi) + movq %rbp, OFFSET_RBP(%rdi) + movq %r12, OFFSET_R12(%rdi) + movq %r13, OFFSET_R13(%rdi) + movq %r14, OFFSET_R14(%rdi) + movq %r15, OFFSET_R15(%rdi) + + # Save TLS + movq %fs:0, %rax + movq %rax, OFFSET_TLS(%rdi) + + xorq %rax,%rax # context_save returns 1 + incq %rax + ret + + +## Restore current CPU context +# +# Restore CPU context from context_t variable +# pointed by the 1st argument. Returns 0 in EAX. +# +context_restore: + movq OFFSET_R15(%rdi), %r15 + movq OFFSET_R14(%rdi), %r14 + movq OFFSET_R13(%rdi), %r13 + movq OFFSET_R12(%rdi), %r12 + movq OFFSET_RBP(%rdi), %rbp + movq OFFSET_RBX(%rdi), %rbx + + movq OFFSET_SP(%rdi), %rsp # ctx->sp -> %rsp + + movq OFFSET_PC(%rdi), %rdx + movq %rdx,(%rsp) + + # Set thread local storage + movq OFFSET_TLS(%rdi), %rdi # Set arg1 to TLS addr + movq $1, %r8 + syscall + + xorq %rax,%rax # context_restore returns 0 + ret Index: uspace/lib/libc/arch/amd64/src/psthread.S =================================================================== --- uspace/lib/libc/arch/amd64/src/psthread.S (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,87 +1,0 @@ -# -# Copyright (c) 2001-2004 Jakub Jermar -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# - Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# - Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# - The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -.text - -.global context_save -.global context_restore - -#include - -## Save current CPU context -# -# Save CPU context to context_t variable -# pointed by the 1st argument. Returns 1 in EAX. -# -context_save: - movq (%rsp), %rdx # the caller's return %eip - # In %edi is passed 1st argument - movq %rdx, OFFSET_PC(%rdi) - movq %rsp, OFFSET_SP(%rdi) - - movq %rbx, OFFSET_RBX(%rdi) - movq %rbp, OFFSET_RBP(%rdi) - movq %r12, OFFSET_R12(%rdi) - movq %r13, OFFSET_R13(%rdi) - movq %r14, OFFSET_R14(%rdi) - movq %r15, OFFSET_R15(%rdi) - - # Save TLS - movq %fs:0, %rax - movq %rax, OFFSET_TLS(%rdi) - - xorq %rax,%rax # context_save returns 1 - incq %rax - ret - - -## Restore current CPU context -# -# Restore CPU context from context_t variable -# pointed by the 1st argument. Returns 0 in EAX. -# -context_restore: - movq OFFSET_R15(%rdi), %r15 - movq OFFSET_R14(%rdi), %r14 - movq OFFSET_R13(%rdi), %r13 - movq OFFSET_R12(%rdi), %r12 - movq OFFSET_RBP(%rdi), %rbp - movq OFFSET_RBX(%rdi), %rbx - - movq OFFSET_SP(%rdi), %rsp # ctx->sp -> %rsp - - movq OFFSET_PC(%rdi), %rdx - movq %rdx,(%rsp) - - # Set thread local storage - movq OFFSET_TLS(%rdi), %rdi # Set arg1 to TLS addr - movq $1, %r8 - syscall - - xorq %rax,%rax # context_restore returns 0 - ret Index: uspace/lib/libc/arch/arm32/Makefile.inc =================================================================== --- uspace/lib/libc/arch/arm32/Makefile.inc (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/arm32/Makefile.inc (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -37,5 +37,5 @@ ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \ - arch/$(ARCH)/src/psthread.S \ + arch/$(ARCH)/src/fibril.S \ arch/$(ARCH)/src/thread.c \ arch/$(ARCH)/src/eabi.S Index: uspace/lib/libc/arch/arm32/include/fibril.h =================================================================== --- uspace/lib/libc/arch/arm32/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/arm32/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup libcarm32 + * @{ + */ +/** @file + * @brief Fibrils related declarations. + */ + +#ifndef LIBC_arm32_FIBRIL_H_ +#define LIBC_arm32_FIBRIL_H_ + +#include +#include +#include "thread.h" + +/** Size of a stack item */ +#define STACK_ITEM_SIZE 4 + +/** Stack alignment - see ABI for details */ +#define STACK_ALIGNMENT 8 + +#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) + + +/** Sets data to the context. + * + * @param c Context (#context_t). + * @param _pc Program counter. + * @param stack Stack address. + * @param size Stack size. + * @param ptls Pointer to the TCB. + */ +#define context_set(c, _pc, stack, size, ptls) \ + (c)->pc = (sysarg_t) (_pc); \ + (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \ + (c)->tls = ((sysarg_t)(ptls)) + sizeof(tcb_t) + ARM_TP_OFFSET; + + +/** Fibril context. + * + * Only registers preserved accross function calls are included. r9 is used + * to store a TLS address. -ffixed-r9 gcc forces gcc not to use this + * register. -mtp=soft forces gcc to use #__aeabi_read_tp to obtain + * TLS address. + */ +typedef struct { + uint32_t sp; + uint32_t pc; + uint32_t r4; + uint32_t r5; + uint32_t r6; + uint32_t r7; + uint32_t r8; + uint32_t tls; + uint32_t r10; + uint32_t r11; +} context_t; + + +#endif + +/** @} + */ Index: uspace/lib/libc/arch/arm32/include/psthread.h =================================================================== --- uspace/lib/libc/arch/arm32/include/psthread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,90 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup libcarm32 - * @{ - */ -/** @file - * @brief psthread related declarations. - */ - -#ifndef LIBC_arm32_PSTHREAD_H_ -#define LIBC_arm32_PSTHREAD_H_ - -#include -#include -#include "thread.h" - -/** Size of a stack item */ -#define STACK_ITEM_SIZE 4 - -/** Stack alignment - see ABI for details */ -#define STACK_ALIGNMENT 8 - -#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) - - -/** Sets data to the context. - * - * @param c Context (#context_t). - * @param _pc Program counter. - * @param stack Stack address. - * @param size Stack size. - * @param ptls Pointer to the TCB. - */ -#define context_set(c, _pc, stack, size, ptls) \ - (c)->pc = (sysarg_t) (_pc); \ - (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \ - (c)->tls = ((sysarg_t)(ptls)) + sizeof(tcb_t) + ARM_TP_OFFSET; - - -/** Thread context. - * - * Only registers preserved accross function calls are included. r9 is used - * to store a TLS address. -ffixed-r9 gcc forces gcc not to use this - * register. -mtp=soft forces gcc to use #__aeabi_read_tp to obtain - * TLS address. - */ -typedef struct { - uint32_t sp; - uint32_t pc; - uint32_t r4; - uint32_t r5; - uint32_t r6; - uint32_t r7; - uint32_t r8; - uint32_t tls; - uint32_t r10; - uint32_t r11; -} context_t; - - -#endif - -/** @} - */ Index: uspace/lib/libc/arch/arm32/include/thread.h =================================================================== --- uspace/lib/libc/arch/arm32/include/thread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/arm32/include/thread.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -50,6 +50,6 @@ */ typedef struct { - /** psthread data. */ - void *pst_data; + /** Fibril data. */ + void *fibril_data; } tcb_t; Index: uspace/lib/libc/arch/arm32/src/fibril.S =================================================================== --- uspace/lib/libc/arch/arm32/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/arm32/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,49 @@ +# +# Copyright (c) 2007 Michal Kebrt +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +.text + +.global context_save +.global context_restore + +context_save: + stmia r0!, {sp, lr} + stmia r0!, {r4-r11} + + # return 1 + mov r0, #1 + mov pc, lr + +context_restore: + ldmia r0!, {sp, lr} + ldmia r0!, {r4-r11} + + #return 0 + mov r0, #0 + mov pc, lr + Index: uspace/lib/libc/arch/arm32/src/psthread.S =================================================================== --- uspace/lib/libc/arch/arm32/src/psthread.S (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,49 +1,0 @@ -# -# Copyright (c) 2007 Michal Kebrt -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# - Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# - Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# - The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -.text - -.global context_save -.global context_restore - -context_save: - stmia r0!, {sp, lr} - stmia r0!, {r4-r11} - - # return 1 - mov r0, #1 - mov pc, lr - -context_restore: - ldmia r0!, {sp, lr} - ldmia r0!, {r4-r11} - - #return 0 - mov r0, #0 - mov pc, lr - Index: uspace/lib/libc/arch/ia32/Makefile.inc =================================================================== --- uspace/lib/libc/arch/ia32/Makefile.inc (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/ia32/Makefile.inc (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -34,5 +34,5 @@ ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \ - arch/$(ARCH)/src/psthread.S \ + arch/$(ARCH)/src/fibril.S \ arch/$(ARCH)/src/thread.c Index: uspace/lib/libc/arch/ia32/include/fibril.h =================================================================== --- uspace/lib/libc/arch/ia32/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/ia32/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2006 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup libcia32 + * @{ + */ +/** @file + */ + +#ifndef LIBC_ia32_FIBRIL_H_ +#define LIBC_ia32_FIBRIL_H_ + +#include + +/* According to ABI the stack MUST be aligned on + * 16-byte boundary. If it is not, the va_arg calling will + * panic sooner or later + */ +#define SP_DELTA (12) + +/* We include only registers that must be preserved + * during function call + */ +typedef struct { + uint32_t sp; + uint32_t pc; + + uint32_t ebx; + uint32_t esi; + uint32_t edi; + uint32_t ebp; + + uint32_t tls; +} context_t; + +#endif + +/** @} + */ Index: uspace/lib/libc/arch/ia32/include/psthread.h =================================================================== --- uspace/lib/libc/arch/ia32/include/psthread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,64 +1,0 @@ -/* - * Copyright (c) 2006 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup libcia32 - * @{ - */ -/** @file - */ - -#ifndef LIBC_ia32_PSTHREAD_H_ -#define LIBC_ia32_PSTHREAD_H_ - -#include - -/* According to ABI the stack MUST be aligned on - * 16-byte boundary. If it is not, the va_arg calling will - * panic sooner or later - */ -#define SP_DELTA (12) - -/* We include only registers that must be preserved - * during function call - */ -typedef struct { - uint32_t sp; - uint32_t pc; - - uint32_t ebx; - uint32_t esi; - uint32_t edi; - uint32_t ebp; - - uint32_t tls; -} context_t; - -#endif - -/** @} - */ Index: uspace/lib/libc/arch/ia32/include/thread.h =================================================================== --- uspace/lib/libc/arch/ia32/include/thread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/ia32/include/thread.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -40,5 +40,5 @@ typedef struct { void *self; - void *pst_data; + void *fibril_data; } tcb_t; @@ -50,5 +50,5 @@ static inline tcb_t * __tcb_get(void) { - void * retval; + void *retval; asm ("movl %%gs:0, %0" : "=r"(retval)); Index: uspace/lib/libc/arch/ia32/src/fibril.S =================================================================== --- uspace/lib/libc/arch/ia32/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/ia32/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,84 @@ +# +# Copyright (c) 2001-2004 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +.text + +.global context_save +.global context_restore + + +## Save current CPU context +# +# Save CPU context to the context_t variable +# pointed by the 1st argument. Returns 1 in EAX. +# +context_save: + movl 0(%esp),%eax # the caller's return %eip + movl 4(%esp),%edx # address of the context variable to save context to + + movl %esp,0(%edx) # %esp -> ctx->sp + movl %eax,4(%edx) # %eip -> ctx->pc + movl %ebx,8(%edx) # %ebx -> ctx->ebx + movl %esi,12(%edx) # %esi -> ctx->esi + movl %edi,16(%edx) # %edi -> ctx->edi + movl %ebp,20(%edx) # %ebp -> ctx->ebp + + # Save TLS + movl %gs:0, %eax + movl %eax, 24(%edx) # tls -> ctx->tls + + xorl %eax,%eax # context_save returns 1 + incl %eax + ret + + +## Restore saved CPU context +# +# Restore CPU context from context_t variable +# pointed by the 1st argument. Returns 0 in EAX. +# +context_restore: + movl 4(%esp),%eax # address of the context variable to restore context from + movl 0(%eax),%esp # ctx->sp -> %esp + movl 4(%eax),%edx # ctx->pc -> %edx + movl 8(%eax),%ebx # ctx->ebx -> %ebx + movl 12(%eax),%esi # ctx->esi -> %esi + movl 16(%eax),%edi # ctx->edi -> %edi + movl 20(%eax),%ebp # ctx->ebp -> %ebp + + movl %edx,0(%esp) # ctx->pc -> saver's return %eip + + # Set thread local storage + pushl %edi + movl 24(%eax), %eax # Set arg1 to TLS addr + movl $1, %edi # Syscall 1 + int $0x30 + popl %edi + + xorl %eax,%eax # context_restore returns 0 + ret Index: uspace/lib/libc/arch/ia32/src/psthread.S =================================================================== --- uspace/lib/libc/arch/ia32/src/psthread.S (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,84 +1,0 @@ -# -# Copyright (c) 2001-2004 Jakub Jermar -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# - Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# - Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# - The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -.text - -.global context_save -.global context_restore - - -## Save current CPU context -# -# Save CPU context to the context_t variable -# pointed by the 1st argument. Returns 1 in EAX. -# -context_save: - movl 0(%esp),%eax # the caller's return %eip - movl 4(%esp),%edx # address of the kernel_context variable to save context to - - movl %esp,0(%edx) # %esp -> ctx->sp - movl %eax,4(%edx) # %eip -> ctx->pc - movl %ebx,8(%edx) # %ebx -> ctx->ebx - movl %esi,12(%edx) # %esi -> ctx->esi - movl %edi,16(%edx) # %edi -> ctx->edi - movl %ebp,20(%edx) # %ebp -> ctx->ebp - - # Save TLS - movl %gs:0, %eax - movl %eax, 24(%edx) # tls -> ctx->tls - - xorl %eax,%eax # context_save returns 1 - incl %eax - ret - - -## Restore saved CPU context -# -# Restore CPU context from context_t variable -# pointed by the 1st argument. Returns 0 in EAX. -# -context_restore: - movl 4(%esp),%eax # address of the kernel_context variable to restore context from - movl 0(%eax),%esp # ctx->sp -> %esp - movl 4(%eax),%edx # ctx->pc -> %edx - movl 8(%eax),%ebx # ctx->ebx -> %ebx - movl 12(%eax),%esi # ctx->esi -> %esi - movl 16(%eax),%edi # ctx->edi -> %edi - movl 20(%eax),%ebp # ctx->ebp -> %ebp - - movl %edx,0(%esp) # ctx->pc -> saver's return %eip - - # Set thread local storage - pushl %edi - movl 24(%eax), %eax # Set arg1 to TLS addr - movl $1, %edi # Syscall 1 - int $0x30 - popl %edi - - xorl %eax,%eax # context_restore returns 0 - ret Index: uspace/lib/libc/arch/ia64/Makefile.inc =================================================================== --- uspace/lib/libc/arch/ia64/Makefile.inc (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/ia64/Makefile.inc (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -37,5 +37,5 @@ ARCH_SOURCES += arch/$(ARCH)/src/syscall.S \ - arch/$(ARCH)/src/psthread.S \ + arch/$(ARCH)/src/fibril.S \ arch/$(ARCH)/src/thread.c Index: uspace/lib/libc/arch/ia64/include/fibril.h =================================================================== --- uspace/lib/libc/arch/ia64/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/ia64/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,139 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup libcia64 + * @{ + */ +/** @file + */ + +#ifndef LIBC_ia64_FIBRIL_H_ +#define LIBC_ia64_FIBRIL_H_ + +#include +#include +#include +#include + +/* + * context_save() and context_restore() are both leaf procedures. + * No need to allocate scratch area. + */ +#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) + +#define PFM_MASK (~0x3fffffffff) + +#define PSTHREAD_INITIAL_STACK_PAGES_NO 2 +/* Stack is divided into two equal parts (for memory stack and register stack). */ +#define PSTHREAD_INITIAL_STACK_DIVISION 2 + +#ifdef context_set +#undef context_set +#endif + +#define context_set(c, _pc, stack, size, tls) \ + do { \ + (c)->pc = (uint64_t) _pc; \ + (c)->bsp = ((uint64_t) stack) + size / PSTHREAD_INITIAL_STACK_DIVISION; \ + (c)->ar_pfs &= PFM_MASK; \ + (c)->sp = ((uint64_t) stack) + ALIGN_UP((size / PSTHREAD_INITIAL_STACK_DIVISION), STACK_ALIGNMENT) - SP_DELTA; \ + (c)->tp = (uint64_t) tls; \ + } while (0); + + +/* + * Only save registers that must be preserved across + * function calls. + */ +typedef struct context { + + /* + * Application registers + */ + uint64_t ar_pfs; + uint64_t ar_unat_caller; + uint64_t ar_unat_callee; + uint64_t ar_rsc; + uint64_t bsp; /* ar_bsp */ + uint64_t ar_rnat; + uint64_t ar_lc; + + /* + * General registers + */ + uint64_t r1; + uint64_t r4; + uint64_t r5; + uint64_t r6; + uint64_t r7; + uint64_t sp; /* r12 */ + uint64_t tp; /* r13 */ + + /* + * Branch registers + */ + uint64_t pc; /* b0 */ + uint64_t b1; + uint64_t b2; + uint64_t b3; + uint64_t b4; + uint64_t b5; + + /* + * Predicate registers + */ + uint64_t pr; + + __r128 f2 __attribute__ ((aligned(16))); + __r128 f3; + __r128 f4; + __r128 f5; + + __r128 f16; + __r128 f17; + __r128 f18; + __r128 f19; + __r128 f20; + __r128 f21; + __r128 f22; + __r128 f23; + __r128 f24; + __r128 f25; + __r128 f26; + __r128 f27; + __r128 f28; + __r128 f29; + __r128 f30; + __r128 f31; + +} context_t; + +#endif + +/** @} + */ Index: uspace/lib/libc/arch/ia64/include/psthread.h =================================================================== --- uspace/lib/libc/arch/ia64/include/psthread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,139 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup libcia64 - * @{ - */ -/** @file - */ - -#ifndef LIBC_ia64_PSTHREAD_H_ -#define LIBC_ia64_PSTHREAD_H_ - -#include -#include -#include -#include - -/* - * context_save() and context_restore() are both leaf procedures. - * No need to allocate scratch area. - */ -#define SP_DELTA (0+ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) - -#define PFM_MASK (~0x3fffffffff) - -#define PSTHREAD_INITIAL_STACK_PAGES_NO 2 -/* Stack is divided into two equal parts (for memory stack and register stack). */ -#define PSTHREAD_INITIAL_STACK_DIVISION 2 - -#ifdef context_set -#undef context_set -#endif - -#define context_set(c, _pc, stack, size, tls) \ - do { \ - (c)->pc = (uint64_t) _pc; \ - (c)->bsp = ((uint64_t) stack) + size / PSTHREAD_INITIAL_STACK_DIVISION; \ - (c)->ar_pfs &= PFM_MASK; \ - (c)->sp = ((uint64_t) stack) + ALIGN_UP((size / PSTHREAD_INITIAL_STACK_DIVISION), STACK_ALIGNMENT) - SP_DELTA; \ - (c)->tp = (uint64_t) tls; \ - } while (0); - - -/* - * Only save registers that must be preserved across - * function calls. - */ -typedef struct context { - - /* - * Application registers - */ - uint64_t ar_pfs; - uint64_t ar_unat_caller; - uint64_t ar_unat_callee; - uint64_t ar_rsc; - uint64_t bsp; /* ar_bsp */ - uint64_t ar_rnat; - uint64_t ar_lc; - - /* - * General registers - */ - uint64_t r1; - uint64_t r4; - uint64_t r5; - uint64_t r6; - uint64_t r7; - uint64_t sp; /* r12 */ - uint64_t tp; /* r13 */ - - /* - * Branch registers - */ - uint64_t pc; /* b0 */ - uint64_t b1; - uint64_t b2; - uint64_t b3; - uint64_t b4; - uint64_t b5; - - /* - * Predicate registers - */ - uint64_t pr; - - __r128 f2 __attribute__ ((aligned(16))); - __r128 f3; - __r128 f4; - __r128 f5; - - __r128 f16; - __r128 f17; - __r128 f18; - __r128 f19; - __r128 f20; - __r128 f21; - __r128 f22; - __r128 f23; - __r128 f24; - __r128 f25; - __r128 f26; - __r128 f27; - __r128 f28; - __r128 f29; - __r128 f30; - __r128 f31; - -} context_t; - -#endif - -/** @} - */ Index: uspace/lib/libc/arch/ia64/include/thread.h =================================================================== --- uspace/lib/libc/arch/ia64/include/thread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/ia64/include/thread.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -33,6 +33,6 @@ */ -#ifndef LIBC_ia64THREAD_H_ -#define LIBC_ia64THREAD_H_ +#ifndef LIBC_ia64_THREAD_H_ +#define LIBC_ia64_THREAD_H_ #define THREAD_INITIAL_STACK_PAGES_NO 2 @@ -41,5 +41,5 @@ typedef struct { void *dtv; /* unused in static linking*/ - void *pst_data; + void *fibril_data; } tcb_t; Index: uspace/lib/libc/arch/ia64/src/fibril.S =================================================================== --- uspace/lib/libc/arch/ia64/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/ia64/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,246 @@ +# +# Copyright (c) 2005 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +.text + +.global context_save +.global context_restore + +context_save: + alloc loc0 = ar.pfs, 1, 8, 0, 0 + mov loc1 = ar.unat ;; + /* loc2 */ + mov loc3 = ar.rsc + + .auto + + /* + * Flush dirty registers to backing store. + * After this ar.bsp and ar.bspstore are equal. + */ + flushrs + mov loc4 = ar.bsp + + /* + * Put RSE to enforced lazy mode. + * So that ar.rnat can be read. + */ + and loc5 = ~3, loc3 + mov ar.rsc = loc5 + mov loc5 = ar.rnat + + .explicit + + mov loc6 = ar.lc + + /* + * Save application registers + */ + st8 [in0] = loc0, 8 ;; /* save ar.pfs */ + st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */ + mov loc2 = in0 ;; + add in0 = 8, in0 ;; /* skip ar.unat (callee) */ + st8 [in0] = loc3, 8 ;; /* save ar.rsc */ + st8 [in0] = loc4, 8 ;; /* save ar.bsp */ + st8 [in0] = loc5, 8 ;; /* save ar.rnat */ + st8 [in0] = loc6, 8 ;; /* save ar.lc */ + + /* + * Save general registers including NaT bits + */ + st8.spill [in0] = r1, 8 ;; + st8.spill [in0] = r4, 8 ;; + st8.spill [in0] = r5, 8 ;; + st8.spill [in0] = r6, 8 ;; + st8.spill [in0] = r7, 8 ;; + st8.spill [in0] = r12, 8 ;; /* save sp */ + st8.spill [in0] = r13, 8 ;; /* save tp */ + + mov loc3 = ar.unat ;; + st8 [loc2] = loc3 /* save ar.unat (callee) */ + + /* + * Save branch registers + */ + mov loc2 = b0 ;; + st8 [in0] = loc2, 8 /* save pc */ + mov loc3 = b1 ;; + st8 [in0] = loc3, 8 + mov loc4 = b2 ;; + st8 [in0] = loc4, 8 + mov loc5 = b3 ;; + st8 [in0] = loc5, 8 + mov loc6 = b4 ;; + st8 [in0] = loc6, 8 + mov loc7 = b5 ;; + st8 [in0] = loc7, 8 + + /* + * Save predicate registers + */ + mov loc2 = pr ;; + st8 [in0] = loc2, 16;; /* Next fpu registers should be spilled to 16B aligned address */ + + /* + * Save floating-point registers. + */ + stf.spill [in0] = f2, 16 ;; + stf.spill [in0] = f3, 16 ;; + stf.spill [in0] = f4, 16 ;; + stf.spill [in0] = f5, 16 ;; + + stf.spill [in0] = f16, 16 ;; + stf.spill [in0] = f17, 16 ;; + stf.spill [in0] = f18, 16 ;; + stf.spill [in0] = f19, 16 ;; + stf.spill [in0] = f20, 16 ;; + stf.spill [in0] = f21, 16 ;; + stf.spill [in0] = f22, 16 ;; + stf.spill [in0] = f23, 16 ;; + stf.spill [in0] = f24, 16 ;; + stf.spill [in0] = f25, 16 ;; + stf.spill [in0] = f26, 16 ;; + stf.spill [in0] = f27, 16 ;; + stf.spill [in0] = f28, 16 ;; + stf.spill [in0] = f29, 16 ;; + stf.spill [in0] = f30, 16 ;; + stf.spill [in0] = f31, 16 ;; + + mov ar.unat = loc1 + + add r8 = r0, r0, 1 /* context_save returns 1 */ + br.ret.sptk.many b0 + +context_restore: + alloc loc0 = ar.pfs, 1, 9, 0, 0 ;; + + ld8 loc0 = [in0], 8 ;; /* load ar.pfs */ + ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */ + ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */ + ld8 loc3 = [in0], 8 ;; /* load ar.rsc */ + ld8 loc4 = [in0], 8 ;; /* load ar.bsp */ + ld8 loc5 = [in0], 8 ;; /* load ar.rnat */ + ld8 loc6 = [in0], 8 ;; /* load ar.lc */ + + .auto + + /* + * Invalidate the ALAT + */ + invala + + /* + * Put RSE to enforced lazy mode. + * So that ar.bspstore and ar.rnat can be written. + */ + movl loc8 = ~3 + and loc8 = loc3, loc8 + mov ar.rsc = loc8 + + /* + * Flush dirty registers to backing store. + * We do this because we want the following move + * to ar.bspstore to assign the same value to ar.bsp. + */ + flushrs + + /* + * Restore application registers + */ + mov ar.bspstore = loc4 /* rse.bspload = ar.bsp = ar.bspstore = loc4 */ + mov ar.rnat = loc5 + mov ar.pfs = loc0 + mov ar.rsc = loc3 + + .explicit + + mov ar.unat = loc2 ;; + mov ar.lc = loc6 + + /* + * Restore general registers including NaT bits + */ + ld8.fill r1 = [in0], 8 ;; + ld8.fill r4 = [in0], 8 ;; + ld8.fill r5 = [in0], 8 ;; + ld8.fill r6 = [in0], 8 ;; + ld8.fill r7 = [in0], 8 ;; + ld8.fill r12 = [in0], 8 ;; /* restore sp */ + ld8.fill r13 = [in0], 8 ;; + + /* + * Restore branch registers + */ + ld8 loc2 = [in0], 8 ;; /* restore pc */ + mov b0 = loc2 + ld8 loc3 = [in0], 8 ;; + mov b1 = loc3 + ld8 loc4 = [in0], 8 ;; + mov b2 = loc4 + ld8 loc5 = [in0], 8 ;; + mov b3 = loc5 + ld8 loc6 = [in0], 8 ;; + mov b4 = loc6 + ld8 loc7 = [in0], 8 ;; + mov b5 = loc7 + + /* + * Restore predicate registers + */ + ld8 loc2 = [in0], 16 ;; + mov pr = loc2, ~0 + + /* + * Restore floating-point registers. + */ + ldf.fill f2 = [in0], 16 ;; + ldf.fill f3 = [in0], 16 ;; + ldf.fill f4 = [in0], 16 ;; + ldf.fill f5 = [in0], 16 ;; + + ldf.fill f16 = [in0], 16 ;; + ldf.fill f17 = [in0], 16 ;; + ldf.fill f18 = [in0], 16 ;; + ldf.fill f19 = [in0], 16 ;; + ldf.fill f20 = [in0], 16 ;; + ldf.fill f21 = [in0], 16 ;; + ldf.fill f22 = [in0], 16 ;; + ldf.fill f23 = [in0], 16 ;; + ldf.fill f24 = [in0], 16 ;; + ldf.fill f25 = [in0], 16 ;; + ldf.fill f26 = [in0], 16 ;; + ldf.fill f27 = [in0], 16 ;; + ldf.fill f28 = [in0], 16 ;; + ldf.fill f29 = [in0], 16 ;; + ldf.fill f30 = [in0], 16 ;; + ldf.fill f31 = [in0], 16 ;; + + mov ar.unat = loc1 + + mov r8 = r0 /* context_restore returns 0 */ + br.ret.sptk.many b0 Index: uspace/lib/libc/arch/ia64/src/psthread.S =================================================================== --- uspace/lib/libc/arch/ia64/src/psthread.S (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,246 +1,0 @@ -# -# Copyright (c) 2005 Jakub Jermar -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# - Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# - Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# - The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -.text - -.global context_save -.global context_restore - -context_save: - alloc loc0 = ar.pfs, 1, 8, 0, 0 - mov loc1 = ar.unat ;; - /* loc2 */ - mov loc3 = ar.rsc - - .auto - - /* - * Flush dirty registers to backing store. - * After this ar.bsp and ar.bspstore are equal. - */ - flushrs - mov loc4 = ar.bsp - - /* - * Put RSE to enforced lazy mode. - * So that ar.rnat can be read. - */ - and loc5 = ~3, loc3 - mov ar.rsc = loc5 - mov loc5 = ar.rnat - - .explicit - - mov loc6 = ar.lc - - /* - * Save application registers - */ - st8 [in0] = loc0, 8 ;; /* save ar.pfs */ - st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */ - mov loc2 = in0 ;; - add in0 = 8, in0 ;; /* skip ar.unat (callee) */ - st8 [in0] = loc3, 8 ;; /* save ar.rsc */ - st8 [in0] = loc4, 8 ;; /* save ar.bsp */ - st8 [in0] = loc5, 8 ;; /* save ar.rnat */ - st8 [in0] = loc6, 8 ;; /* save ar.lc */ - - /* - * Save general registers including NaT bits - */ - st8.spill [in0] = r1, 8 ;; - st8.spill [in0] = r4, 8 ;; - st8.spill [in0] = r5, 8 ;; - st8.spill [in0] = r6, 8 ;; - st8.spill [in0] = r7, 8 ;; - st8.spill [in0] = r12, 8 ;; /* save sp */ - st8.spill [in0] = r13, 8 ;; /* save tp */ - - mov loc3 = ar.unat ;; - st8 [loc2] = loc3 /* save ar.unat (callee) */ - - /* - * Save branch registers - */ - mov loc2 = b0 ;; - st8 [in0] = loc2, 8 /* save pc */ - mov loc3 = b1 ;; - st8 [in0] = loc3, 8 - mov loc4 = b2 ;; - st8 [in0] = loc4, 8 - mov loc5 = b3 ;; - st8 [in0] = loc5, 8 - mov loc6 = b4 ;; - st8 [in0] = loc6, 8 - mov loc7 = b5 ;; - st8 [in0] = loc7, 8 - - /* - * Save predicate registers - */ - mov loc2 = pr ;; - st8 [in0] = loc2, 16;; /* Next fpu registers should be spilled to 16B aligned address */ - - /* - * Save floating-point registers. - */ - stf.spill [in0] = f2, 16 ;; - stf.spill [in0] = f3, 16 ;; - stf.spill [in0] = f4, 16 ;; - stf.spill [in0] = f5, 16 ;; - - stf.spill [in0] = f16, 16 ;; - stf.spill [in0] = f17, 16 ;; - stf.spill [in0] = f18, 16 ;; - stf.spill [in0] = f19, 16 ;; - stf.spill [in0] = f20, 16 ;; - stf.spill [in0] = f21, 16 ;; - stf.spill [in0] = f22, 16 ;; - stf.spill [in0] = f23, 16 ;; - stf.spill [in0] = f24, 16 ;; - stf.spill [in0] = f25, 16 ;; - stf.spill [in0] = f26, 16 ;; - stf.spill [in0] = f27, 16 ;; - stf.spill [in0] = f28, 16 ;; - stf.spill [in0] = f29, 16 ;; - stf.spill [in0] = f30, 16 ;; - stf.spill [in0] = f31, 16 ;; - - mov ar.unat = loc1 - - add r8 = r0, r0, 1 /* context_save returns 1 */ - br.ret.sptk.many b0 - -context_restore: - alloc loc0 = ar.pfs, 1, 9, 0, 0 ;; - - ld8 loc0 = [in0], 8 ;; /* load ar.pfs */ - ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */ - ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */ - ld8 loc3 = [in0], 8 ;; /* load ar.rsc */ - ld8 loc4 = [in0], 8 ;; /* load ar.bsp */ - ld8 loc5 = [in0], 8 ;; /* load ar.rnat */ - ld8 loc6 = [in0], 8 ;; /* load ar.lc */ - - .auto - - /* - * Invalidate the ALAT - */ - invala - - /* - * Put RSE to enforced lazy mode. - * So that ar.bspstore and ar.rnat can be written. - */ - movl loc8 = ~3 - and loc8 = loc3, loc8 - mov ar.rsc = loc8 - - /* - * Flush dirty registers to backing store. - * We do this because we want the following move - * to ar.bspstore to assign the same value to ar.bsp. - */ - flushrs - - /* - * Restore application registers - */ - mov ar.bspstore = loc4 /* rse.bspload = ar.bsp = ar.bspstore = loc4 */ - mov ar.rnat = loc5 - mov ar.pfs = loc0 - mov ar.rsc = loc3 - - .explicit - - mov ar.unat = loc2 ;; - mov ar.lc = loc6 - - /* - * Restore general registers including NaT bits - */ - ld8.fill r1 = [in0], 8 ;; - ld8.fill r4 = [in0], 8 ;; - ld8.fill r5 = [in0], 8 ;; - ld8.fill r6 = [in0], 8 ;; - ld8.fill r7 = [in0], 8 ;; - ld8.fill r12 = [in0], 8 ;; /* restore sp */ - ld8.fill r13 = [in0], 8 ;; - - /* - * Restore branch registers - */ - ld8 loc2 = [in0], 8 ;; /* restore pc */ - mov b0 = loc2 - ld8 loc3 = [in0], 8 ;; - mov b1 = loc3 - ld8 loc4 = [in0], 8 ;; - mov b2 = loc4 - ld8 loc5 = [in0], 8 ;; - mov b3 = loc5 - ld8 loc6 = [in0], 8 ;; - mov b4 = loc6 - ld8 loc7 = [in0], 8 ;; - mov b5 = loc7 - - /* - * Restore predicate registers - */ - ld8 loc2 = [in0], 16 ;; - mov pr = loc2, ~0 - - /* - * Restore floating-point registers. - */ - ldf.fill f2 = [in0], 16 ;; - ldf.fill f3 = [in0], 16 ;; - ldf.fill f4 = [in0], 16 ;; - ldf.fill f5 = [in0], 16 ;; - - ldf.fill f16 = [in0], 16 ;; - ldf.fill f17 = [in0], 16 ;; - ldf.fill f18 = [in0], 16 ;; - ldf.fill f19 = [in0], 16 ;; - ldf.fill f20 = [in0], 16 ;; - ldf.fill f21 = [in0], 16 ;; - ldf.fill f22 = [in0], 16 ;; - ldf.fill f23 = [in0], 16 ;; - ldf.fill f24 = [in0], 16 ;; - ldf.fill f25 = [in0], 16 ;; - ldf.fill f26 = [in0], 16 ;; - ldf.fill f27 = [in0], 16 ;; - ldf.fill f28 = [in0], 16 ;; - ldf.fill f29 = [in0], 16 ;; - ldf.fill f30 = [in0], 16 ;; - ldf.fill f31 = [in0], 16 ;; - - mov ar.unat = loc1 - - mov r8 = r0 /* context_restore returns 0 */ - br.ret.sptk.many b0 Index: uspace/lib/libc/arch/mips32/Makefile.inc =================================================================== --- uspace/lib/libc/arch/mips32/Makefile.inc (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/mips32/Makefile.inc (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -40,5 +40,5 @@ ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \ - arch/$(ARCH)/src/psthread.S \ + arch/$(ARCH)/src/fibril.S \ arch/$(ARCH)/src/thread.c Index: uspace/lib/libc/arch/mips32/include/fibril.h =================================================================== --- uspace/lib/libc/arch/mips32/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/mips32/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2006 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup libcmips32 + * @{ + */ +/** @file + * @ingroup libcmips32eb + */ + +#ifndef LIBC_mips32_FIBRIL_H_ +#define LIBC_mips32_FIBRIL_H_ + +#include + +/* We define our own context_set, because we need to set + * the TLS pointer to the tcb+0x7000 + * + * See tls_set in thread.h + */ +#define context_set(c, _pc, stack, size, ptls) \ + (c)->pc = (sysarg_t) (_pc); \ + (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \ + (c)->tls = ((sysarg_t)(ptls)) + 0x7000 + sizeof(tcb_t); + + +/* +16 is just for sure that the called function + * have space to store it's arguments + */ +#define SP_DELTA (8+16) + +typedef struct { + uint32_t sp; + uint32_t pc; + + uint32_t s0; + uint32_t s1; + uint32_t s2; + uint32_t s3; + uint32_t s4; + uint32_t s5; + uint32_t s6; + uint32_t s7; + uint32_t s8; + uint32_t gp; + uint32_t tls; /* Thread local storage(=k1) */ + + uint32_t f20; + uint32_t f21; + uint32_t f22; + uint32_t f23; + uint32_t f24; + uint32_t f25; + uint32_t f26; + uint32_t f27; + uint32_t f28; + uint32_t f29; + uint32_t f30; + +} context_t; + +#endif + +/** @} + */ Index: uspace/lib/libc/arch/mips32/include/psthread.h =================================================================== --- uspace/lib/libc/arch/mips32/include/psthread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,90 +1,0 @@ -/* - * Copyright (c) 2006 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup libcmips32 - * @{ - */ -/** @file - * @ingroup libcmips32eb - */ - -#ifndef LIBC_mips32_PSTHREAD_H_ -#define LIBC_mips32_PSTHREAD_H_ - -#include - -/* We define our own context_set, because we need to set - * the TLS pointer to the tcb+0x7000 - * - * See tls_set in thread.h - */ -#define context_set(c, _pc, stack, size, ptls) \ - (c)->pc = (sysarg_t) (_pc); \ - (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \ - (c)->tls = ((sysarg_t)(ptls)) + 0x7000 + sizeof(tcb_t); - - -/* +16 is just for sure that the called function - * have space to store it's arguments - */ -#define SP_DELTA (8+16) - -typedef struct { - uint32_t sp; - uint32_t pc; - - uint32_t s0; - uint32_t s1; - uint32_t s2; - uint32_t s3; - uint32_t s4; - uint32_t s5; - uint32_t s6; - uint32_t s7; - uint32_t s8; - uint32_t gp; - uint32_t tls; /* Thread local storage(=k1) */ - - uint32_t f20; - uint32_t f21; - uint32_t f22; - uint32_t f23; - uint32_t f24; - uint32_t f25; - uint32_t f26; - uint32_t f27; - uint32_t f28; - uint32_t f29; - uint32_t f30; - -} context_t; - -#endif - -/** @} - */ Index: uspace/lib/libc/arch/mips32/include/thread.h =================================================================== --- uspace/lib/libc/arch/mips32/include/thread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/mips32/include/thread.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -36,6 +36,6 @@ /* TLS for MIPS is described in http://www.linux-mips.org/wiki/NPTL */ -#ifndef LIBC_mips32THREAD_H_ -#define LIBC_mips32THREAD_H_ +#ifndef LIBC_mips32_THREAD_H_ +#define LIBC_mips32_THREAD_H_ /* I did not find any specification (neither MIPS nor PowerPC), but @@ -54,5 +54,5 @@ typedef struct { - void *pst_data; + void *fibril_data; } tcb_t; Index: uspace/lib/libc/arch/mips32/src/fibril.S =================================================================== --- uspace/lib/libc/arch/mips32/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/mips32/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,161 @@ +# +# Copyright (c) 2003-2004 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +.text + +.set noat +.set noreorder + + +#include +#include + +.global context_save +.global context_restore + +.macro CONTEXT_STORE r + sw $s0,OFFSET_S0(\r) + sw $s1,OFFSET_S1(\r) + sw $s2,OFFSET_S2(\r) + sw $s3,OFFSET_S3(\r) + sw $s4,OFFSET_S4(\r) + sw $s5,OFFSET_S5(\r) + sw $s6,OFFSET_S6(\r) + sw $s7,OFFSET_S7(\r) + sw $s8,OFFSET_S8(\r) + sw $gp,OFFSET_GP(\r) + sw $k1,OFFSET_TLS(\r) + +#ifdef CONFIG_MIPS_FPU + mfc1 $t0,$20 + sw $t0, OFFSET_F20(\r) + + mfc1 $t0,$21 + sw $t0, OFFSET_F21(\r) + + mfc1 $t0,$22 + sw $t0, OFFSET_F22(\r) + + mfc1 $t0,$23 + sw $t0, OFFSET_F23(\r) + + mfc1 $t0,$24 + sw $t0, OFFSET_F24(\r) + + mfc1 $t0,$25 + sw $t0, OFFSET_F25(\r) + + mfc1 $t0,$26 + sw $t0, OFFSET_F26(\r) + + mfc1 $t0,$27 + sw $t0, OFFSET_F27(\r) + + mfc1 $t0,$28 + sw $t0, OFFSET_F28(\r) + + mfc1 $t0,$29 + sw $t0, OFFSET_F29(\r) + + mfc1 $t0,$30 + sw $t0, OFFSET_F30(\r) +#endif + + sw $ra,OFFSET_PC(\r) + sw $sp,OFFSET_SP(\r) +.endm + +.macro CONTEXT_LOAD r + lw $s0,OFFSET_S0(\r) + lw $s1,OFFSET_S1(\r) + lw $s2,OFFSET_S2(\r) + lw $s3,OFFSET_S3(\r) + lw $s4,OFFSET_S4(\r) + lw $s5,OFFSET_S5(\r) + lw $s6,OFFSET_S6(\r) + lw $s7,OFFSET_S7(\r) + lw $s8,OFFSET_S8(\r) + lw $gp,OFFSET_GP(\r) + lw $k1,OFFSET_TLS(\r) + +#ifdef CONFIG_MIPS_FPU + lw $t0, OFFSET_F20(\r) + mtc1 $t0,$20 + + lw $t0, OFFSET_F21(\r) + mtc1 $t0,$21 + + lw $t0, OFFSET_F22(\r) + mtc1 $t0,$22 + + lw $t0, OFFSET_F23(\r) + mtc1 $t0,$23 + + lw $t0, OFFSET_F24(\r) + mtc1 $t0,$24 + + lw $t0, OFFSET_F25(\r) + mtc1 $t0,$25 + + lw $t0, OFFSET_F26(\r) + mtc1 $t0,$26 + + lw $t0, OFFSET_F27(\r) + mtc1 $t0,$27 + + lw $t0, OFFSET_F28(\r) + mtc1 $t0,$28 + + lw $t0, OFFSET_F29(\r) + mtc1 $t0,$29 + + lw $t0, OFFSET_F30(\r) + mtc1 $t0,$30 +#endif + + lw $ra,OFFSET_PC(\r) + lw $sp,OFFSET_SP(\r) +.endm + +context_save: + CONTEXT_STORE $a0 + + # context_save returns 1 + j $ra + li $v0, 1 + +context_restore: + CONTEXT_LOAD $a0 + + # Just for the jump into first function, but one instruction + # should not bother us + move $t9, $ra + # context_restore returns 0 + j $ra + xor $v0, $v0 + Index: uspace/lib/libc/arch/mips32/src/psthread.S =================================================================== --- uspace/lib/libc/arch/mips32/src/psthread.S (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,161 +1,0 @@ -# -# Copyright (c) 2003-2004 Jakub Jermar -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# - Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# - Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# - The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -.text - -.set noat -.set noreorder - - -#include -#include - -.global context_save -.global context_restore - -.macro CONTEXT_STORE r - sw $s0,OFFSET_S0(\r) - sw $s1,OFFSET_S1(\r) - sw $s2,OFFSET_S2(\r) - sw $s3,OFFSET_S3(\r) - sw $s4,OFFSET_S4(\r) - sw $s5,OFFSET_S5(\r) - sw $s6,OFFSET_S6(\r) - sw $s7,OFFSET_S7(\r) - sw $s8,OFFSET_S8(\r) - sw $gp,OFFSET_GP(\r) - sw $k1,OFFSET_TLS(\r) - -#ifdef CONFIG_MIPS_FPU - mfc1 $t0,$20 - sw $t0, OFFSET_F20(\r) - - mfc1 $t0,$21 - sw $t0, OFFSET_F21(\r) - - mfc1 $t0,$22 - sw $t0, OFFSET_F22(\r) - - mfc1 $t0,$23 - sw $t0, OFFSET_F23(\r) - - mfc1 $t0,$24 - sw $t0, OFFSET_F24(\r) - - mfc1 $t0,$25 - sw $t0, OFFSET_F25(\r) - - mfc1 $t0,$26 - sw $t0, OFFSET_F26(\r) - - mfc1 $t0,$27 - sw $t0, OFFSET_F27(\r) - - mfc1 $t0,$28 - sw $t0, OFFSET_F28(\r) - - mfc1 $t0,$29 - sw $t0, OFFSET_F29(\r) - - mfc1 $t0,$30 - sw $t0, OFFSET_F30(\r) -#endif - - sw $ra,OFFSET_PC(\r) - sw $sp,OFFSET_SP(\r) -.endm - -.macro CONTEXT_LOAD r - lw $s0,OFFSET_S0(\r) - lw $s1,OFFSET_S1(\r) - lw $s2,OFFSET_S2(\r) - lw $s3,OFFSET_S3(\r) - lw $s4,OFFSET_S4(\r) - lw $s5,OFFSET_S5(\r) - lw $s6,OFFSET_S6(\r) - lw $s7,OFFSET_S7(\r) - lw $s8,OFFSET_S8(\r) - lw $gp,OFFSET_GP(\r) - lw $k1,OFFSET_TLS(\r) - -#ifdef CONFIG_MIPS_FPU - lw $t0, OFFSET_F20(\r) - mtc1 $t0,$20 - - lw $t0, OFFSET_F21(\r) - mtc1 $t0,$21 - - lw $t0, OFFSET_F22(\r) - mtc1 $t0,$22 - - lw $t0, OFFSET_F23(\r) - mtc1 $t0,$23 - - lw $t0, OFFSET_F24(\r) - mtc1 $t0,$24 - - lw $t0, OFFSET_F25(\r) - mtc1 $t0,$25 - - lw $t0, OFFSET_F26(\r) - mtc1 $t0,$26 - - lw $t0, OFFSET_F27(\r) - mtc1 $t0,$27 - - lw $t0, OFFSET_F28(\r) - mtc1 $t0,$28 - - lw $t0, OFFSET_F29(\r) - mtc1 $t0,$29 - - lw $t0, OFFSET_F30(\r) - mtc1 $t0,$30 -#endif - - lw $ra,OFFSET_PC(\r) - lw $sp,OFFSET_SP(\r) -.endm - -context_save: - CONTEXT_STORE $a0 - - # context_save returns 1 - j $ra - li $v0, 1 - -context_restore: - CONTEXT_LOAD $a0 - - # Just for the jump into first function, but one instruction - # should not bother us - move $t9, $ra - # context_restore returns 0 - j $ra - xor $v0, $v0 - Index: uspace/lib/libc/arch/mips32eb/Makefile.inc =================================================================== --- uspace/lib/libc/arch/mips32eb/Makefile.inc (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/mips32eb/Makefile.inc (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -35,5 +35,5 @@ ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \ - arch/$(ARCH)/src/psthread.S \ + arch/$(ARCH)/src/fibril.S \ arch/$(ARCH)/src/thread.c Index: uspace/lib/libc/arch/mips32eb/include/fibril.h =================================================================== --- uspace/lib/libc/arch/mips32eb/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/mips32eb/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,1 @@ +../../mips32/include/fibril.h Index: uspace/lib/libc/arch/mips32eb/include/psthread.h =================================================================== --- uspace/lib/libc/arch/mips32eb/include/psthread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,1 +1,0 @@ -../../mips32/include/psthread.h Index: uspace/lib/libc/arch/ppc32/Makefile.inc =================================================================== --- uspace/lib/libc/arch/ppc32/Makefile.inc (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/ppc32/Makefile.inc (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -34,5 +34,5 @@ ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \ - arch/$(ARCH)/src/psthread.S \ + arch/$(ARCH)/src/fibril.S \ arch/$(ARCH)/src/thread.c Index: uspace/lib/libc/arch/ppc32/include/fibril.h =================================================================== --- uspace/lib/libc/arch/ppc32/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/ppc32/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup libcppc32 + * @{ + */ +/** @file + */ + +#ifndef LIBC_ppc32_FIBRIL_H_ +#define LIBC_ppc32_FIBRIL_H_ + +#include + +/* We define our own context_set, because we need to set + * the TLS pointer to the tcb+0x7000 + * + * See tls_set in thread.h + */ +#define context_set(c, _pc, stack, size, ptls) \ + (c)->pc = (sysarg_t) (_pc); \ + (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \ + (c)->tls = ((sysarg_t) (ptls)) + 0x7000 + sizeof(tcb_t); + +#define SP_DELTA 16 + +typedef struct { + uint32_t sp; + uint32_t pc; + + uint32_t tls; + uint32_t r13; + uint32_t r14; + uint32_t r15; + uint32_t r16; + uint32_t r17; + uint32_t r18; + uint32_t r19; + uint32_t r20; + uint32_t r21; + uint32_t r22; + uint32_t r23; + uint32_t r24; + uint32_t r25; + uint32_t r26; + uint32_t r27; + uint32_t r28; + uint32_t r29; + uint32_t r30; + uint32_t r31; + + uint32_t cr; +} __attribute__ ((packed)) context_t; + +#endif + +/** @} + */ Index: uspace/lib/libc/arch/ppc32/include/psthread.h =================================================================== --- uspace/lib/libc/arch/ppc32/include/psthread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,83 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup libcppc32 - * @{ - */ -/** @file - */ - -#ifndef LIBC_ppc32_PSTHREAD_H_ -#define LIBC_ppc32_PSTHREAD_H_ - -#include - -/* We define our own context_set, because we need to set - * the TLS pointer to the tcb+0x7000 - * - * See tls_set in thread.h - */ -#define context_set(c, _pc, stack, size, ptls) \ - (c)->pc = (sysarg_t) (_pc); \ - (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \ - (c)->tls = ((sysarg_t) (ptls)) + 0x7000 + sizeof(tcb_t); - -#define SP_DELTA 16 - -typedef struct { - uint32_t sp; - uint32_t pc; - - uint32_t tls; - uint32_t r13; - uint32_t r14; - uint32_t r15; - uint32_t r16; - uint32_t r17; - uint32_t r18; - uint32_t r19; - uint32_t r20; - uint32_t r21; - uint32_t r22; - uint32_t r23; - uint32_t r24; - uint32_t r25; - uint32_t r26; - uint32_t r27; - uint32_t r28; - uint32_t r29; - uint32_t r30; - uint32_t r31; - - uint32_t cr; -} __attribute__ ((packed)) context_t; - -#endif - -/** @} - */ Index: uspace/lib/libc/arch/ppc32/include/thread.h =================================================================== --- uspace/lib/libc/arch/ppc32/include/thread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/ppc32/include/thread.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -39,5 +39,5 @@ typedef struct { - void *pst_data; + void *fibril_data; } tcb_t; Index: uspace/lib/libc/arch/ppc32/src/fibril.S =================================================================== --- uspace/lib/libc/arch/ppc32/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/ppc32/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,110 @@ +# +# Copyright (c) 2006 Martin Decky +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +.text + +.global context_save +.global context_restore + +#include +#include + +.macro CONTEXT_STORE r + stw sp, OFFSET_SP(\r) + stw r2, OFFSET_R2(\r) + stw r13, OFFSET_R13(\r) + stw r14, OFFSET_R14(\r) + stw r15, OFFSET_R15(\r) + stw r16, OFFSET_R16(\r) + stw r17, OFFSET_R17(\r) + stw r18, OFFSET_R18(\r) + stw r19, OFFSET_R19(\r) + stw r20, OFFSET_R20(\r) + stw r21, OFFSET_R21(\r) + stw r22, OFFSET_R22(\r) + stw r23, OFFSET_R23(\r) + stw r24, OFFSET_R24(\r) + stw r25, OFFSET_R25(\r) + stw r26, OFFSET_R26(\r) + stw r27, OFFSET_R27(\r) + stw r28, OFFSET_R28(\r) + stw r29, OFFSET_R29(\r) + stw r30, OFFSET_R30(\r) + stw r31, OFFSET_R31(\r) +.endm + +.macro CONTEXT_LOAD r + lwz sp, OFFSET_SP(\r) + lwz r2, OFFSET_R2(\r) + lwz r13, OFFSET_R13(\r) + lwz r14, OFFSET_R14(\r) + lwz r15, OFFSET_R15(\r) + lwz r16, OFFSET_R16(\r) + lwz r17, OFFSET_R17(\r) + lwz r18, OFFSET_R18(\r) + lwz r19, OFFSET_R19(\r) + lwz r20, OFFSET_R20(\r) + lwz r21, OFFSET_R21(\r) + lwz r22, OFFSET_R22(\r) + lwz r23, OFFSET_R23(\r) + lwz r24, OFFSET_R24(\r) + lwz r25, OFFSET_R25(\r) + lwz r26, OFFSET_R26(\r) + lwz r27, OFFSET_R27(\r) + lwz r28, OFFSET_R28(\r) + lwz r29, OFFSET_R29(\r) + lwz r30, OFFSET_R30(\r) + lwz r31, OFFSET_R31(\r) +.endm + +context_save: + CONTEXT_STORE r3 + + mflr r4 + stw r4, OFFSET_PC(r3) + + mfcr r4 + stw r4, OFFSET_CR(r3) + + # context_save returns 1 + li r3, 1 + blr + + +context_restore: + CONTEXT_LOAD r3 + + lwz r4, OFFSET_CR(r3) + mtcr r4 + + lwz r4, OFFSET_PC(r3) + mtlr r4 + + # context_restore returns 0 + li r3, 0 + blr Index: uspace/lib/libc/arch/ppc32/src/psthread.S =================================================================== --- uspace/lib/libc/arch/ppc32/src/psthread.S (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,110 +1,0 @@ -# -# Copyright (c) 2006 Martin Decky -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# - Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# - Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# - The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -.text - -.global context_save -.global context_restore - -#include -#include - -.macro CONTEXT_STORE r - stw sp, OFFSET_SP(\r) - stw r2, OFFSET_R2(\r) - stw r13, OFFSET_R13(\r) - stw r14, OFFSET_R14(\r) - stw r15, OFFSET_R15(\r) - stw r16, OFFSET_R16(\r) - stw r17, OFFSET_R17(\r) - stw r18, OFFSET_R18(\r) - stw r19, OFFSET_R19(\r) - stw r20, OFFSET_R20(\r) - stw r21, OFFSET_R21(\r) - stw r22, OFFSET_R22(\r) - stw r23, OFFSET_R23(\r) - stw r24, OFFSET_R24(\r) - stw r25, OFFSET_R25(\r) - stw r26, OFFSET_R26(\r) - stw r27, OFFSET_R27(\r) - stw r28, OFFSET_R28(\r) - stw r29, OFFSET_R29(\r) - stw r30, OFFSET_R30(\r) - stw r31, OFFSET_R31(\r) -.endm - -.macro CONTEXT_LOAD r - lwz sp, OFFSET_SP(\r) - lwz r2, OFFSET_R2(\r) - lwz r13, OFFSET_R13(\r) - lwz r14, OFFSET_R14(\r) - lwz r15, OFFSET_R15(\r) - lwz r16, OFFSET_R16(\r) - lwz r17, OFFSET_R17(\r) - lwz r18, OFFSET_R18(\r) - lwz r19, OFFSET_R19(\r) - lwz r20, OFFSET_R20(\r) - lwz r21, OFFSET_R21(\r) - lwz r22, OFFSET_R22(\r) - lwz r23, OFFSET_R23(\r) - lwz r24, OFFSET_R24(\r) - lwz r25, OFFSET_R25(\r) - lwz r26, OFFSET_R26(\r) - lwz r27, OFFSET_R27(\r) - lwz r28, OFFSET_R28(\r) - lwz r29, OFFSET_R29(\r) - lwz r30, OFFSET_R30(\r) - lwz r31, OFFSET_R31(\r) -.endm - -context_save: - CONTEXT_STORE r3 - - mflr r4 - stw r4, OFFSET_PC(r3) - - mfcr r4 - stw r4, OFFSET_CR(r3) - - # context_save returns 1 - li r3, 1 - blr - - -context_restore: - CONTEXT_LOAD r3 - - lwz r4, OFFSET_CR(r3) - mtcr r4 - - lwz r4, OFFSET_PC(r3) - mtlr r4 - - # context_restore returns 0 - li r3, 0 - blr Index: uspace/lib/libc/arch/ppc64/Makefile.inc =================================================================== --- uspace/lib/libc/arch/ppc64/Makefile.inc (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/ppc64/Makefile.inc (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -34,5 +34,5 @@ ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \ - arch/$(ARCH)/src/psthread.S \ + arch/$(ARCH)/src/fibril.S \ arch/$(ARCH)/src/thread.c Index: uspace/lib/libc/arch/ppc64/include/fibril.h =================================================================== --- uspace/lib/libc/arch/ppc64/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/ppc64/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup libcppc64 + * @{ + */ +/** @file + */ + +#ifndef LIBC_ppc64_FIBRIL_H_ +#define LIBC_ppc64_FIBRIL_H_ + +#include + +/* We define our own context_set, because we need to set + * the TLS pointer to the tcb+0x7000 + * + * See tls_set in thread.h + */ +#define context_set(c, _pc, stack, size, ptls) \ + (c)->pc = (sysarg_t) (_pc); \ + (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \ + (c)->tls = ((sysarg_t) (ptls)) + 0x7000 + sizeof(tcb_t); + +#define SP_DELTA 16 + +typedef struct { + uint64_t sp; + uint64_t pc; + + uint64_t tls; + uint64_t r13; + uint64_t r14; + uint64_t r15; + uint64_t r16; + uint64_t r17; + uint64_t r18; + uint64_t r19; + uint64_t r20; + uint64_t r21; + uint64_t r22; + uint64_t r23; + uint64_t r24; + uint64_t r25; + uint64_t r26; + uint64_t r27; + uint64_t r28; + uint64_t r29; + uint64_t r30; + uint64_t r31; + + uint64_t cr; +} __attribute__ ((packed)) context_t; + +#endif + +/** @} + */ Index: uspace/lib/libc/arch/ppc64/include/psthread.h =================================================================== --- uspace/lib/libc/arch/ppc64/include/psthread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,83 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup libcppc64 - * @{ - */ -/** @file - */ - -#ifndef LIBC_ppc64_PSTHREAD_H_ -#define LIBC_ppc64_PSTHREAD_H_ - -#include - -/* We define our own context_set, because we need to set - * the TLS pointer to the tcb+0x7000 - * - * See tls_set in thread.h - */ -#define context_set(c, _pc, stack, size, ptls) \ - (c)->pc = (sysarg_t) (_pc); \ - (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \ - (c)->tls = ((sysarg_t) (ptls)) + 0x7000 + sizeof(tcb_t); - -#define SP_DELTA 16 - -typedef struct { - uint64_t sp; - uint64_t pc; - - uint64_t tls; - uint64_t r13; - uint64_t r14; - uint64_t r15; - uint64_t r16; - uint64_t r17; - uint64_t r18; - uint64_t r19; - uint64_t r20; - uint64_t r21; - uint64_t r22; - uint64_t r23; - uint64_t r24; - uint64_t r25; - uint64_t r26; - uint64_t r27; - uint64_t r28; - uint64_t r29; - uint64_t r30; - uint64_t r31; - - uint64_t cr; -} __attribute__ ((packed)) context_t; - -#endif - -/** @} - */ Index: uspace/lib/libc/arch/ppc64/include/thread.h =================================================================== --- uspace/lib/libc/arch/ppc64/include/thread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/ppc64/include/thread.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -39,5 +39,5 @@ typedef struct { - void *pst_data; + void *fibril_data; } tcb_t; Index: uspace/lib/libc/arch/ppc64/src/fibril.S =================================================================== --- uspace/lib/libc/arch/ppc64/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/ppc64/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,110 @@ +# +# Copyright (c) 2006 Martin Decky +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +.text + +.global context_save +.global context_restore + +#include +#include + +.macro CONTEXT_STORE r + stw sp, OFFSET_SP(\r) + stw r2, OFFSET_R2(\r) + stw r13, OFFSET_R13(\r) + stw r14, OFFSET_R14(\r) + stw r15, OFFSET_R15(\r) + stw r16, OFFSET_R16(\r) + stw r17, OFFSET_R17(\r) + stw r18, OFFSET_R18(\r) + stw r19, OFFSET_R19(\r) + stw r20, OFFSET_R20(\r) + stw r21, OFFSET_R21(\r) + stw r22, OFFSET_R22(\r) + stw r23, OFFSET_R23(\r) + stw r24, OFFSET_R24(\r) + stw r25, OFFSET_R25(\r) + stw r26, OFFSET_R26(\r) + stw r27, OFFSET_R27(\r) + stw r28, OFFSET_R28(\r) + stw r29, OFFSET_R29(\r) + stw r30, OFFSET_R30(\r) + stw r31, OFFSET_R31(\r) +.endm + +.macro CONTEXT_LOAD r + lwz sp, OFFSET_SP(\r) + lwz r2, OFFSET_R2(\r) + lwz r13, OFFSET_R13(\r) + lwz r14, OFFSET_R14(\r) + lwz r15, OFFSET_R15(\r) + lwz r16, OFFSET_R16(\r) + lwz r17, OFFSET_R17(\r) + lwz r18, OFFSET_R18(\r) + lwz r19, OFFSET_R19(\r) + lwz r20, OFFSET_R20(\r) + lwz r21, OFFSET_R21(\r) + lwz r22, OFFSET_R22(\r) + lwz r23, OFFSET_R23(\r) + lwz r24, OFFSET_R24(\r) + lwz r25, OFFSET_R25(\r) + lwz r26, OFFSET_R26(\r) + lwz r27, OFFSET_R27(\r) + lwz r28, OFFSET_R28(\r) + lwz r29, OFFSET_R29(\r) + lwz r30, OFFSET_R30(\r) + lwz r31, OFFSET_R31(\r) +.endm + +context_save: + CONTEXT_STORE r3 + + mflr r4 + stw r4, OFFSET_PC(r3) + + mfcr r4 + stw r4, OFFSET_CR(r3) + + # context_save returns 1 + li r3, 1 + blr + + +context_restore: + CONTEXT_LOAD r3 + + lwz r4, OFFSET_CR(r3) + mtcr r4 + + lwz r4, OFFSET_PC(r3) + mtlr r4 + + # context_restore returns 0 + li r3, 0 + blr Index: uspace/lib/libc/arch/ppc64/src/psthread.S =================================================================== --- uspace/lib/libc/arch/ppc64/src/psthread.S (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,110 +1,0 @@ -# -# Copyright (c) 2006 Martin Decky -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# - Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# - Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# - The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -.text - -.global context_save -.global context_restore - -#include -#include - -.macro CONTEXT_STORE r - stw sp, OFFSET_SP(\r) - stw r2, OFFSET_R2(\r) - stw r13, OFFSET_R13(\r) - stw r14, OFFSET_R14(\r) - stw r15, OFFSET_R15(\r) - stw r16, OFFSET_R16(\r) - stw r17, OFFSET_R17(\r) - stw r18, OFFSET_R18(\r) - stw r19, OFFSET_R19(\r) - stw r20, OFFSET_R20(\r) - stw r21, OFFSET_R21(\r) - stw r22, OFFSET_R22(\r) - stw r23, OFFSET_R23(\r) - stw r24, OFFSET_R24(\r) - stw r25, OFFSET_R25(\r) - stw r26, OFFSET_R26(\r) - stw r27, OFFSET_R27(\r) - stw r28, OFFSET_R28(\r) - stw r29, OFFSET_R29(\r) - stw r30, OFFSET_R30(\r) - stw r31, OFFSET_R31(\r) -.endm - -.macro CONTEXT_LOAD r - lwz sp, OFFSET_SP(\r) - lwz r2, OFFSET_R2(\r) - lwz r13, OFFSET_R13(\r) - lwz r14, OFFSET_R14(\r) - lwz r15, OFFSET_R15(\r) - lwz r16, OFFSET_R16(\r) - lwz r17, OFFSET_R17(\r) - lwz r18, OFFSET_R18(\r) - lwz r19, OFFSET_R19(\r) - lwz r20, OFFSET_R20(\r) - lwz r21, OFFSET_R21(\r) - lwz r22, OFFSET_R22(\r) - lwz r23, OFFSET_R23(\r) - lwz r24, OFFSET_R24(\r) - lwz r25, OFFSET_R25(\r) - lwz r26, OFFSET_R26(\r) - lwz r27, OFFSET_R27(\r) - lwz r28, OFFSET_R28(\r) - lwz r29, OFFSET_R29(\r) - lwz r30, OFFSET_R30(\r) - lwz r31, OFFSET_R31(\r) -.endm - -context_save: - CONTEXT_STORE r3 - - mflr r4 - stw r4, OFFSET_PC(r3) - - mfcr r4 - stw r4, OFFSET_CR(r3) - - # context_save returns 1 - li r3, 1 - blr - - -context_restore: - CONTEXT_LOAD r3 - - lwz r4, OFFSET_CR(r3) - mtcr r4 - - lwz r4, OFFSET_PC(r3) - mtlr r4 - - # context_restore returns 0 - li r3, 0 - blr Index: uspace/lib/libc/arch/sparc64/Makefile.inc =================================================================== --- uspace/lib/libc/arch/sparc64/Makefile.inc (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/sparc64/Makefile.inc (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -33,5 +33,5 @@ TOOLCHAIN_DIR = /usr/local/sparc64/bin -ARCH_SOURCES += arch/$(ARCH)/src/psthread.S \ +ARCH_SOURCES += arch/$(ARCH)/src/fibril.S \ arch/$(ARCH)/src/thread.c Index: uspace/lib/libc/arch/sparc64/include/fibril.h =================================================================== --- uspace/lib/libc/arch/sparc64/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/sparc64/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup libcsparc64 + * @{ + */ +/** @file + */ + +#ifndef LIBC_sparc64_FIBRIL_H_ +#define LIBC_sparc64_FIBRIL_H_ + +#include +#include +#include + +#define SP_DELTA STACK_WINDOW_SAVE_AREA_SIZE + +#ifdef context_set +#undef context_set +#endif + +#define context_set(c, _pc, stack, size, ptls) \ + (c)->pc = ((uintptr_t) _pc) - 8; \ + (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), \ + STACK_ALIGNMENT) - (STACK_BIAS + SP_DELTA); \ + (c)->fp = -STACK_BIAS; \ + (c)->tp = ptls + +/* + * Save only registers that must be preserved across + * function calls. + */ +typedef struct { + uintptr_t sp; /* %o6 */ + uintptr_t pc; /* %o7 */ + uint64_t i0; + uint64_t i1; + uint64_t i2; + uint64_t i3; + uint64_t i4; + uint64_t i5; + uintptr_t fp; /* %i6 */ + uintptr_t i7; + uint64_t l0; + uint64_t l1; + uint64_t l2; + uint64_t l3; + uint64_t l4; + uint64_t l5; + uint64_t l6; + uint64_t l7; + uint64_t tp; /* %g7 */ +} context_t; + +#endif + +/** @} + */ Index: uspace/lib/libc/arch/sparc64/include/psthread.h =================================================================== --- uspace/lib/libc/arch/sparc64/include/psthread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,84 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup libcsparc64 - * @{ - */ -/** @file - */ - -#ifndef LIBC_sparc64_PSTHREAD_H_ -#define LIBC_sparc64_PSTHREAD_H_ - -#include -#include -#include - -#define SP_DELTA STACK_WINDOW_SAVE_AREA_SIZE - -#ifdef context_set -#undef context_set -#endif - -#define context_set(c, _pc, stack, size, ptls) \ - (c)->pc = ((uintptr_t) _pc) - 8; \ - (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), \ - STACK_ALIGNMENT) - (STACK_BIAS + SP_DELTA); \ - (c)->fp = -STACK_BIAS; \ - (c)->tp = ptls - -/* - * Save only registers that must be preserved across - * function calls. - */ -typedef struct { - uintptr_t sp; /* %o6 */ - uintptr_t pc; /* %o7 */ - uint64_t i0; - uint64_t i1; - uint64_t i2; - uint64_t i3; - uint64_t i4; - uint64_t i5; - uintptr_t fp; /* %i6 */ - uintptr_t i7; - uint64_t l0; - uint64_t l1; - uint64_t l2; - uint64_t l3; - uint64_t l4; - uint64_t l5; - uint64_t l6; - uint64_t l7; - uint64_t tp; /* %g7 */ -} context_t; - -#endif - -/** @} - */ Index: uspace/lib/libc/arch/sparc64/include/thread.h =================================================================== --- uspace/lib/libc/arch/sparc64/include/thread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/arch/sparc64/include/thread.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -41,5 +41,5 @@ typedef struct { void *self; - void *pst_data; + void *fibril_data; } tcb_t; Index: uspace/lib/libc/arch/sparc64/src/fibril.S =================================================================== --- uspace/lib/libc/arch/sparc64/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/arch/sparc64/src/fibril.S (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,97 @@ +# +# Copyright (c) 2005 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +#include + +.text + +.global context_save +.global context_restore + +.macro CONTEXT_STORE r + stx %sp, [\r + OFFSET_SP] + stx %o7, [\r + OFFSET_PC] + stx %i0, [\r + OFFSET_I0] + stx %i1, [\r + OFFSET_I1] + stx %i2, [\r + OFFSET_I2] + stx %i3, [\r + OFFSET_I3] + stx %i4, [\r + OFFSET_I4] + stx %i5, [\r + OFFSET_I5] + stx %fp, [\r + OFFSET_FP] + stx %i7, [\r + OFFSET_I7] + stx %l0, [\r + OFFSET_L0] + stx %l1, [\r + OFFSET_L1] + stx %l2, [\r + OFFSET_L2] + stx %l3, [\r + OFFSET_L3] + stx %l4, [\r + OFFSET_L4] + stx %l5, [\r + OFFSET_L5] + stx %l6, [\r + OFFSET_L6] + stx %l7, [\r + OFFSET_L7] + stx %g7, [\r + OFFSET_TP] +.endm + +.macro CONTEXT_LOAD r + ldx [\r + OFFSET_SP], %sp + ldx [\r + OFFSET_PC], %o7 + ldx [\r + OFFSET_I0], %i0 + ldx [\r + OFFSET_I1], %i1 + ldx [\r + OFFSET_I2], %i2 + ldx [\r + OFFSET_I3], %i3 + ldx [\r + OFFSET_I4], %i4 + ldx [\r + OFFSET_I5], %i5 + ldx [\r + OFFSET_FP], %fp + ldx [\r + OFFSET_I7], %i7 + ldx [\r + OFFSET_L0], %l0 + ldx [\r + OFFSET_L1], %l1 + ldx [\r + OFFSET_L2], %l2 + ldx [\r + OFFSET_L3], %l3 + ldx [\r + OFFSET_L4], %l4 + ldx [\r + OFFSET_L5], %l5 + ldx [\r + OFFSET_L6], %l6 + ldx [\r + OFFSET_L7], %l7 + ldx [\r + OFFSET_TP], %g7 +.endm + +context_save: + CONTEXT_STORE %o0 + retl + mov 1, %o0 ! context_save_arch returns 1 + +context_restore: + # + # Flush all active windows. + # This is essential, because CONTEXT_LOAD overwrites + # %sp of CWP - 1 with the value written to %fp of CWP. + # Flushing all active windows mitigates this problem + # as CWP - 1 becomes the overlap window. + # + flushw + + CONTEXT_LOAD %o0 + retl + xor %o0, %o0, %o0 ! context_restore_arch returns 0 Index: uspace/lib/libc/arch/sparc64/src/psthread.S =================================================================== --- uspace/lib/libc/arch/sparc64/src/psthread.S (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,97 +1,0 @@ -# -# Copyright (c) 2005 Jakub Jermar -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# - Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# - Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# - The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -#include - -.text - -.global context_save -.global context_restore - -.macro CONTEXT_STORE r - stx %sp, [\r + OFFSET_SP] - stx %o7, [\r + OFFSET_PC] - stx %i0, [\r + OFFSET_I0] - stx %i1, [\r + OFFSET_I1] - stx %i2, [\r + OFFSET_I2] - stx %i3, [\r + OFFSET_I3] - stx %i4, [\r + OFFSET_I4] - stx %i5, [\r + OFFSET_I5] - stx %fp, [\r + OFFSET_FP] - stx %i7, [\r + OFFSET_I7] - stx %l0, [\r + OFFSET_L0] - stx %l1, [\r + OFFSET_L1] - stx %l2, [\r + OFFSET_L2] - stx %l3, [\r + OFFSET_L3] - stx %l4, [\r + OFFSET_L4] - stx %l5, [\r + OFFSET_L5] - stx %l6, [\r + OFFSET_L6] - stx %l7, [\r + OFFSET_L7] - stx %g7, [\r + OFFSET_TP] -.endm - -.macro CONTEXT_LOAD r - ldx [\r + OFFSET_SP], %sp - ldx [\r + OFFSET_PC], %o7 - ldx [\r + OFFSET_I0], %i0 - ldx [\r + OFFSET_I1], %i1 - ldx [\r + OFFSET_I2], %i2 - ldx [\r + OFFSET_I3], %i3 - ldx [\r + OFFSET_I4], %i4 - ldx [\r + OFFSET_I5], %i5 - ldx [\r + OFFSET_FP], %fp - ldx [\r + OFFSET_I7], %i7 - ldx [\r + OFFSET_L0], %l0 - ldx [\r + OFFSET_L1], %l1 - ldx [\r + OFFSET_L2], %l2 - ldx [\r + OFFSET_L3], %l3 - ldx [\r + OFFSET_L4], %l4 - ldx [\r + OFFSET_L5], %l5 - ldx [\r + OFFSET_L6], %l6 - ldx [\r + OFFSET_L7], %l7 - ldx [\r + OFFSET_TP], %g7 -.endm - -context_save: - CONTEXT_STORE %o0 - retl - mov 1, %o0 ! context_save_arch returns 1 - -context_restore: - # - # Flush all active windows. - # This is essential, because CONTEXT_LOAD overwrites - # %sp of CWP - 1 with the value written to %fp of CWP. - # Flushing all active windows mitigates this problem - # as CWP - 1 becomes the overlap window. - # - flushw - - CONTEXT_LOAD %o0 - retl - xor %o0, %o0, %o0 ! context_restore_arch returns 0 Index: uspace/lib/libc/generic/async.c =================================================================== --- uspace/lib/libc/generic/async.c (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/generic/async.c (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -86,9 +86,8 @@ * } * - * TODO: Detaching/joining dead psthreads? */ #include #include -#include +#include #include #include @@ -105,11 +104,16 @@ typedef struct { - struct timeval expires; /**< Expiration time for waiting thread */ - int inlist; /**< If true, this struct is in timeout list */ + /** Expiration time for waiting fibril. */ + struct timeval expires; + /** If true, this struct is in the timeout list. */ + int inlist; link_t link; - pstid_t ptid; /**< Thread waiting for this message */ - int active; /**< If this thread is currently active */ - int timedout; /**< If true, we timed out */ + /** Fibril waiting for this message. */ + fid_t fid; + /** If this fibril is currently active. */ + int active; + /** If true, we timed out. */ + int timedout; } awaiter_t; @@ -119,5 +123,5 @@ int done; /**< If reply was received */ ipc_call_t *dataptr; /**< Pointer where the answer data - * is stored */ + * is stored */ ipcarg_t retval; } amsg_t; @@ -132,16 +136,17 @@ awaiter_t wdata; - link_t link; /**< Hash table link */ + link_t link; /**< Hash table link. */ ipcarg_t in_phone_hash; /**< Incoming phone hash. */ - link_t msg_queue; /**< Messages that should be delivered to this thread */ + link_t msg_queue; /**< Messages that should be delivered + * to this fibril. */ /* Structures for connection opening packet */ ipc_callid_t callid; ipc_call_t call; - ipc_callid_t close_callid; /* Identification of closing packet */ - void (*cthread)(ipc_callid_t,ipc_call_t *); + ipc_callid_t close_callid; /* Identification of closing packet. */ + void (*cfibril)(ipc_callid_t, ipc_call_t *); } connection_t; -/** Identifier of incoming connection handled by current thread */ -__thread connection_t *PS_connection; +/** Identifier of the incoming connection handled by the current fibril. */ +__thread connection_t *FIBRIL_connection; /** If true, it is forbidden to use async_req functions and * all preemption is disabled */ @@ -286,5 +291,5 @@ } conn->wdata.active = 1; - psthread_add_ready(conn->wdata.ptid); + fibril_add_ready(conn->wdata.fid); } @@ -301,11 +306,11 @@ connection_t *conn; - assert(PS_connection); - /* GCC 4.1.0 coughs on PS_connection-> dereference, + assert(FIBRIL_connection); + /* GCC 4.1.0 coughs on FIBRIL_connection-> dereference, * GCC 4.1.1 happilly puts the rdhwr instruction in delay slot. * I would never expect to find so many errors in * compiler *($&$(*&$ */ - conn = PS_connection; + conn = FIBRIL_connection; futex_down(&async_futex); @@ -323,9 +328,9 @@ conn->wdata.active = 0; - psthread_schedule_next_adv(PS_TO_MANAGER); + fibril_schedule_next_adv(FIBRIL_TO_MANAGER); /* Futex is up after getting back from async_manager * get it again */ futex_down(&async_futex); - if (usecs && conn->wdata.timedout && \ + if (usecs && conn->wdata.timedout && list_empty(&conn->msg_queue)) { /* If we timed out-> exit */ @@ -365,5 +370,5 @@ * @param arg Connection structure pointer */ -static int connection_thread(void *arg) +static int connection_fibril(void *arg) { unsigned long key; @@ -372,24 +377,26 @@ /* Setup thread local connection pointer */ - PS_connection = (connection_t *)arg; - PS_connection->cthread(PS_connection->callid, &PS_connection->call); + FIBRIL_connection = (connection_t *) arg; + FIBRIL_connection->cfibril(FIBRIL_connection->callid, + &FIBRIL_connection->call); /* Remove myself from connection hash table */ futex_down(&async_futex); - key = PS_connection->in_phone_hash; + key = FIBRIL_connection->in_phone_hash; hash_table_remove(&conn_hash_table, &key, 1); futex_up(&async_futex); /* Answer all remaining messages with ehangup */ - while (!list_empty(&PS_connection->msg_queue)) { - msg = list_get_instance(PS_connection->msg_queue.next, msg_t, link); + while (!list_empty(&FIBRIL_connection->msg_queue)) { + msg = list_get_instance(FIBRIL_connection->msg_queue.next, + msg_t, link); list_remove(&msg->link); - if (msg->callid == PS_connection->close_callid) + if (msg->callid == FIBRIL_connection->close_callid) close_answered = 1; ipc_answer_fast(msg->callid, EHANGUP, 0, 0); free(msg); } - if (PS_connection->close_callid) - ipc_answer_fast(PS_connection->close_callid, 0, 0, 0); + if (FIBRIL_connection->close_callid) + ipc_answer_fast(FIBRIL_connection->close_callid, 0, 0, 0); return 0; @@ -406,9 +413,10 @@ * @param callid Callid of the IPC_M_CONNECT_ME_TO packet * @param call Call data of the opening packet - * @param cthread Thread function that should be called upon + * @param cfibril Fibril function that should be called upon * opening the connection - * @return New thread id - */ -pstid_t async_new_connection(ipcarg_t in_phone_hash,ipc_callid_t callid, ipc_call_t *call, void (*cthread)(ipc_callid_t, ipc_call_t *)) + * @return New fibril id. + */ +fid_t async_new_connection(ipcarg_t in_phone_hash, ipc_callid_t callid, + ipc_call_t *call, void (*cfibril)(ipc_callid_t, ipc_call_t *)) { connection_t *conn; @@ -427,8 +435,8 @@ conn->call = *call; conn->wdata.active = 1; /* We will activate it asap */ - conn->cthread = cthread; - - conn->wdata.ptid = psthread_create(connection_thread, conn); - if (!conn->wdata.ptid) { + conn->cfibril = cfibril; + + conn->wdata.fid = fibril_create(connection_fibril, conn); + if (!conn->wdata.fid) { free(conn); ipc_answer_fast(callid, ENOMEM, 0, 0); @@ -441,7 +449,7 @@ futex_up(&async_futex); - psthread_add_ready(conn->wdata.ptid); - - return conn->wdata.ptid; + fibril_add_ready(conn->wdata.fid); + + return conn->wdata.fid; } @@ -460,5 +468,6 @@ case IPC_M_CONNECT_ME_TO: /* Open new connection with thread etc. */ - async_new_connection(IPC_GET_ARG3(*call), callid, call, client_connection); + async_new_connection(IPC_GET_ARG3(*call), callid, call, + client_connection); return; } @@ -486,5 +495,5 @@ cur = timeout_list.next; while (cur != &timeout_list) { - waiter = list_get_instance(cur,awaiter_t,link); + waiter = list_get_instance(cur, awaiter_t, link); if (tv_gt(&waiter->expires, &tv)) break; @@ -498,5 +507,5 @@ if (!waiter->active) { waiter->active = 1; - psthread_add_ready(waiter->ptid); + fibril_add_ready(waiter->fid); } } @@ -515,5 +524,5 @@ while (1) { - if (psthread_schedule_next_adv(PS_FROM_MANAGER)) { + if (fibril_schedule_next_adv(FIBRIL_FROM_MANAGER)) { futex_up(&async_futex); /* async_futex is always held @@ -524,6 +533,7 @@ futex_down(&async_futex); if (!list_empty(&timeout_list)) { - waiter = list_get_instance(timeout_list.next,awaiter_t,link); - gettimeofday(&tv,NULL); + waiter = list_get_instance(timeout_list.next, awaiter_t, + link); + gettimeofday(&tv, NULL); if (tv_gteq(&tv, &waiter->expires)) { futex_up(&async_futex); @@ -573,8 +583,8 @@ void async_create_manager(void) { - pstid_t ptid; - - ptid = psthread_create(async_manager_thread, NULL); - psthread_add_manager(ptid); + fid_t fid; + + fid = fibril_create(async_manager_thread, NULL); + fibril_add_manager(fid); } @@ -582,5 +592,5 @@ void async_destroy_manager(void) { - psthread_remove_manager(); + fibril_remove_manager(); } @@ -588,5 +598,6 @@ int _async_init(void) { - if (!hash_table_create(&conn_hash_table, CONN_HASH_TABLE_CHAINS, 1, &conn_hash_table_ops)) { + if (!hash_table_create(&conn_hash_table, CONN_HASH_TABLE_CHAINS, 1, + &conn_hash_table_ops)) { printf("%s: cannot create hash table\n", "async"); return ENOMEM; @@ -598,5 +609,5 @@ /** IPC handler for messages in async framework * - * Notify thread that is waiting for this message, that it arrived + * Notify the fibril which is waiting for this message, that it arrived */ static void reply_received(void *private, int retval, @@ -621,5 +632,5 @@ if (! msg->wdata.active) { msg->wdata.active = 1; - psthread_add_ready(msg->wdata.ptid); + fibril_add_ready(msg->wdata.fid); } futex_up(&async_futex); @@ -633,4 +644,31 @@ aid_t async_send_2(int phoneid, ipcarg_t method, ipcarg_t arg1, ipcarg_t arg2, ipc_call_t *dataptr) +{ + amsg_t *msg; + + if (in_interrupt_handler) { + printf("Cannot send asynchronous request in interrupt " + "handler.\n"); + _exit(1); + } + + msg = malloc(sizeof(*msg)); + msg->done = 0; + msg->dataptr = dataptr; + + msg->wdata.active = 1; /* We may sleep in next method, but it + * will use it's own mechanism */ + ipc_call_async_2(phoneid, method, arg1, arg2, msg, reply_received, 1); + + return (aid_t) msg; +} + +/** Send message and return id of the sent message + * + * The return value can be used as input for async_wait() to wait + * for completion. + */ +aid_t async_send_3(int phoneid, ipcarg_t method, ipcarg_t arg1, ipcarg_t arg2, + ipcarg_t arg3, ipc_call_t *dataptr) { amsg_t *msg; @@ -647,31 +685,6 @@ msg->wdata.active = 1; /* We may sleep in next method, but it * will use it's own mechanism */ - ipc_call_async_2(phoneid,method,arg1,arg2,msg,reply_received,1); - - return (aid_t) msg; -} - -/** Send message and return id of the sent message - * - * The return value can be used as input for async_wait() to wait - * for completion. - */ -aid_t async_send_3(int phoneid, ipcarg_t method, ipcarg_t arg1, ipcarg_t arg2, - ipcarg_t arg3, ipc_call_t *dataptr) -{ - amsg_t *msg; - - if (in_interrupt_handler) { - printf("Cannot send asynchronous request in interrupt handler.\n"); - _exit(1); - } - - msg = malloc(sizeof(*msg)); - msg->done = 0; - msg->dataptr = dataptr; - - msg->wdata.active = 1; /* We may sleep in next method, but it - * will use it's own mechanism */ - ipc_call_async_3(phoneid,method,arg1,arg2,arg3, msg,reply_received,1); + ipc_call_async_3(phoneid, method, arg1, arg2, arg3, msg, reply_received, + 1); return (aid_t) msg; @@ -695,10 +708,10 @@ } - msg->wdata.ptid = psthread_get_id(); + msg->wdata.fid = fibril_get_id(); msg->wdata.active = 0; msg->wdata.inlist = 0; /* Leave locked async_futex when entering this function */ - psthread_schedule_next_adv(PS_TO_MANAGER); - /* futex is up automatically after psthread_schedule_next...*/ + fibril_schedule_next_adv(FIBRIL_TO_MANAGER); + /* futex is up automatically after fibril_schedule_next...*/ done: if (retval) @@ -733,11 +746,11 @@ tv_add(&msg->wdata.expires, timeout); - msg->wdata.ptid = psthread_get_id(); + msg->wdata.fid = fibril_get_id(); msg->wdata.active = 0; insert_timeout(&msg->wdata); /* Leave locked async_futex when entering this function */ - psthread_schedule_next_adv(PS_TO_MANAGER); - /* futex is up automatically after psthread_schedule_next...*/ + fibril_schedule_next_adv(FIBRIL_TO_MANAGER); + /* futex is up automatically after fibril_schedule_next...*/ if (!msg->done) @@ -769,5 +782,5 @@ return; - msg->wdata.ptid = psthread_get_id(); + msg->wdata.fid = fibril_get_id(); msg->wdata.active = 0; @@ -778,6 +791,6 @@ insert_timeout(&msg->wdata); /* Leave locked async_futex when entering this function */ - psthread_schedule_next_adv(PS_TO_MANAGER); - /* futex is up automatically after psthread_schedule_next...*/ + fibril_schedule_next_adv(FIBRIL_TO_MANAGER); + /* futex is up automatically after fibril_schedule_next...*/ free(msg); } @@ -800,10 +813,12 @@ ipcarg_t arg2, ipcarg_t arg3) { - ipc_call_async_3(phoneid, method, arg1, arg2, arg3, NULL, NULL, !in_interrupt_handler); + ipc_call_async_3(phoneid, method, arg1, arg2, arg3, NULL, NULL, + !in_interrupt_handler); } void async_msg_2(int phoneid, ipcarg_t method, ipcarg_t arg1, ipcarg_t arg2) { - ipc_call_async_2(phoneid, method, arg1, arg2, NULL, NULL, !in_interrupt_handler); + ipc_call_async_2(phoneid, method, arg1, arg2, NULL, NULL, + !in_interrupt_handler); } Index: uspace/lib/libc/generic/fibril.c =================================================================== --- uspace/lib/libc/generic/fibril.c (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/generic/fibril.c (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,374 @@ +/* + * Copyright (c) 2006 Ondrej Palkovsky + * Copyright (c) 2007 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup libc + * @{ + */ +/** @file + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef FIBRIL_INITIAL_STACK_PAGES_NO +#define FIBRIL_INITIAL_STACK_PAGES_NO 1 +#endif + +static LIST_INITIALIZE(ready_list); +static LIST_INITIALIZE(serialized_list); +static LIST_INITIALIZE(manager_list); + +static void fibril_main(void); + +static atomic_t fibril_futex = FUTEX_INITIALIZER; +/** Number of threads that are in async_serialized mode */ +static int serialized_threads; /* Protected by async_futex */ +/** Thread-local count of serialization. If >0, we must not preempt */ +static __thread int serialization_count; +/** Counter for fibrils residing in async_manager */ +static int fibrils_in_manager; + +/** Setup fibril information into TCB structure */ +fibril_t *fibril_setup(void) +{ + fibril_t *f; + tcb_t *tcb; + + tcb = __make_tls(); + if (!tcb) + return NULL; + + f = malloc(sizeof(*f)); + if (!f) { + __free_tls(tcb); + return NULL; + } + + tcb->fibril_data = f; + f->tcb = tcb; + + return f; +} + +void fibril_teardown(fibril_t *f) +{ + __free_tls(f->tcb); + free(f); +} + +/** Function that spans the whole life-cycle of a fibril. + * + * Each fibril begins execution in this function. Then the function + * implementing the fibril logic is called. After its return, the return value + * is saved for a potentional joiner. If the joiner exists, it is woken up. The + * fibril then switches to another fibril, which cleans up after it. + */ +void fibril_main(void) +{ + fibril_t *f = __tcb_get()->fibril_data; + + f->retval = f->func(f->arg); + + /* + * If there is a joiner, wake it up and save our return value. + */ + if (f->joiner) { + list_append(&f->joiner->link, &ready_list); + f->joiner->joinee_retval = f->retval; + } + + fibril_schedule_next_adv(FIBRIL_FROM_DEAD); + /* not reached */ +} + +/** Schedule next fibril. + * + * If calling with FIBRIL_TO_MANAGER parameter, the async_futex should be + * held. + * + * @param stype One of FIBRIL_SLEEP, FIBRIL_PREEMPT, FIBRIL_TO_MANAGER, + * FIBRIL_FROM_MANAGER, FIBRIL_FROM_DEAD. The parameter + * describes the circumstances of the switch. + * @return Return 0 if there is no ready fibril, + * return 1 otherwise. + */ +int fibril_schedule_next_adv(fibril_switch_type_t stype) +{ + fibril_t *srcf, *dstf; + int retval = 0; + + futex_down(&fibril_futex); + + if (stype == FIBRIL_PREEMPT && list_empty(&ready_list)) + goto ret_0; + if (stype == FIBRIL_SLEEP) { + if (list_empty(&ready_list) && list_empty(&serialized_list)) + goto ret_0; + } + + if (stype == FIBRIL_FROM_MANAGER) { + if (list_empty(&ready_list) && list_empty(&serialized_list)) + goto ret_0; + /* + * Do not preempt if there is not sufficient count of thread + * managers. + */ + if (list_empty(&serialized_list) && fibrils_in_manager <= + serialized_threads) { + goto ret_0; + } + } + /* If we are going to manager and none exists, create it */ + if (stype == FIBRIL_TO_MANAGER || stype == FIBRIL_FROM_DEAD) { + while (list_empty(&manager_list)) { + futex_up(&fibril_futex); + async_create_manager(); + futex_down(&fibril_futex); + } + } + + srcf = __tcb_get()->fibril_data; + if (stype != FIBRIL_FROM_DEAD) { + /* Save current state */ + if (!context_save(&srcf->ctx)) { + if (serialization_count) + srcf->flags &= ~FIBRIL_SERIALIZED; + if (srcf->clean_after_me) { + /* + * Cleanup after the dead fibril from which we + * restored context here. + */ + free(srcf->clean_after_me->stack); + fibril_teardown(srcf->clean_after_me); + srcf->clean_after_me = NULL; + } + return 1; /* futex_up already done here */ + } + + /* Save myself to the correct run list */ + if (stype == FIBRIL_PREEMPT) + list_append(&srcf->link, &ready_list); + else if (stype == FIBRIL_FROM_MANAGER) { + list_append(&srcf->link, &manager_list); + fibrils_in_manager--; + } else { + /* + * If stype == FIBRIL_TO_MANAGER, don't put ourselves to + * any list, we should already be somewhere, or we will + * be lost. + * + * The stype == FIBRIL_SLEEP case is similar. The fibril + * has an external refernce which can be used to wake it + * up once that time has come. + */ + } + } + + /* Choose a new fibril to run */ + if (stype == FIBRIL_TO_MANAGER || stype == FIBRIL_FROM_DEAD) { + dstf = list_get_instance(manager_list.next, fibril_t, link); + if (serialization_count && stype == FIBRIL_TO_MANAGER) { + serialized_threads++; + srcf->flags |= FIBRIL_SERIALIZED; + } + fibrils_in_manager++; + + if (stype == FIBRIL_FROM_DEAD) + dstf->clean_after_me = srcf; + } else { + if (!list_empty(&serialized_list)) { + dstf = list_get_instance(serialized_list.next, fibril_t, + link); + serialized_threads--; + } else { + dstf = list_get_instance(ready_list.next, fibril_t, + link); + } + } + list_remove(&dstf->link); + + futex_up(&fibril_futex); + context_restore(&dstf->ctx); + /* not reached */ + +ret_0: + futex_up(&fibril_futex); + return retval; +} + +/** Wait for fibril to finish. + * + * Each fibril can be only joined by one other fibril. Moreover, the joiner must + * be from the same thread as the joinee. + * + * @param fid Fibril to join. + * + * @return Value returned by the completed fibril. + */ +int fibril_join(fid_t fid) +{ + fibril_t *f; + fibril_t *cur; + + /* Handle fid = Kernel address -> it is wait for call */ + f = (fibril_t *) fid; + + /* + * The joiner is running so the joinee isn't. + */ + cur = __tcb_get()->fibril_data; + f->joiner = cur; + fibril_schedule_next_adv(FIBRIL_SLEEP); + + /* + * The joinee fills in the return value. + */ + return cur->joinee_retval; +} + +/** Create a new fibril. + * + * @param func Implementing function of the new fibril. + * @param arg Argument to pass to func. + * + * @return Return 0 on failure or TLS of the new fibril. + */ +fid_t fibril_create(int (*func)(void *), void *arg) +{ + fibril_t *f; + + f = fibril_setup(); + if (!f) + return 0; + f->stack = (char *) malloc(FIBRIL_INITIAL_STACK_PAGES_NO * + getpagesize()); + + if (!f->stack) { + fibril_teardown(f); + return 0; + } + + f->arg = arg; + f->func = func; + f->clean_after_me = NULL; + f->joiner = NULL; + f->joinee_retval = 0; + f->retval = 0; + f->flags = 0; + + context_save(&f->ctx); + context_set(&f->ctx, FADDR(fibril_main), f->stack, + FIBRIL_INITIAL_STACK_PAGES_NO * getpagesize(), f->tcb); + + return (fid_t) f; +} + +/** Add a fibril to the ready list. + * + * @param fid Pinter to the fibril structure of the fibril to be added. + */ +void fibril_add_ready(fid_t fid) +{ + fibril_t *f; + + f = (fibril_t *) fid; + futex_down(&fibril_futex); + if ((f->flags & FIBRIL_SERIALIZED)) + list_append(&f->link, &serialized_list); + else + list_append(&f->link, &ready_list); + futex_up(&fibril_futex); +} + +/** Add a fibril to the manager list. + * + * @param fid Pinter to the fibril structure of the fibril to be added. + */ +void fibril_add_manager(fid_t fid) +{ + fibril_t *f; + + f = (fibril_t *) fid; + + futex_down(&fibril_futex); + list_append(&f->link, &manager_list); + futex_up(&fibril_futex); +} + +/** Remove one manager from the manager list. */ +void fibril_remove_manager(void) +{ + futex_down(&fibril_futex); + if (list_empty(&manager_list)) { + futex_up(&fibril_futex); + return; + } + list_remove(manager_list.next); + futex_up(&fibril_futex); +} + +/** Return fibril id of the currently running fibril. + * + * @return Fibril ID of the currently running pseudo thread. + */ +fid_t fibril_get_id(void) +{ + return (fid_t) __tcb_get()->fibril_data; +} + +/** Disable preemption + * + * If the fibril wants to send several message in a row and does not want to be + * preempted, it should start async_serialize_start() in the beginning of + * communication and async_serialize_end() in the end. If it is a true + * multithreaded application, it should protect the communication channel by a + * futex as well. Interrupt messages can still be preempted. + */ +void fibril_inc_sercount(void) +{ + serialization_count++; +} + +/** Restore the preemption counter to the previous state. */ +void fibril_dec_sercount(void) +{ + serialization_count--; +} + +/** @} + */ + Index: uspace/lib/libc/generic/ipc.c =================================================================== --- uspace/lib/libc/generic/ipc.c (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/generic/ipc.c (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -50,5 +50,5 @@ #include #include -#include +#include /** Structure used for keeping track of sent asynchronous calls and queing @@ -67,5 +67,5 @@ } msg; } u; - pstid_t ptid; /**< Pseudothread waiting for sending this call. */ + fid_t fid; /**< Fibril waiting for sending this call. */ } async_call_t; @@ -217,9 +217,9 @@ if (can_preempt) { - call->ptid = psthread_get_id(); - psthread_schedule_next_adv(PS_TO_MANAGER); + call->fid = fibril_get_id(); + fibril_schedule_next_adv(FIBRIL_TO_MANAGER); /* Async futex unlocked by previous call */ } else { - call->ptid = 0; + call->fid = 0; futex_up(&async_futex); } @@ -384,6 +384,6 @@ futex_up(&async_futex); - if (call->ptid) - psthread_add_ready(call->ptid); + if (call->fid) + fibril_add_ready(call->fid); if (callid == IPC_CALLRET_FATAL) { Index: uspace/lib/libc/generic/libc.c =================================================================== --- uspace/lib/libc/generic/libc.c (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/generic/libc.c (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -43,5 +43,5 @@ #include #include -#include +#include #include #include @@ -58,10 +58,10 @@ void __main(void) { - psthread_data_t *pt; + fibril_t *f; (void) as_area_create(&_heap, 1, AS_AREA_WRITE | AS_AREA_READ); _async_init(); - pt = psthread_setup(); - __tcb_set(pt->tcb); + f = fibril_setup(); + __tcb_set(f->tcb); } @@ -75,5 +75,5 @@ void __exit(void) { - psthread_teardown(__tcb_get()->pst_data); + fibril_teardown(__tcb_get()->fibril_data); _exit(0); } Index: uspace/lib/libc/generic/psthread.c =================================================================== --- uspace/lib/libc/generic/psthread.c (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,378 +1,0 @@ -/* - * Copyright (c) 2006 Ondrej Palkovsky - * Copyright (c) 2007 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup libc - * @{ - */ -/** @file - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifndef PSTHREAD_INITIAL_STACK_PAGES_NO -#define PSTHREAD_INITIAL_STACK_PAGES_NO 1 -#endif - -static LIST_INITIALIZE(ready_list); -static LIST_INITIALIZE(serialized_list); -static LIST_INITIALIZE(manager_list); - -static void psthread_main(void); - -static atomic_t psthread_futex = FUTEX_INITIALIZER; -/** Count of real threads that are in async_serialized mode */ -static int serialized_threads; /* Protected by async_futex */ -/** Thread-local count of serialization. If >0, we must not preempt */ -static __thread int serialization_count; -/** Counter of threads residing in async_manager */ -static int threads_in_manager; - -/** Setup psthread information into TCB structure */ -psthread_data_t *psthread_setup(void) -{ - psthread_data_t *pt; - tcb_t *tcb; - - tcb = __make_tls(); - if (!tcb) - return NULL; - - pt = malloc(sizeof(*pt)); - if (!pt) { - __free_tls(tcb); - return NULL; - } - - tcb->pst_data = pt; - pt->tcb = tcb; - - return pt; -} - -void psthread_teardown(psthread_data_t *pt) -{ - __free_tls(pt->tcb); - free(pt); -} - -/** Function that spans the whole life-cycle of a pseudo thread. - * - * Each pseudo thread begins execution in this function. - * Then the function implementing the pseudo thread logic is called. - * After its return, the return value is saved for a potentional - * joiner. If the joiner exists, it is woken up. The pseudo thread - * then switches to another pseudo thread, which cleans up after it. - */ -void psthread_main(void) -{ - psthread_data_t *pt = __tcb_get()->pst_data; - - pt->retval = pt->func(pt->arg); - - /* - * If there is a joiner, wake it up and save our return value. - */ - if (pt->joiner) { - list_append(&pt->joiner->link, &ready_list); - pt->joiner->joinee_retval = pt->retval; - } - - psthread_schedule_next_adv(PS_FROM_DEAD); - /* not reached */ -} - -/** Schedule next userspace pseudo thread. - * - * If calling with PS_TO_MANAGER parameter, the async_futex should be - * held. - * - * @param ctype One of PS_SLEEP, PS_PREEMPT, PS_TO_MANAGER, - * PS_FROM_MANAGER, PS_FROM_DEAD. The parameter describes - * the circumstances of the switch. - * @return Return 0 if there is no ready pseudo thread, - * return 1 otherwise. - */ -int psthread_schedule_next_adv(pschange_type ctype) -{ - psthread_data_t *srcpt, *dstpt; - int retval = 0; - - futex_down(&psthread_futex); - - if (ctype == PS_PREEMPT && list_empty(&ready_list)) - goto ret_0; - if (ctype == PS_SLEEP) { - if (list_empty(&ready_list) && list_empty(&serialized_list)) - goto ret_0; - } - - if (ctype == PS_FROM_MANAGER) { - if (list_empty(&ready_list) && list_empty(&serialized_list)) - goto ret_0; - /* - * Do not preempt if there is not sufficient count of thread - * managers. - */ - if (list_empty(&serialized_list) && threads_in_manager <= - serialized_threads) { - goto ret_0; - } - } - /* If we are going to manager and none exists, create it */ - if (ctype == PS_TO_MANAGER || ctype == PS_FROM_DEAD) { - while (list_empty(&manager_list)) { - futex_up(&psthread_futex); - async_create_manager(); - futex_down(&psthread_futex); - } - } - - srcpt = __tcb_get()->pst_data; - if (ctype != PS_FROM_DEAD) { - /* Save current state */ - if (!context_save(&srcpt->ctx)) { - if (serialization_count) - srcpt->flags &= ~PSTHREAD_SERIALIZED; - if (srcpt->clean_after_me) { - /* - * Cleanup after the dead pseudo thread from - * which we restored context here. - */ - free(srcpt->clean_after_me->stack); - psthread_teardown(srcpt->clean_after_me); - srcpt->clean_after_me = NULL; - } - return 1; /* futex_up already done here */ - } - - /* Save myself to the correct run list */ - if (ctype == PS_PREEMPT) - list_append(&srcpt->link, &ready_list); - else if (ctype == PS_FROM_MANAGER) { - list_append(&srcpt->link, &manager_list); - threads_in_manager--; - } else { - /* - * If ctype == PS_TO_MANAGER, don't save ourselves to - * any list, we should already be somewhere, or we will - * be lost. - * - * The ctype == PS_SLEEP case is similar. The pseudo - * thread has an external refernce which can be used to - * wake it up once that time has come. - */ - } - } - - /* Choose new thread to run */ - if (ctype == PS_TO_MANAGER || ctype == PS_FROM_DEAD) { - dstpt = list_get_instance(manager_list.next, psthread_data_t, - link); - if (serialization_count && ctype == PS_TO_MANAGER) { - serialized_threads++; - srcpt->flags |= PSTHREAD_SERIALIZED; - } - threads_in_manager++; - - if (ctype == PS_FROM_DEAD) - dstpt->clean_after_me = srcpt; - } else { - if (!list_empty(&serialized_list)) { - dstpt = list_get_instance(serialized_list.next, - psthread_data_t, link); - serialized_threads--; - } else { - dstpt = list_get_instance(ready_list.next, - psthread_data_t, link); - } - } - list_remove(&dstpt->link); - - futex_up(&psthread_futex); - context_restore(&dstpt->ctx); - /* not reached */ - -ret_0: - futex_up(&psthread_futex); - return retval; -} - -/** Wait for uspace pseudo thread to finish. - * - * Each pseudo thread can be only joined by one other pseudo thread. Moreover, - * the joiner must be from the same thread as the joinee. - * - * @param psthrid Pseudo thread to join. - * - * @return Value returned by the finished thread. - */ -int psthread_join(pstid_t psthrid) -{ - psthread_data_t *pt; - psthread_data_t *cur; - - /* Handle psthrid = Kernel address -> it is wait for call */ - pt = (psthread_data_t *) psthrid; - - /* - * The joiner is running so the joinee isn't. - */ - cur = __tcb_get()->pst_data; - pt->joiner = cur; - psthread_schedule_next_adv(PS_SLEEP); - - /* - * The joinee fills in the return value. - */ - return cur->joinee_retval; -} - -/** Create a userspace pseudo thread. - * - * @param func Pseudo thread function. - * @param arg Argument to pass to func. - * - * @return Return 0 on failure or TLS of the new pseudo thread. - */ -pstid_t psthread_create(int (*func)(void *), void *arg) -{ - psthread_data_t *pt; - - pt = psthread_setup(); - if (!pt) - return 0; - pt->stack = (char *) malloc(PSTHREAD_INITIAL_STACK_PAGES_NO * - getpagesize()); - - if (!pt->stack) { - psthread_teardown(pt); - return 0; - } - - pt->arg= arg; - pt->func = func; - pt->clean_after_me = NULL; - pt->joiner = NULL; - pt->joinee_retval = 0; - pt->retval = 0; - pt->flags = 0; - - context_save(&pt->ctx); - context_set(&pt->ctx, FADDR(psthread_main), pt->stack, - PSTHREAD_INITIAL_STACK_PAGES_NO * getpagesize(), pt->tcb); - - return (pstid_t) pt; -} - -/** Add a thread to the ready list. - * - * @param psthrid Pinter to the pseudo thread structure of the - * pseudo thread to be added. - */ -void psthread_add_ready(pstid_t psthrid) -{ - psthread_data_t *pt; - - pt = (psthread_data_t *) psthrid; - futex_down(&psthread_futex); - if ((pt->flags & PSTHREAD_SERIALIZED)) - list_append(&pt->link, &serialized_list); - else - list_append(&pt->link, &ready_list); - futex_up(&psthread_futex); -} - -/** Add a pseudo thread to the manager list. - * - * @param psthrid Pinter to the pseudo thread structure of the - * pseudo thread to be added. - */ -void psthread_add_manager(pstid_t psthrid) -{ - psthread_data_t *pt; - - pt = (psthread_data_t *) psthrid; - - futex_down(&psthread_futex); - list_append(&pt->link, &manager_list); - futex_up(&psthread_futex); -} - -/** Remove one manager from manager list */ -void psthread_remove_manager(void) -{ - futex_down(&psthread_futex); - if (list_empty(&manager_list)) { - futex_up(&psthread_futex); - return; - } - list_remove(manager_list.next); - futex_up(&psthread_futex); -} - -/** Return thread id of the currently running thread. - * - * @return Pseudo thread ID of the currently running pseudo thread. - */ -pstid_t psthread_get_id(void) -{ - return (pstid_t) __tcb_get()->pst_data; -} - -/** Disable preemption - * - * If the thread wants to send several message in a row and does not want to be - * preempted, it should start async_serialize_start() in the beginning of - * communication and async_serialize_end() in the end. If it is a true - * multithreaded application, it should protect the communication channel by a - * futex as well. Interrupt messages can still be preempted. - */ -void psthread_inc_sercount(void) -{ - serialization_count++; -} - -/** Restore the preemption counter to the previous state. */ -void psthread_dec_sercount(void) -{ - serialization_count--; -} - -/** @} - */ - Index: uspace/lib/libc/generic/thread.c =================================================================== --- uspace/lib/libc/generic/thread.c (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/generic/thread.c (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -38,5 +38,5 @@ #include #include -#include +#include #include #include @@ -101,8 +101,8 @@ void __thread_main(uspace_arg_t *uarg) { - psthread_data_t *pt; - - pt = psthread_setup(); - __tcb_set(pt->tcb); + fibril_t *f; + + f = fibril_setup(); + __tcb_set(f->tcb); uarg->uspace_thread_function(uarg->uspace_thread_arg); @@ -113,5 +113,5 @@ /* If there is a manager, destroy it */ async_destroy_manager(); - psthread_teardown(pt); + fibril_teardown(f); thread_exit(0); Index: uspace/lib/libc/include/async.h =================================================================== --- uspace/lib/libc/include/async.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ uspace/lib/libc/include/async.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -37,5 +37,5 @@ #include -#include +#include #include #include @@ -46,5 +46,5 @@ static inline void async_manager(void) { - psthread_schedule_next_adv(PS_TO_MANAGER); + fibril_schedule_next_adv(FIBRIL_TO_MANAGER); } @@ -102,5 +102,5 @@ -pstid_t async_new_connection(ipcarg_t in_phone_hash,ipc_callid_t callid, +fid_t async_new_connection(ipcarg_t in_phone_hash,ipc_callid_t callid, ipc_call_t *call, void (*cthread)(ipc_callid_t,ipc_call_t *)); @@ -121,10 +121,10 @@ static inline void async_serialize_start(void) { - psthread_inc_sercount(); + fibril_inc_sercount(); } static inline void async_serialize_end(void) { - psthread_dec_sercount(); + fibril_dec_sercount(); } Index: uspace/lib/libc/include/fibril.h =================================================================== --- uspace/lib/libc/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) +++ uspace/lib/libc/include/fibril.h (revision bc1f1c27820ae147ea90ebc58ae2f9a5e0b343ca) @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2006 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup libc + * @{ + */ +/** @file + */ + +#ifndef LIBC_FIBRIL_H_ +#define LIBC_FIBRIL_H_ + +#include +#include +#include + +#ifndef context_set +#define context_set(c, _pc, stack, size, ptls) \ + (c)->pc = (sysarg_t) (_pc); \ + (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \ + (c)->tls = (sysarg_t) (ptls); +#endif /* context_set */ + +#define FIBRIL_SERIALIZED 1 + +typedef enum { + FIBRIL_SLEEP, + FIBRIL_PREEMPT, + FIBRIL_TO_MANAGER, + FIBRIL_FROM_MANAGER, + FIBRIL_FROM_DEAD +} fibril_switch_type_t; + +typedef sysarg_t fid_t; + +struct fibril { + link_t link; + context_t ctx; + void *stack; + void *arg; + int (*func)(void *); + tcb_t *tcb; + + struct fibril *clean_after_me; + struct fibril *joiner; + int joinee_retval; + int retval; + int flags; +}; +typedef struct fibril fibril_t; + +extern int context_save(context_t *c); +extern void context_restore(context_t *c) __attribute__ ((noreturn)); + +extern fid_t fibril_create(int (*func)(void *), void *arg); +extern int fibril_join(fid_t fid); +extern fibril_t *fibril_setup(void); +extern void fibril_teardown(fibril_t *f); +extern int fibril_schedule_next_adv(fibril_switch_type_t stype); +extern void fibril_add_ready(fid_t fid); +extern void fibril_add_manager(fid_t fid); +extern void fibril_remove_manager(void); +extern fid_t fibril_get_id(void); +extern void fibril_inc_sercount(void); +extern void fibril_dec_sercount(void); + +static inline int fibril_schedule_next(void) { + return fibril_schedule_next_adv(FIBRIL_PREEMPT); +} + +#endif + +/** @} + */ Index: uspace/lib/libc/include/psthread.h =================================================================== --- uspace/lib/libc/include/psthread.h (revision b9641eeb737a9022842c9dc2556368e72417519c) +++ (revision ) @@ -1,99 +1,0 @@ -/* - * Copyright (c) 2006 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup libc - * @{ - */ -/** @file - */ - -#ifndef LIBC_PSTHREAD_H_ -#define LIBC_PSTHREAD_H_ - -#include -#include -#include - -#ifndef context_set -#define context_set(c, _pc, stack, size, ptls) \ - (c)->pc = (sysarg_t) (_pc); \ - (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA; \ - (c)->tls = (sysarg_t) (ptls); -#endif /* context_set */ - -#define PSTHREAD_SERIALIZED 1 - -typedef enum { - PS_SLEEP, - PS_PREEMPT, - PS_TO_MANAGER, - PS_FROM_MANAGER, - PS_FROM_DEAD -} pschange_type; - -typedef sysarg_t pstid_t; - -struct psthread_data { - link_t link; - context_t ctx; - void *stack; - void *arg; - int (*func)(void *); - tcb_t *tcb; - - struct psthread_data *clean_after_me; - struct psthread_data *joiner; - int joinee_retval; - int retval; - int flags; -}; -typedef struct psthread_data psthread_data_t; - -extern int context_save(context_t *c); -extern void context_restore(context_t *c) __attribute__ ((noreturn)); - -pstid_t psthread_create(int (*func)(void *), void *arg); -int psthread_join(pstid_t psthrid); -psthread_data_t * psthread_setup(void); -void psthread_teardown(psthread_data_t *pt); -int psthread_schedule_next_adv(pschange_type ctype); -void psthread_add_ready(pstid_t ptid); -void psthread_add_manager(pstid_t psthrid); -void psthread_remove_manager(void); -pstid_t psthread_get_id(void); -void psthread_inc_sercount(void); -void psthread_dec_sercount(void); - -static inline int psthread_schedule_next(void) { - return psthread_schedule_next_adv(PS_PREEMPT); -} - -#endif - -/** @} - */