Index: kernel/arch/mips32/src/start.S
===================================================================
--- kernel/arch/mips32/src/start.S	(revision b8230b99f42baed609487cfaa5737fbb11968cc0)
+++ kernel/arch/mips32/src/start.S	(revision ba7371f9d732a62dea4383ffb0e509bccd9f4e4a)
@@ -47,9 +47,9 @@
 # Which status bits should are thread-local
 #define REG_SAVE_MASK 0x1f # KSU(UM), EXL, ERL, IE
-	
+
 # Save registers to space defined by \r
-# We will change status: Disable ERL,EXL,UM,IE
+# We will change status: Disable ERL, EXL, UM, IE
 # These changes will be automatically reversed in REGISTER_LOAD
-# SP is NOT saved as part of these registers
+# %sp is NOT saved as part of these registers
 .macro REGISTERS_STORE_AND_EXC_RESET r
 	sw $at, EOFFSET_AT(\r)
@@ -70,5 +70,5 @@
 	sw $t8, EOFFSET_T8(\r)
 	sw $t9, EOFFSET_T9(\r)
-
+	
 	mflo $at
 	sw $at, EOFFSET_LO(\r)
@@ -79,27 +79,32 @@
 	sw $ra, EOFFSET_RA(\r)
 	sw $k1, EOFFSET_K1(\r)
-
+	
 	mfc0 $t0, $status
 	mfc0 $t1, $epc
 	
-	and $t2, $t0, REG_SAVE_MASK	# Save only KSU,EXL,ERL,IE
-	li $t3, ~(0x1f)
-	and $t0, $t0, $t3		# Clear KSU,EXL,ERL,IE
-	
-	sw $t2,EOFFSET_STATUS(\r)
-	sw $t1,EOFFSET_EPC(\r)
+	# save only KSU, EXL, ERL, IE
+	and $t2, $t0, REG_SAVE_MASK
+	
+	# clear KSU, EXL, ERL, IE
+	li $t3, ~(REG_SAVE_MASK)
+	and $t0, $t0, $t3
+	
+	sw $t2, EOFFSET_STATUS(\r)
+	sw $t1, EOFFSET_EPC(\r)
 	mtc0 $t0, $status
 .endm
 
 .macro REGISTERS_LOAD r
-	# Update only UM,EXR,IE from status, the rest
+	# Update only UM, EXR, IE from status, the rest
 	# is controlled by OS and not bound to task
 	mfc0 $t0, $status
 	lw $t1,EOFFSET_STATUS(\r)
-
-	li $t2, ~REG_SAVE_MASK		# Mask UM,EXL,ERL,IE
+	
+	# Mask UM, EXL, ERL, IE
+	li $t2, ~REG_SAVE_MASK
 	and $t0, $t0, $t2
 	
-	or $t0, $t0, $t1		# Copy UM,EXL, ERL, IE from saved status
+	# Copy UM, EXL, ERL, IE from saved status
+	or $t0, $t0, $t1
 	mtc0 $t0, $status
 	
@@ -129,5 +134,5 @@
 	lw $at, EOFFSET_HI(\r)
 	mthi $at
-
+	
 	lw $at, EOFFSET_EPC(\r)
 	mtc0 $at, $epc
@@ -138,8 +143,7 @@
 
 # Move kernel stack pointer address to register K0
-# - if we are in user mode, load the appropriate stack
-# address
+# - if we are in user mode, load the appropriate stack address
 .macro KERNEL_STACK_TO_K0
-	# If we are in user mode
+	# if we are in user mode
 	mfc0 $k0, $status
 	andi $k0, 0x10
@@ -148,24 +152,25 @@
 	add $k0, $sp, 0
 	
-	# Move $k0 pointer to kernel stack
+	# move $k0 pointer to kernel stack
 	lui $k0, %hi(supervisor_sp)
 	ori $k0, $k0, %lo(supervisor_sp)
-	# Move $k0 (superveisor_sp)
+	
+	# move $k0 (supervisor_sp)
 	lw $k0, 0($k0)
-1:
+	
+	1:
 .endm
 
 .org 0x0
 kernel_image_start:
-	/* Load temporary stack */
+	# load temporary stack
 	lui $sp, %hi(end_stack)
 	ori $sp, $sp, %lo(end_stack)
 	
-	/* Not sure about this, but might
-	   be needed for PIC code */
+	# Not sure about this, but might
+	# be needed for PIC code
 	lui $gp, 0x8000
 	
-	/* $a1 contains physical address of bootinfo_t */
-	
+	# $a1 contains physical address of bootinfo_t
 	jal arch_pre_main
 	nop
@@ -174,5 +179,5 @@
 	nop
 
-	.space TEMP_STACK_SIZE
+.space TEMP_STACK_SIZE
 end_stack:
 
@@ -191,4 +196,5 @@
 exception_handler:
 	KERNEL_STACK_TO_K0
+	
 	sub $k0, REGISTER_SPACE
 	sw $sp, EOFFSET_SP($k0)
@@ -209,5 +215,5 @@
 	jal exc_dispatch     # exc_dispatch(excno, register_space)
 	move $a0, $k0
-
+	
 	REGISTERS_LOAD $sp
 	# The $sp is automatically restored to former value
@@ -276,5 +282,5 @@
 	
 	eret
-		
+
 tlb_refill_handler:
 	KERNEL_STACK_TO_K0
