Changes in kernel/arch/ia32/include/atomic.h [c00589d:ba371e1] in mainline
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kernel/arch/ia32/include/atomic.h
rc00589d rba371e1 40 40 #include <preemption.h> 41 41 42 static inline void atomic_inc(atomic_t *val) { 42 static inline void atomic_inc(atomic_t *val) 43 { 43 44 #ifdef CONFIG_SMP 44 45 asm volatile ( … … 54 55 } 55 56 56 static inline void atomic_dec(atomic_t *val) { 57 static inline void atomic_dec(atomic_t *val) 58 { 57 59 #ifdef CONFIG_SMP 58 60 asm volatile ( … … 68 70 } 69 71 70 static inline long atomic_postinc(atomic_t *val)72 static inline atomic_count_t atomic_postinc(atomic_t *val) 71 73 { 72 longr = 1;74 atomic_count_t r = 1; 73 75 74 76 asm volatile ( 75 77 "lock xaddl %[r], %[count]\n" 76 : [count] "+m" (val->count), [r] "+r" (r) 78 : [count] "+m" (val->count), 79 [r] "+r" (r) 77 80 ); 78 81 … … 80 83 } 81 84 82 static inline long atomic_postdec(atomic_t *val)85 static inline atomic_count_t atomic_postdec(atomic_t *val) 83 86 { 84 longr = -1;87 atomic_count_t r = -1; 85 88 86 89 asm volatile ( 87 90 "lock xaddl %[r], %[count]\n" 88 : [count] "+m" (val->count), [r] "+r"(r) 91 : [count] "+m" (val->count), 92 [r] "+r" (r) 89 93 ); 90 94 … … 95 99 #define atomic_predec(val) (atomic_postdec(val) - 1) 96 100 97 static inline uint32_t test_and_set(atomic_t *val) { 98 uint32_t v; 101 static inline atomic_count_t test_and_set(atomic_t *val) 102 { 103 atomic_count_t v = 1; 99 104 100 105 asm volatile ( 101 "movl $1, %[v]\n"102 106 "xchgl %[v], %[count]\n" 103 : [v] "=r" (v), [count] "+m" (val->count) 107 : [v] "+r" (v), 108 [count] "+m" (val->count) 104 109 ); 105 110 … … 110 115 static inline void atomic_lock_arch(atomic_t *val) 111 116 { 112 uint32_t tmp;117 atomic_count_t tmp; 113 118 114 119 preemption_disable(); … … 124 129 "testl %[tmp], %[tmp]\n" 125 130 "jnz 0b\n" 126 : [count] "+m" (val->count), [tmp] "=&r" (tmp) 131 : [count] "+m" (val->count), 132 [tmp] "=&r" (tmp) 127 133 ); 134 128 135 /* 129 136 * Prevent critical section code from bleeding out this way up.
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