Index: boot/arch/ppc32/src/main.c =================================================================== --- boot/arch/ppc32/src/main.c (revision f09d8913c3e72e8d0af5db6b07bfcac904efeb5f) +++ boot/arch/ppc32/src/main.c (revision b97b348a7bdc9e9697abe5dcd02f197f8ff5053f) @@ -167,5 +167,4 @@ printf("Booting the kernel...\n"); - ofw_quiesce(); jump_to_kernel(bootinfo_pa, transtable_pa, pages, real_mode_pa); } Index: boot/arch/sparc64/include/asm.h =================================================================== --- boot/arch/sparc64/include/asm.h (revision f09d8913c3e72e8d0af5db6b07bfcac904efeb5f) +++ boot/arch/sparc64/include/asm.h (revision b97b348a7bdc9e9697abe5dcd02f197f8ff5053f) @@ -33,6 +33,6 @@ #include -extern void jump_to_kernel(void *entry, bootinfo_t *bootinfo, - uintptr_t physmem_start, uint8_t subarch) __attribute__((noreturn)); +extern void jump_to_kernel(uintptr_t physmem_start, bootinfo_t *bootinfo, + uint8_t subarch, void *entry) __attribute__((noreturn)); #endif Index: boot/arch/sparc64/src/asm.S =================================================================== --- boot/arch/sparc64/src/asm.S (revision f09d8913c3e72e8d0af5db6b07bfcac904efeb5f) +++ boot/arch/sparc64/src/asm.S (revision b97b348a7bdc9e9697abe5dcd02f197f8ff5053f) @@ -182,5 +182,5 @@ * (subarch). */ - cmp %i2, SUBARCH_US3 + cmp %o2, SUBARCH_US3 be %xcc, 1f nop @@ -199,9 +199,5 @@ ! Jump to kernel - mov %o0, %l1 - mov %o1, %o0 - mov %o3, %o1 - - jmp %l1 + jmp %o3 nop Index: boot/arch/sparc64/src/main.c =================================================================== --- boot/arch/sparc64/src/main.c (revision f09d8913c3e72e8d0af5db6b07bfcac904efeb5f) +++ boot/arch/sparc64/src/main.c (revision b97b348a7bdc9e9697abe5dcd02f197f8ff5053f) @@ -205,4 +205,5 @@ void *bootinfo_pa = ofw_translate(&bootinfo); + void *kernel_address_pa = ofw_translate((void *) KERNEL_ADDRESS); void *loader_address_pa = ofw_translate((void *) LOADER_ADDRESS); @@ -210,5 +211,5 @@ bootinfo.memmap.total >> 20, bootinfo.physmem_start); printf(" %p|%p: boot info structure\n", &bootinfo, bootinfo_pa); - printf(" %p|%p: kernel entry point\n", KERNEL_ADDRESS, KERNEL_ADDRESS); + printf(" %p|%p: kernel entry point\n", KERNEL_ADDRESS, kernel_address_pa); printf(" %p|%p: loader entry pount\n", LOADER_ADDRESS, loader_address_pa); @@ -304,6 +305,5 @@ printf("Booting the kernel ...\n"); - ofw_quiesce(); - jump_to_kernel((void *) KERNEL_ADDRESS, &bootinfo, subarch, - bootinfo.physmem_start | BSP_PROCESSOR); -} + jump_to_kernel(bootinfo.physmem_start | BSP_PROCESSOR, &bootinfo, subarch, + (void *) KERNEL_ADDRESS); +} Index: kernel/arch/sparc64/Makefile.inc =================================================================== --- kernel/arch/sparc64/Makefile.inc (revision f09d8913c3e72e8d0af5db6b07bfcac904efeb5f) +++ kernel/arch/sparc64/Makefile.inc (revision b97b348a7bdc9e9697abe5dcd02f197f8ff5053f) @@ -90,9 +90,4 @@ arch/$(KARCH)/src/trap/$(USARCH)/interrupt.c -ifeq ($(USARCH),sun4u) - ARCH_SOURCES += \ - arch/$(KARCH)/src/mm/cache.S -endif - ifeq ($(USARCH),sun4v) ARCH_SOURCES += \ Index: kernel/arch/sparc64/include/boot/boot.h =================================================================== --- kernel/arch/sparc64/include/boot/boot.h (revision f09d8913c3e72e8d0af5db6b07bfcac904efeb5f) +++ kernel/arch/sparc64/include/boot/boot.h (revision b97b348a7bdc9e9697abe5dcd02f197f8ff5053f) @@ -87,5 +87,4 @@ extern memmap_t memmap; -extern uintptr_t physmem_start; #endif Index: kernel/arch/sparc64/include/mm/cache_spec.h =================================================================== --- kernel/arch/sparc64/include/mm/cache_spec.h (revision f09d8913c3e72e8d0af5db6b07bfcac904efeb5f) +++ kernel/arch/sparc64/include/mm/cache_spec.h (revision b97b348a7bdc9e9697abe5dcd02f197f8ff5053f) @@ -27,5 +27,5 @@ */ -/** @addtogroup sparc64mm +/** @addtogroup sparc64mm * @{ */ @@ -39,17 +39,19 @@ * The following macros are valid for the following processors: * - * UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III, - * UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+ - * + * UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III, + * UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+ + * * Should we support other UltraSPARC processors, we need to make sure that * the macros are defined correctly for them. */ - + #if defined (US) -#define DCACHE_SIZE (16 * 1024) + #define DCACHE_SIZE (16 * 1024) #elif defined (US3) -#define DCACHE_SIZE (64 * 1024) + #define DCACHE_SIZE (64 * 1024) #endif -#define DCACHE_LINE_SIZE 32 + +#define DCACHE_LINE_SIZE 32 +#define DCACHE_TAG_SHIFT 2 #endif Index: rnel/arch/sparc64/src/mm/cache.S =================================================================== --- kernel/arch/sparc64/src/mm/cache.S (revision f09d8913c3e72e8d0af5db6b07bfcac904efeb5f) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include - -#define DCACHE_TAG_SHIFT 2 - -.register %g2, #scratch -.register %g3, #scratch - -/** Flush the whole D-cache. */ -.global dcache_flush -dcache_flush: - set (DCACHE_SIZE - DCACHE_LINE_SIZE), %g1 - stxa %g0, [%g1] ASI_DCACHE_TAG -0: membar #Sync - subcc %g1, DCACHE_LINE_SIZE, %g1 - bnz,pt %xcc, 0b - stxa %g0, [%g1] ASI_DCACHE_TAG - membar #Sync - retl - ! beware SF Erratum #51, do not put the MEMBAR here - nop Index: kernel/arch/sparc64/src/smp/sun4v/smp.c =================================================================== --- kernel/arch/sparc64/src/smp/sun4v/smp.c (revision f09d8913c3e72e8d0af5db6b07bfcac904efeb5f) +++ kernel/arch/sparc64/src/smp/sun4v/smp.c (revision b97b348a7bdc9e9697abe5dcd02f197f8ff5053f) @@ -433,5 +433,5 @@ if (__hypercall_fast4(CPU_START, cpuid, (uint64_t) KA2PA(kernel_image_start), KA2PA(trap_table), - physmem_start) != EOK) + physmem_base) != EOK) return false; #endif Index: kernel/arch/sparc64/src/sun4u/start.S =================================================================== --- kernel/arch/sparc64/src/sun4u/start.S (revision f09d8913c3e72e8d0af5db6b07bfcac904efeb5f) +++ kernel/arch/sparc64/src/sun4u/start.S (revision b97b348a7bdc9e9697abe5dcd02f197f8ff5053f) @@ -36,4 +36,5 @@ #include #include +#include #ifdef CONFIG_SMP @@ -62,9 +63,10 @@ * * The registers are expected to be in this state: - * - %o0 bootinfo structure address (BSP only) - * - %o1 starting address of physical memory + * - %o0 starting address of physical memory * + bootstrap processor flag * bits 63...1: physical memory starting address / 2 * bit 0: non-zero on BSP processor, zero on AP processors + * - %o1 bootinfo structure address (BSP only) + * * * Moreover, we depend on boot having established the following environment: @@ -77,6 +79,6 @@ kernel_image_start: mov BSP_FLAG, %l0 - and %o1, %l0, %l7 ! l7 <= bootstrap processor? - andn %o1, %l0, %l6 ! l6 <= start of physical memory + and %o0, %l0, %l7 ! l7 <= bootstrap processor? + andn %o0, %l0, %l6 ! l6 <= start of physical memory ! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base. @@ -268,11 +270,17 @@ or %l3, %l5, %l3 stx %l3, [%l4 + %lo(kernel_8k_tlb_data_template)] - - /* - * Flush D-Cache. - */ - call dcache_flush - nop - + + ! flush the whole D-cache + set (DCACHE_SIZE - DCACHE_LINE_SIZE), %g1 + stxa %g0, [%g1] ASI_DCACHE_TAG + +0: + membar #Sync + subcc %g1, DCACHE_LINE_SIZE, %g1 + bnz,pt %xcc, 0b + + stxa %g0, [%g1] ASI_DCACHE_TAG + membar #Sync + /* * So far, we have not touched the stack. @@ -282,5 +290,9 @@ or %sp, %lo(temporary_boot_stack), %sp sub %sp, STACK_BIAS, %sp - + + /* + * Call arch_pre_main(bootinfo) + */ + mov %o1, %o0 call arch_pre_main nop Index: kernel/arch/sparc64/src/sun4v/start.S =================================================================== --- kernel/arch/sparc64/src/sun4v/start.S (revision f09d8913c3e72e8d0af5db6b07bfcac904efeb5f) +++ kernel/arch/sparc64/src/sun4v/start.S (revision b97b348a7bdc9e9697abe5dcd02f197f8ff5053f) @@ -93,9 +93,10 @@ * * The registers are expected to be in this state: - * - %o0 bootinfo structure address (BSP only) - * - %o1 starting address of physical memory + * - %o0 starting address of physical memory * + bootstrap processor flag * bits 63...1: physical memory starting address / 2 * bit 0: non-zero on BSP processor, zero on AP processors + * - %o1 bootinfo structure address (BSP only) + * * * Moreover, we depend on boot having established the following environment: @@ -107,7 +108,7 @@ kernel_image_start: mov BSP_FLAG, %l0 - and %o1, %l0, %l7 ! l7 <= bootstrap processor? - andn %o1, %l0, %l6 ! l6 <= start of physical memory - or %o0, %g0, %l0 + and %o0, %l0, %l7 ! l7 <= bootstrap processor? + andn %o0, %l0, %l6 ! l6 <= start of physical memory + or %o1, %g0, %l1 ! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base. @@ -246,5 +247,8 @@ sub %sp, STACK_BIAS, %sp - or %l0, %g0, %o0 + /* + * Call arch_pre_main(bootinfo) + */ + or %l1, %g0, %o0 call arch_pre_main nop