Index: defaults/sparc32/leon3/Makefile.config =================================================================== --- defaults/sparc32/leon3/Makefile.config (revision b6b02c0fa1670aace09bf1d3f51ce99017e6230e) +++ defaults/sparc32/leon3/Makefile.config (revision b77207e40dc19a5b63dc5dd1e7482bf092792c74) @@ -7,2 +7,5 @@ # Barebone build with essential binaries only CONFIG_BAREBONE = y + +# GRLIB APBUART +CONFIG_GRLIB_UART = y Index: kernel/genarch/Makefile.inc =================================================================== --- kernel/genarch/Makefile.inc (revision b6b02c0fa1670aace09bf1d3f51ce99017e6230e) +++ kernel/genarch/Makefile.inc (revision b77207e40dc19a5b63dc5dd1e7482bf092792c74) @@ -110,4 +110,9 @@ endif +ifeq ($(CONFIG_GRLIB_UART),y) + GENARCH_SOURCES += \ + genarch/src/drivers/omap/uart.c +endif + ifeq ($(CONFIG_AM335X_TIMERS),y) GENARCH_SOURCES += \ Index: kernel/genarch/include/genarch/drivers/grlib_uart/grlib_uart.h =================================================================== --- kernel/genarch/include/genarch/drivers/grlib_uart/grlib_uart.h (revision b77207e40dc19a5b63dc5dd1e7482bf092792c74) +++ kernel/genarch/include/genarch/drivers/grlib_uart/grlib_uart.h (revision b77207e40dc19a5b63dc5dd1e7482bf092792c74) @@ -0,0 +1,106 @@ +/* + * Copyright (c) 2010 Jiri Svoboda + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Gaisler GRLIB UART IP-Core driver. + */ + +#ifndef KERN_GRLIB_UART_H_ +#define KERN_GRLIB_UART_H_ + +#include +#include +#include +#include + +/** GRLIB UART registers */ +typedef struct { + uint32_t data; + grlib_uart_status_t status; + grlib_uart_control_t control; + uint32_t scaler; + uint32_t debug; +} grlib_uart_io_t; + +typedef struct { + unsigned int rcnt: 6; + unsigned int tcnt: 6; + unsigned int : 9; + unsigned int rf: 1; + unsigned int tf: 1; + unsigned int rh: 1; + unsigned int th: 1; + unsigned int fe: 1; + unsigned int pe: 1; + unsigned int ov: 1; + unsigned int br: 1; + unsigned int te: 1; + unsigned int ts: 1; + unsigned int dr: 1; +} grlib_uart_status_t; + +typedef struct { + unsigned int fa: 1; + unsigned int : 16; + unsigned int si: 1; + unsigned int di: 1; + unsigned int bi: 1; + unsigned int db: 1; + unsigned int rf: 1; + unsigned int tf: 1; + unsigned int ec: 1; + unsigned int lb: 1; + unsigned int fl: 1; + unsigned int pe: 1; + unsigned int ps: 1; + unsigned int ti: 1; + unsigned int ri: 1; + unsigned int te: 1; + unsigned int re: 1; +}; + +typedef struct { + grlib_uart_io_t *io; + indev_t *indev; + irq_t irq; + parea_t parea; +} grlib_uart_t; + +extern outdev_t *grlib_uart_init(uintptr_t, inr_t inr); +extern void grlib_uart_input_wire(grlib_uart_t *, + indev_t *); + +#endif + +/** @} + */ Index: kernel/genarch/src/drivers/grlib_uart/grlib_uart.c =================================================================== --- kernel/genarch/src/drivers/grlib_uart/grlib_uart.c (revision b77207e40dc19a5b63dc5dd1e7482bf092792c74) +++ kernel/genarch/src/drivers/grlib_uart/grlib_uart.c (revision b77207e40dc19a5b63dc5dd1e7482bf092792c74) @@ -0,0 +1,159 @@ +/* + * Copyright (c) 2009 Martin Decky + * Copyright (c) 2010 Jiri Svoboda + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Gaisler GRLIB UART IP-Core driver. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void grlib_uart_sendb(outdev_t *dev, uint8_t byte) +{ + grlib_uart_status_t *status; + grlib_uart_t *uart = + (grlib_uart_t *) dev->data; + + /* Wait for space becoming available in Tx FIFO. */ + do { + status = pio_read_32(&uart->io->status); + } while (status->tf != 0); + + pio_write_32(&uart->io->data, byte); +} + +static void grlib_uart_putchar(outdev_t *dev, wchar_t ch) +{ + grlib_uart_t *uart = + (grlib_uart_t *) dev->data; + + if ((!uart->parea.mapped) || (console_override)) { + if (!ascii_check(ch)) { + grlib_uart_sendb(dev, U_SPECIAL); + } else { + if (ch == '\n') + grlib_uart_sendb(dev, (uint8_t) '\r'); + grlib_uart_sendb(dev, (uint8_t) ch); + } + } +} + +static irq_ownership_t grlib_uart_claim(irq_t *irq) +{ + return IRQ_ACCEPT; +} + +static void grlib_uart_irq_handler(irq_t *irq) +{ + grlib_uart_t *uart = irq->instance; + grlib_status_t status; + + status = (grlib_status_t)pio_read_32(&uart->io->status); + + while (status->dr != 0) { + uint32_t data = pio_read_32(&uart->io->data); + status = (grlib_status_t)pio_read_32(&uart->io->status); + indev_push_character(uart->indev, data & 0xff); + } +} + +static outdev_operations_t grlib_uart_ops = { + .write = grlib_uart_putchar, + .redraw = NULL +}; + +outdev_t *grlib_uart_init(uintptr_t paddr, inr_t inr) +{ + outdev_t *uart_dev = malloc(sizeof(outdev_t), FRAME_ATOMIC); + if (!uart_dev) + return NULL; + + grlib_uart_t *uart = + malloc(sizeof(grlib_uart_t), FRAME_ATOMIC); + if (!uart) { + free(uart_dev); + return NULL; + } + + outdev_initialize("grlib_uart_dev", uart_dev, &grlib_uart_ops); + uart_dev->data = uart; + + uart->io = (grlib_uart_io_t *) km_map(paddr, PAGE_SIZE, + PAGE_WRITE | PAGE_NOT_CACHEABLE); + uart->indev = NULL; + + /* Initialize IRQ structure. */ + irq_initialize(&uart->irq); + uart->irq.devno = device_assign_devno(); + uart->irq.inr = inr; + uart->irq.claim = grlib_uart_claim; + uart->irq.handler = grlib_uart_irq_handler; + uart->irq.instance = uart; + + /* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */ + grlib_control_t control = + { .fa = 1, .rf = 1, .tf = 1, .ri = 1, + .te = 1, .re = 1}; + + pio_write_32(&uart->io->control, control); + + link_initialize(&uart->parea.link); + uart->parea.pbase = paddr; + uart->parea.frames = 1; + uart->parea.unpriv = false; + uart->parea.mapped = false; + ddi_parea_register(&uart->parea); + + return uart_dev; +} + +void grlib_uart_input_wire(grlib_uart_t *uart, indev_t *indev) +{ + ASSERT(uart); + ASSERT(indev); + + uart->indev = indev; + irq_register(&uart->irq); +} + +/** @} + */