Index: arch/amd64/include/barrier.h
===================================================================
--- arch/amd64/include/barrier.h	(revision 229d5fc19f8017e3ffae67e31565100b6e986570)
+++ arch/amd64/include/barrier.h	(revision b52da8d7b8d152a08bbcc4e21a25383ba0367730)
@@ -33,3 +33,7 @@
 #define CS_LEAVE_BARRIER()	__asm__ volatile ("" ::: "memory")
 
+#define memory_barrier()
+#define read_barrier()
+#define write_barrier()
+
 #endif
Index: arch/ia32/include/asm.h
===================================================================
--- arch/ia32/include/asm.h	(revision 229d5fc19f8017e3ffae67e31565100b6e986570)
+++ arch/ia32/include/asm.h	(revision b52da8d7b8d152a08bbcc4e21a25383ba0367730)
@@ -32,5 +32,5 @@
 #include <arch/types.h>
 #include <typedefs.h>
-#include <mm/page.h>
+#include <config.h>
 #include <synch/spinlock.h>
 #include <arch/boot/memmap.h>
Index: arch/ia32/include/barrier.h
===================================================================
--- arch/ia32/include/barrier.h	(revision 229d5fc19f8017e3ffae67e31565100b6e986570)
+++ arch/ia32/include/barrier.h	(revision b52da8d7b8d152a08bbcc4e21a25383ba0367730)
@@ -44,3 +44,7 @@
 #define CS_LEAVE_BARRIER()	__asm__ volatile ("" ::: "memory")
 
+#define memory_barrier()	__asm__ volatile ("mfence\n" ::: "memory")
+#define read_barrier()		__asm__ volatile ("sfence\n" ::: "memory")
+#define write_barrier()		__asm__ volatile ("lfence\n" ::: "memory")
+
 #endif
Index: arch/ia32/src/boot/boot.S
===================================================================
--- arch/ia32/src/boot/boot.S	(revision 229d5fc19f8017e3ffae67e31565100b6e986570)
+++ arch/ia32/src/boot/boot.S	(revision b52da8d7b8d152a08bbcc4e21a25383ba0367730)
@@ -48,8 +48,10 @@
 	call memmap_arch_init
 	
-	lgdt gdtr
+	lgdt gdtr			# initialize Global Descriptor Table register
+	lidt idtr			# initialize Interrupt Descriptor Table register
+	
 	movl %cr0,%eax
 	orl $0x1,%eax
-	movl %eax,%cr0
+	movl %eax,%cr0			# switch to protected mode
 	jmpl $8,$meeting_point
 meeting_point:
@@ -63,7 +65,5 @@
 	movw %ax,%ss
 
-	lidt idtr
-
-	call map_kernel
+	call map_kernel			# map kernel and turn paging on
 
 	movl $_hardcoded_ktext_size, hardcoded_ktext_size
@@ -95,5 +95,5 @@
 	movl %eax, %cr3
 	
-	# turn on paging
+	# turn paging on
 	movl %cr0, %ebx
 	orl $(1<<31), %ebx
Index: arch/ia32/src/mm/frame.c
===================================================================
--- arch/ia32/src/mm/frame.c	(revision 229d5fc19f8017e3ffae67e31565100b6e986570)
+++ arch/ia32/src/mm/frame.c	(revision b52da8d7b8d152a08bbcc4e21a25383ba0367730)
@@ -35,7 +35,4 @@
 #include <print.h>
 
-/*
- * TODO: use the memory map obtained from BIOS
- */
 void frame_arch_init(void)
 {
Index: arch/ia32/src/smp/ap.S
===================================================================
--- arch/ia32/src/smp/ap.S	(revision 229d5fc19f8017e3ffae67e31565100b6e986570)
+++ arch/ia32/src/smp/ap.S	(revision b52da8d7b8d152a08bbcc4e21a25383ba0367730)
@@ -51,8 +51,10 @@
 	movw %ax,%ds
 
-	lgdt gdtr
+	lgdt gdtr			# initialize Global Descriptor Table register
+	lidt idtr			# initialize Interrupt Descriptor Table register
+	
 	movl %cr0,%eax
 	orl $1,%eax
-	movl %eax,%cr0
+	movl %eax,%cr0			# switch to protected mode
 	jmpl $KTEXT,$jump_to_kernel
 jump_to_kernel:
@@ -66,7 +68,5 @@
 	subl $0x80000000,%esp		# KA2PA(ctx.sp)
 
-	lidt idtr
-
-	call map_kernel
+	call map_kernel			# map kernel and turn paging on
 
 	jmpl $KTEXT,$main_ap
Index: arch/ia64/include/barrier.h
===================================================================
--- arch/ia64/include/barrier.h	(revision 229d5fc19f8017e3ffae67e31565100b6e986570)
+++ arch/ia64/include/barrier.h	(revision b52da8d7b8d152a08bbcc4e21a25383ba0367730)
@@ -36,3 +36,7 @@
 #define CS_LEAVE_BARRIER()	__asm__ volatile ("" ::: "memory")
 
+#define memory_barrier()
+#define read_barrier()
+#define write_barrier()
+
 #endif
Index: arch/mips/include/barrier.h
===================================================================
--- arch/mips/include/barrier.h	(revision 229d5fc19f8017e3ffae67e31565100b6e986570)
+++ arch/mips/include/barrier.h	(revision b52da8d7b8d152a08bbcc4e21a25383ba0367730)
@@ -36,3 +36,7 @@
 #define CS_LEAVE_BARRIER()	__asm__ volatile ("" ::: "memory")
 
+#define memory_barrier()
+#define read_barrier()
+#define write_barrier()
+
 #endif
Index: arch/mips/include/cpu.h
===================================================================
--- arch/mips/include/cpu.h	(revision 229d5fc19f8017e3ffae67e31565100b6e986570)
+++ arch/mips/include/cpu.h	(revision b52da8d7b8d152a08bbcc4e21a25383ba0367730)
@@ -30,6 +30,4 @@
 #define __mips_CPU_H__
 
-#include <typedefs.h>
-
 #define CPU_ID_ARCH	0
 
Index: arch/mips/include/mm/page.h
===================================================================
--- arch/mips/include/mm/page.h	(revision 229d5fc19f8017e3ffae67e31565100b6e986570)
+++ arch/mips/include/mm/page.h	(revision b52da8d7b8d152a08bbcc4e21a25383ba0367730)
@@ -34,5 +34,4 @@
 #include <arch/mm/frame.h>
 #include <arch/types.h>
-#include <arch.h>
 
 #define PAGE_SIZE	FRAME_SIZE
Index: arch/ppc/include/barrier.h
===================================================================
--- arch/ppc/include/barrier.h	(revision 229d5fc19f8017e3ffae67e31565100b6e986570)
+++ arch/ppc/include/barrier.h	(revision b52da8d7b8d152a08bbcc4e21a25383ba0367730)
@@ -33,3 +33,7 @@
 #define CS_LEAVE_BARRIER()	__asm__ volatile ("" ::: "memory")
 
+#define memory_barrier()
+#define read_barrier()
+#define write_barrier()
+
 #endif