Index: kernel/arch/sparc32/Makefile.inc =================================================================== --- kernel/arch/sparc32/Makefile.inc (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/Makefile.inc (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,71 @@ +# +# Copyright (c) 2010 Martin Decky +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +BFD = binary + +ifeq ($(COMPILER),gcc_cross) + ifeq ($(CROSS_TARGET),arm32) + ATSIGN = % + endif + + ifeq ($(CROSS_TARGET),mips32) + GCC_CFLAGS += -mno-abicalls + endif +endif + +BITS = 32 +ENDIANESS = BE + +ARCH_SOURCES = \ + arch/$(KARCH)/src/start.S \ + arch/$(KARCH)/src/trap_table.S \ + arch/$(KARCH)/src/regwin_test.S \ + arch/$(KARCH)/src/context.S \ + arch/$(KARCH)/src/debug/stacktrace.c \ + arch/$(KARCH)/src/debug/stacktrace_asm.S \ + arch/$(KARCH)/src/proc/scheduler.c \ + arch/$(KARCH)/src/proc/task.c \ + arch/$(KARCH)/src/proc/thread.c \ + arch/$(KARCH)/src/sparc32.c \ + arch/$(KARCH)/src/machine_func.c \ + arch/$(KARCH)/src/userspace.c \ + arch/$(KARCH)/src/exception.c \ + arch/$(KARCH)/src/cpu/cpu.c \ + arch/$(KARCH)/src/ddi/ddi.c \ + arch/$(KARCH)/src/smp/smp.c \ + arch/$(KARCH)/src/smp/ipi.c \ + arch/$(KARCH)/src/mm/km.c \ + arch/$(KARCH)/src/mm/as.c \ + arch/$(KARCH)/src/mm/frame.c \ + arch/$(KARCH)/src/mm/page.c \ + arch/$(KARCH)/src/mm/tlb.c \ + +ifeq ($(MACHINE),leon3) + ARCH_SOURCES += arch/$(KARCH)/src/machine/leon3/leon3.c +endif + Index: kernel/arch/sparc32/_link.ld.in =================================================================== --- kernel/arch/sparc32/_link.ld.in (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/_link.ld.in (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,45 @@ +#define KERNEL_LOAD_ADDRESS 0x80a00000 + +ENTRY(kernel_image_start) + +SECTIONS { + . = KERNEL_LOAD_ADDRESS; + .text : { + ktext_start = .; + *(.text); + ktext_end = .; + } + .data : { + kdata_start = .; + *(.data); /* initialized data */ + . = ALIGN(8); + hardcoded_ktext_size = .; + LONG(ktext_end - ktext_start); + hardcoded_kdata_size = .; + LONG(kdata_end - kdata_start); + hardcoded_load_address = .; + LONG(KERNEL_LOAD_ADDRESS); + *(.bss); /* uninitialized static variables */ + *(COMMON); /* global variables */ + + *(.rodata*); + *(.sdata); + *(.reginfo); + . = ALIGN(8); + symbol_table = .; + *(symtab.*); + } + .sbss : { + *(.sbss); + *(.scommon); + } + + kdata_end = .; + + /DISCARD/ : { + *(.mdebug*); + *(.pdr); + *(.comment); + *(.note); + } +} Index: kernel/arch/sparc32/include/arch/ambapp.h =================================================================== --- kernel/arch/sparc32/include/arch/ambapp.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/ambapp.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_AMBAPP_H_ +#define KERN_sparc32_AMBAPP_H_ + +typedef struct +{ + /* Primary serial port location */ + uintptr_t uart_base; + size_t uart_size; + int uart_irq; + /* Timers location */ + uintptr_t timer_base; + size_t timer_size; + int timer_irq; +} ambapp_info_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/arch.h =================================================================== --- kernel/arch/sparc32/include/arch/arch.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/arch.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2010 Martin Decky + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_ARCH_H_ +#define KERN_sparc32_ARCH_H_ + +#ifndef __ASM__ + +#include +#include + +#define NWINDOWS 8 + +/* ASI assignments: */ +#define ASI_CACHEMISS 0x01 +#define ASI_CACHECTRL 0x02 +#define ASI_MMUCACHE 0x10 +#define ASI_MMUREGS 0x19 +#define ASI_MMUBYPASS 0x1c +#define ASI_MMUFLUSH 0x18 + +#define TASKMAP_MAX_RECORDS 32 +#define CPUMAP_MAX_RECORDS 32 + +#define BOOTINFO_TASK_NAME_BUFLEN 32 + +typedef struct { + void *addr; + size_t size; + char name[BOOTINFO_TASK_NAME_BUFLEN]; +} utask_t; + +typedef struct { + size_t cnt; + utask_t tasks[TASKMAP_MAX_RECORDS]; + /* Fields below are LEON-specific */ + uintptr_t uart_base; + uintptr_t intc_base; + uintptr_t timer_base; + int uart_irq; + int timer_irq; + uint32_t memsize; +} bootinfo_t; + +extern void arch_pre_main(void *unused, bootinfo_t *bootinfo); +extern void write_to_invalid(uint32_t l0, uint32_t l1, uint32_t l2); +extern void read_from_invalid(uint32_t *l0, uint32_t *l1, uint32_t *l2); +extern void preemptible_save_uspace(uintptr_t sp, istate_t *istate); +extern void preemptible_restore_uspace(uintptr_t sp, istate_t *istate); +extern void flush_windows(void); + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/asm.h =================================================================== --- kernel/arch/sparc32/include/arch/asm.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/asm.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,264 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_ASM_H_ +#define KERN_sparc32_ASM_H_ + +#include +#include +#include +#include + +NO_TRACE static inline void asm_delay_loop(uint32_t usec) +{ +} + +NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void) +{ + /* On real hardware this should stop processing further + instructions on the CPU (and possibly putting it into + low-power mode) without any possibility of exitting + this function. */ + + while (true); +} + +NO_TRACE static inline void cpu_sleep(void) +{ + /* On real hardware this should put the CPU into low-power + mode. However, the CPU is free to continue processing + futher instructions any time. The CPU also wakes up + upon an interrupt. */ +} + +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val) +{ + *port = val; +} + +/** Word to port + * + * Output word to port + * + * @param port Port to write to + * @param val Value to write + * + */ +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val) +{ + *port = val; +} + +/** Double word to port + * + * Output double word to port + * + * @param port Port to write to + * @param val Value to write + * + */ +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val) +{ + *port = val; +} + +/** Byte from port + * + * Get byte from port + * + * @param port Port to read from + * @return Value read + * + */ +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + return *port; +} + +/** Word from port + * + * Get word from port + * + * @param port Port to read from + * @return Value read + * + */ +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + return *port; +} + +/** Double word from port + * + * Get double word from port + * + * @param port Port to read from + * @return Value read + * + */ +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + return *port; +} + +NO_TRACE static inline uint32_t psr_read() +{ + uint32_t v; + + asm volatile ( + "mov %%psr, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +NO_TRACE static inline uint32_t wim_read() +{ + uint32_t v; + + asm volatile ( + "mov %%wim, %[v]\n" + : [v] "=r" (v) + ); + + return v; +} + +NO_TRACE static inline uint32_t asi_u32_read(int asi, uintptr_t va) +{ + uint32_t v; + + asm volatile ( + "lda [%[va]] %[asi], %[v]\n" + : [v] "=r" (v) + : [va] "r" (va), + [asi] "i" ((unsigned int) asi) + ); + + return v; +} + +NO_TRACE static inline void asi_u32_write(int asi, uintptr_t va, uint32_t v) +{ + asm volatile ( + "sta %[v], [%[va]] %[asi]\n" + :: [v] "r" (v), + [va] "r" (va), + [asi] "i" ((unsigned int) asi) + : "memory" + ); +} + +NO_TRACE static inline void psr_write(uint32_t psr) +{ + asm volatile ( + "mov %[v], %%psr\n" + :: [v] "r" (psr) + ); +} + +NO_TRACE static inline void wim_write(uint32_t wim) +{ + asm volatile ( + "mov %[v], %%wim\n" + :: [v] "r" (wim) + ); +} + +NO_TRACE static inline ipl_t interrupts_enable(void) +{ + ipl_t pil; + + psr_reg_t psr; + psr.value = psr_read(); + pil = psr.pil; + psr.pil = 0xf; + psr_write(psr.value); + + return pil; +} + +NO_TRACE static inline ipl_t interrupts_disable(void) +{ + ipl_t pil; + + psr_reg_t psr; + psr.value = psr_read(); + pil = psr.pil; + psr.pil = 0; + psr_write(psr.value); + + return pil; +} + +NO_TRACE static inline void interrupts_restore(ipl_t ipl) +{ + psr_reg_t psr; + psr.value = psr_read(); + psr.pil = ipl; + psr_write(psr.value); +} + +NO_TRACE static inline ipl_t interrupts_read(void) +{ + psr_reg_t psr; + psr.value = psr_read(); + return psr.pil; +} + +NO_TRACE static inline bool interrupts_disabled(void) +{ + psr_reg_t psr; + psr.value = psr_read(); + return psr.pil == 0; +} + +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + uintptr_t v; + + asm volatile ( + "and %%sp, %[size], %[v]\n" + : [v] "=r" (v) + : [size] "r" (~(STACK_SIZE - 1)) + ); + + return v; +} + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/atomic.h =================================================================== --- kernel/arch/sparc32/include/arch/atomic.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/atomic.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,124 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_ATOMIC_H_ +#define KERN_abs32le_ATOMIC_H_ + +#include +#include +#include +#include +#include + +NO_TRACE ATOMIC static inline void atomic_inc(atomic_t *val) + WRITES(&val->count) + REQUIRES_EXTENT_MUTABLE(val) + REQUIRES(val->count < ATOMIC_COUNT_MAX) +{ + /* On real hardware the increment has to be done + as an atomic action. */ + + val->count++; +} + +NO_TRACE ATOMIC static inline void atomic_dec(atomic_t *val) + WRITES(&val->count) + REQUIRES_EXTENT_MUTABLE(val) + REQUIRES(val->count > ATOMIC_COUNT_MIN) +{ + /* On real hardware the decrement has to be done + as an atomic action. */ + + val->count--; +} + +NO_TRACE ATOMIC static inline atomic_count_t atomic_postinc(atomic_t *val) + WRITES(&val->count) + REQUIRES_EXTENT_MUTABLE(val) + REQUIRES(val->count < ATOMIC_COUNT_MAX) +{ + /* On real hardware both the storing of the previous + value and the increment have to be done as a single + atomic action. */ + + atomic_count_t prev = val->count; + + val->count++; + return prev; +} + +NO_TRACE ATOMIC static inline atomic_count_t atomic_postdec(atomic_t *val) + WRITES(&val->count) + REQUIRES_EXTENT_MUTABLE(val) + REQUIRES(val->count > ATOMIC_COUNT_MIN) +{ + /* On real hardware both the storing of the previous + value and the decrement have to be done as a single + atomic action. */ + + atomic_count_t prev = val->count; + + val->count--; + return prev; +} + +#define atomic_preinc(val) (atomic_postinc(val) + 1) +#define atomic_predec(val) (atomic_postdec(val) - 1) + +NO_TRACE ATOMIC static inline atomic_count_t test_and_set(atomic_t *val) + WRITES(&val->count) + REQUIRES_EXTENT_MUTABLE(val) +{ + /* On real hardware the retrieving of the original + value and storing 1 have to be done as a single + atomic action. */ + + atomic_count_t prev = val->count; + val->count = 1; + return prev; +} + +NO_TRACE static inline void atomic_lock_arch(atomic_t *val) + WRITES(&val->count) + REQUIRES_EXTENT_MUTABLE(val) +{ + do { + while (val->count); + } while (test_and_set(val)); +} + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/barrier.h =================================================================== --- kernel/arch/sparc32/include/arch/barrier.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/barrier.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_BARRIER_H_ +#define KERN_abs32le_BARRIER_H_ + +/* + * Provisions are made to prevent compiler from reordering instructions itself. + */ + +#define CS_ENTER_BARRIER() +#define CS_LEAVE_BARRIER() + +#define memory_barrier() +#define read_barrier() +#define write_barrier() + +#define smc_coherence(addr) +#define smc_coherence_block(addr, size) + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/context.h =================================================================== --- kernel/arch/sparc32/include/arch/context.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/context.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_CONTEXT_H_ +#define KERN_sparc32_CONTEXT_H_ + +#include +#include +#include + +#define SP_DELTA (STACK_WINDOW_SAVE_AREA_SIZE + STACK_ARG_SAVE_AREA_SIZE) + +#define context_set(c, _pc, stack, size) \ + do { \ + (c)->pc = ((uintptr_t) _pc) - 8; \ + (c)->sp = ((uintptr_t) stack) + ALIGN_UP((size), \ + STACK_ALIGNMENT) - (SP_DELTA); \ + (c)->fp = (c)->fp; \ + } while (0) + +/* + * Save only registers that must be preserved across + * function calls. + */ +typedef struct { + uintptr_t sp; /* %o6 */ + uintptr_t pc; /* %o7 */ + uint32_t i0; + uint32_t i1; + uint32_t i2; + uint32_t i3; + uint32_t i4; + uint32_t i5; + uintptr_t fp; /* %i6 */ + uintptr_t i7; + uint32_t l0; + uint32_t l1; + uint32_t l2; + uint32_t l3; + uint32_t l4; + uint32_t l5; + uint32_t l6; + uint32_t l7; + ipl_t ipl; +} context_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/context_offset.h =================================================================== --- kernel/arch/sparc32/include/arch/context_offset.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/context_offset.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_sparc32_CONTEXT_OFFSET_H_ +#define KERN_sparc32_CONTEXT_OFFSET_H_ + +#define OFFSET_SP 0 +#define OFFSET_PC 4 +#define OFFSET_I0 8 +#define OFFSET_I1 12 +#define OFFSET_I2 16 +#define OFFSET_I3 20 +#define OFFSET_I4 24 +#define OFFSET_I5 28 +#define OFFSET_FP 32 +#define OFFSET_I7 36 +#define OFFSET_L0 40 +#define OFFSET_L1 44 +#define OFFSET_L2 48 +#define OFFSET_L3 52 +#define OFFSET_L4 56 +#define OFFSET_L5 60 +#define OFFSET_L6 64 +#define OFFSET_L7 68 + +#ifndef KERNEL +# define OFFSET_TP 72 +#endif +#ifdef __ASM__ + +.macro CONTEXT_SAVE_ARCH_CORE ctx:req + st %sp, [\ctx + OFFSET_SP] + st %o7, [\ctx + OFFSET_PC] + st %i0, [\ctx + OFFSET_I0] + st %i1, [\ctx + OFFSET_I1] + st %i2, [\ctx + OFFSET_I2] + st %i3, [\ctx + OFFSET_I3] + st %i4, [\ctx + OFFSET_I4] + st %i5, [\ctx + OFFSET_I5] + st %fp, [\ctx + OFFSET_FP] + st %i7, [\ctx + OFFSET_I7] + st %l0, [\ctx + OFFSET_L0] + st %l1, [\ctx + OFFSET_L1] + st %l2, [\ctx + OFFSET_L2] + st %l3, [\ctx + OFFSET_L3] + st %l4, [\ctx + OFFSET_L4] + st %l5, [\ctx + OFFSET_L5] + st %l6, [\ctx + OFFSET_L6] + st %l7, [\ctx + OFFSET_L7] +#ifndef KERNEL + st %g7, [\ctx + OFFSET_TP] +#endif +.endm + +.macro CONTEXT_RESTORE_ARCH_CORE ctx:req + ld [\ctx + OFFSET_SP], %sp + ld [\ctx + OFFSET_PC], %o7 + ld [\ctx + OFFSET_I0], %i0 + ld [\ctx + OFFSET_I1], %i1 + ld [\ctx + OFFSET_I2], %i2 + ld [\ctx + OFFSET_I3], %i3 + ld [\ctx + OFFSET_I4], %i4 + ld [\ctx + OFFSET_I5], %i5 + ld [\ctx + OFFSET_FP], %fp + ld [\ctx + OFFSET_I7], %i7 + ld [\ctx + OFFSET_L0], %l0 + ld [\ctx + OFFSET_L1], %l1 + ld [\ctx + OFFSET_L2], %l2 + ld [\ctx + OFFSET_L3], %l3 + ld [\ctx + OFFSET_L4], %l4 + ld [\ctx + OFFSET_L5], %l5 + ld [\ctx + OFFSET_L6], %l6 + ld [\ctx + OFFSET_L7], %l7 +#ifndef KERNEL + ld [\ctx + OFFSET_TP], %g7 +#endif +.endm + +#endif /* __ASM__ */ + +#endif Index: kernel/arch/sparc32/include/arch/cpu.h =================================================================== --- kernel/arch/sparc32/include/arch/cpu.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/cpu.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_CPU_H_ +#define KERN_abs32le_CPU_H_ + +/* + * On real hardware this structure stores + * information specific to the current + * CPU model. + */ +typedef struct { +} cpu_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/cycle.h =================================================================== --- kernel/arch/sparc32/include/arch/cycle.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/cycle.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_CYCLE_H_ +#define KERN_abs32le_CYCLE_H_ + +#include + +NO_TRACE static inline uint64_t get_cycle(void) +{ + return 0; +} + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/elf.h =================================================================== --- kernel/arch/sparc32/include/arch/elf.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/elf.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_ELF_H_ +#define KERN_sparc32_ELF_H_ + +#define ELF_MACHINE EM_SPARC +#define ELF_DATA_ENCODING ELFDATA2MSB +#define ELF_CLASS ELFCLASS32 + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/exception.h =================================================================== --- kernel/arch/sparc32/include/arch/exception.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/exception.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** + * @file + */ + +#ifndef KERN_sparc32_EXCEPTION_H_ +#define KERN_sparc32_EXCEPTION_H_ + +#define TT_INSTRUCTION_ACCESS_EXCEPTION 0x01 +#define TT_INSTRUCTION_ACCESS_MMU_MISS 0x3c +#define TT_INSTRUCTION_ACCESS_ERROR 0x21 +#define TT_ILLEGAL_INSTRUCTION 0x02 +#define TT_PRIVILEGED_INSTRUCTION 0x03 +#define TT_FP_DISABLED 0x08 +#define TT_DIVISION_BY_ZERO 0x2a +#define TT_DATA_ACCESS_EXCEPTION 0x09 +#define TT_DATA_ACCESS_MMU_MISS 0x2c +#define TT_DATA_ACCESS_ERROR 0x29 +#define TT_MEM_ADDRESS_NOT_ALIGNED 0x07 + +#ifndef __ASM__ + +/*#include */ + +extern void instruction_access_exception(int n, istate_t *istate); +extern void instruction_access_error(int n, istate_t *istate); +extern void illegal_instruction(int n, istate_t *istate); +extern void privileged_instruction(int n, istate_t *istate); +extern void fp_disabled(int n, istate_t *istate); +extern void fp_exception(int n, istate_t *istate); +extern void tag_overflow(int n, istate_t *istate); +extern void division_by_zero(int n, istate_t *istate); +extern void data_access_exception(int n, istate_t *istate); +extern void data_access_error(int n, istate_t *istate); +extern void data_access_mmu_miss(int n, istate_t *istate); +extern void data_store_error(int n, istate_t *istate); +extern void mem_address_not_aligned(int n, istate_t *istate); +extern sysarg_t syscall(sysarg_t a1, sysarg_t a2, sysarg_t a3, sysarg_t a4, sysarg_t a5, sysarg_t a6, sysarg_t id); +extern void irq_exception(unsigned int nr, istate_t *istate); + +#endif /* !__ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/faddr.h =================================================================== --- kernel/arch/sparc32/include/arch/faddr.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/faddr.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_FADDR_H_ +#define KERN_sparc32_FADDR_H_ + +#include + +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/fpu_context.h =================================================================== --- kernel/arch/sparc32/include/arch/fpu_context.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/fpu_context.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_FPU_CONTEXT_H_ +#define KERN_abs32le_FPU_CONTEXT_H_ + +#include + +#define FPU_CONTEXT_ALIGN 16 + +/* + * On real hardware this stores the FPU registers + * which are part of the CPU context. + */ +typedef struct { +} fpu_context_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/interrupt.h =================================================================== --- kernel/arch/sparc32/include/arch/interrupt.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/interrupt.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32leinterrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_INTERRUPT_H_ +#define KERN_abs32le_INTERRUPT_H_ + +#include +#include + +#define IVT_ITEMS 32 +#define IVT_FIRST 0 + +#define VECTOR_TLB_SHOOTDOWN_IPI 0 + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/istate.h =================================================================== --- kernel/arch/sparc32/include/arch/istate.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/istate.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_ISTATE_H_ +#define KERN_sparc32_ISTATE_H_ + +#include + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#define REQUIRES_EXTENT_MUTABLE(arg) +#define WRITES(arg) + +#endif /* KERNEL */ + +/* + * On real hardware this stores the registers which + * need to be preserved during interupts. + */ +typedef struct istate { + uintptr_t pstate; + uintptr_t pc; + uintptr_t npc; + uint32_t stack[]; +} istate_t; + +NO_TRACE static inline int istate_from_uspace(istate_t *istate) + REQUIRES_EXTENT_MUTABLE(istate) +{ + /* On real hardware this checks whether the interrupted + context originated from user space. */ + + return !(istate->pc & UINT32_C(0x80000000)); +} + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) + WRITES(&istate->ip) +{ + /* On real hardware this sets the instruction pointer. */ + + istate->pc = retaddr; +} + +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) + REQUIRES_EXTENT_MUTABLE(istate) +{ + /* On real hardware this returns the instruction pointer. */ + + return istate->pc; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) + REQUIRES_EXTENT_MUTABLE(istate) +{ + /* On real hardware this returns the frame pointer. */ + + return 0;//istate->fp; +} + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/machine/leon3/leon3.h =================================================================== --- kernel/arch/sparc32/include/arch/machine/leon3/leon3.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/machine/leon3/leon3.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2010 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32leon3 LEON3 + * @brief LEON3 System-on-chip. + * @ingroup arm32 + * @{ + */ + +#ifndef KERN_sparc32_leon3_H_ +#define KERN_sparc32_leon3_H_ + +#include + +extern struct sparc_machine_ops leon3_machine_ops; + +#define LEON3_SDRAM_START 0x40000000 +#define LEON3_IRQ_COUNT 15 + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/machine_func.h =================================================================== --- kernel/arch/sparc32/include/arch/machine_func.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/machine_func.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * Copyright (c) 2009 Vineeth Pillai + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + * @brief Declarations of machine specific functions. + * + * These functions enable to differentiate more kinds of ARM emulators + * or CPUs. It's the same concept as "arch" functions on the architecture + * level. + */ + +#ifndef KERN_sparc32_MACHINE_FUNC_H_ +#define KERN_sparc32_MACHINE_FUNC_H_ + +#include + +#include +#include +#include + +struct sparc_machine_ops { + void (*machine_init)(bootinfo_t *); + void (*machine_cpu_halt)(void); + void (*machine_get_memory_extents)(uintptr_t *, size_t *); + void (*machine_timer_irq_start)(void); + void (*machine_irq_exception)(unsigned int, istate_t *); + void (*machine_output_init)(void); + void (*machine_input_init)(void); + size_t (*machine_get_irq_count)(void); + const char *(*machine_get_platform_name)(void); +}; + +/** Pointer to sparc_machine_ops structure being used. */ +extern struct sparc_machine_ops *machine_ops; + +/** Initialize machine_ops pointer. */ +extern void machine_ops_init(void); + +/** Maps HW devices to the kernel address space using #hw_map. */ +extern void machine_init(bootinfo_t *); + + +/** Starts timer. */ +extern void machine_timer_irq_start(void); + + +/** Halts CPU. */ +extern void machine_cpu_halt(void); + +/** Get extents of available memory. + * + * @param start Place to store memory start address. + * @param size Place to store memory size. + */ +extern void machine_get_memory_extents(uintptr_t *start, size_t *size); + +/** Interrupt exception handler. + * + * @param exc_no Interrupt exception number. + * @param istate Saved processor state. + */ +extern void machine_irq_exception(unsigned int exc_no, istate_t *istate); + + +/* + * Machine specific frame initialization + */ +extern void machine_frame_init(void); + +/* + * configure the serial line output device. + */ +extern void machine_output_init(void); + +/* + * configure the serial line input device. + */ +extern void machine_input_init(void); + +extern size_t machine_get_irq_count(void); + +extern const char * machine_get_platform_name(void); + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/mm/as.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/as.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/mm/as.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2010 Martin Decky + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_AS_H_ +#define KERN_sparc32_AS_H_ + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) + +typedef struct { +} as_arch_t; + +#include + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) +#define as_deinstall_arch(as) +#define as_invalidate_translation_cache(as, page, cnt) + +uintptr_t as_context_table; + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/mm/asid.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/asid.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/mm/asid.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32mm + * @{ + */ + +#ifndef KERN_sparc32_ASID_H_ +#define KERN_sparc32_ASID_H_ + +#include + +typedef uint32_t asid_t; + +#define ASID_MAX_ARCH 255 + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/mm/frame.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/frame.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/mm/frame.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_FRAME_H_ +#define KERN_abs32le_FRAME_H_ + +#define FRAME_WIDTH 12 /* 4K */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#include + +#define PHYSMEM_START_ADDR 0x40000000 + +#define BOOT_PT_ADDRESS 0x40008000 +#define BOOT_PT_START_FRAME (BOOT_PT_ADDRESS >> FRAME_WIDTH) +#define BOOT_PT_SIZE_FRAMES 1 + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +extern void physmem_print(void); + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/mm/km.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/km.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/mm/km.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_KM_H_ +#define KERN_sparc32_KM_H_ + +#include + +#define KM_SPARC32_IDENTITY_START UINT32_C(0x80000000) +#define KM_SPARC32_IDENTITY_SIZE UINT32_C(0x70000000) + +#define KM_SPARC32_NON_IDENTITY_START UINT32_C(0xf0000000) +#define KM_SPARC32_NON_IDENTITY_SIZE UINT32_C(0xff00000) + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/mm/page.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/page.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/mm/page.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,275 @@ +/* + * Copyright (c) 2010 Martin Decky + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_PAGE_H_ +#define KERN_sparc32_PAGE_H_ + +#ifndef __ASM__ + +#include +#include + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#define KA2PA(x) (((uintptr_t) (x)) - UINT32_C(0x40000000)) +#define PA2KA(x) (((uintptr_t) (x)) + UINT32_C(0x40000000)) + +#define PTE_ET_INVALID 0 +#define PTE_ET_DESCRIPTOR 1 +#define PTE_ET_ENTRY 2 + +#define PTE_ACC_USER_RO_KERNEL_RO 0 +#define PTE_ACC_USER_RW_KERNEL_RW 1 +#define PTE_ACC_USER_RX_KERNEL_RX 2 +#define PTE_ACC_USER_RWX_KERNEL_RWX 3 +#define PTE_ACC_USER_XO_KERNEL_XO 4 +#define PTE_ACC_USER_RO_KERNEL_RW 5 +#define PTE_ACC_USER_NO_KERNEL_RX 6 +#define PTE_ACC_USER_NO_KERNEL_RWX 7 + +/* Number of entries in each level. */ +#define PTL0_ENTRIES_ARCH 256 +#define PTL1_ENTRIES_ARCH 0 +#define PTL2_ENTRIES_ARCH 64 +#define PTL3_ENTRIES_ARCH 64 + +/* Page table sizes for each level. */ +#define PTL0_SIZE_ARCH ONE_FRAME +#define PTL1_SIZE_ARCH 0 +#define PTL2_SIZE_ARCH ONE_FRAME +#define PTL3_SIZE_ARCH ONE_FRAME + +/* Macros calculating indices for each level. */ +#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 24) & 0xffU) +#define PTL1_INDEX_ARCH(vaddr) 0 +#define PTL2_INDEX_ARCH(vaddr) (((vaddr) >> 18) & 0x3fU) +#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3fU) + +/* Get PTE address accessors for each level. */ +#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ + ((pte_t *) ((((pte_t *) (ptl0))[(i)].frame_address) << 12)) +#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ + KA2PA(ptl1) +#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ + ((pte_t *) ((((pte_t *) (ptl2))[(i)].frame_address) << 12)) +#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ + ((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12)) + +/* Set PTE address accessors for each level. */ +#define SET_PTL0_ADDRESS_ARCH(ptl0) +#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ + (((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12) +#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) +#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) \ + (((pte_t *) (ptl2))[(i)].frame_address = (a) >> 12) +#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ + (((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12) + +/* Get PTE flags accessors for each level. */ +#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ + get_pt_flags((pte_t *) (ptl0), (size_t) (i)) +#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ + PAGE_PRESENT +#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ + get_pt_flags((pte_t *) (ptl2), (size_t) (i)) +#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ + get_pt_flags((pte_t *) (ptl3), (size_t) (i)) + +/* Set PTE flags accessors for each level. */ +#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) +#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) +#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) +#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ + set_pte_flags((pte_t *) (ptl3), (size_t) (i), (x)) + +/* Set PTE present bit accessors for each level. */ +#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ + set_ptd_present((pte_t *) (ptl0), (size_t) (i)) +#define SET_PTL2_PRESENT_ARCH(ptl1, i) +#define SET_PTL3_PRESENT_ARCH(ptl2, i) \ + set_ptd_present((pte_t *) (ptl2), (size_t) (i)) +#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ + set_pte_present((pte_t *) (ptl3), (size_t) (i)) + +/* Macros for querying the last level entries. */ +#define PTE_VALID_ARCH(p) \ + (*((uint32_t *) (p)) != 0) +#define PTE_PRESENT_ARCH(p) \ + ((p)->et != 0) +#define PTE_GET_FRAME_ARCH(p) \ + ((p)->frame_address << FRAME_WIDTH) +#define PTE_WRITABLE_ARCH(p) \ + pte_is_writeable(p) +#define PTE_EXECUTABLE_ARCH(p) \ + pte_is_executable(p) + +#include +#include +#include + +/** Page Table Descriptor. */ +typedef struct { + unsigned int table_pointer: 30; + unsigned int et: 2; +} __attribute__((packed)) ptd_t; + +/** Page Table Entry. */ +typedef struct { + unsigned int frame_address: 24; + unsigned int cacheable: 1; + unsigned int modified: 1; + unsigned int referenced: 1; + unsigned int acc: 3; + unsigned int et: 2; +} __attribute__((packed)) pte_t; + +NO_TRACE static inline void set_ptl0_addr(pte_t *pt) +{ +} + +NO_TRACE static inline bool pte_is_writeable(pte_t *pt) +{ + return ( + pt->acc == PTE_ACC_USER_RW_KERNEL_RW || + pt->acc == PTE_ACC_USER_RWX_KERNEL_RWX || + pt->acc == PTE_ACC_USER_RO_KERNEL_RW || + pt->acc == PTE_ACC_USER_NO_KERNEL_RWX + ); +} + +NO_TRACE static inline bool pte_is_executable(pte_t *pt) +{ + return ( + pt->acc != PTE_ACC_USER_RO_KERNEL_RO && + pt->acc != PTE_ACC_USER_RW_KERNEL_RW && + pt->acc != PTE_ACC_USER_RO_KERNEL_RW + ); +} + +NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) + REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) +{ + pte_t *p = &pt[i]; + + bool notpresent = p->et == 0; + + return ( + (p->cacheable << PAGE_CACHEABLE_SHIFT) | + (notpresent << PAGE_PRESENT_SHIFT) | + ((p->acc != PTE_ACC_USER_NO_KERNEL_RX && p->acc != PTE_ACC_USER_NO_KERNEL_RWX) << PAGE_USER_SHIFT) | + (1 << PAGE_READ_SHIFT) | + (( + p->acc == PTE_ACC_USER_RW_KERNEL_RW || + p->acc == PTE_ACC_USER_RWX_KERNEL_RWX || + p->acc == PTE_ACC_USER_RO_KERNEL_RW || + p->acc == PTE_ACC_USER_NO_KERNEL_RWX + ) << PAGE_WRITE_SHIFT) | + (( + p->acc != PTE_ACC_USER_RO_KERNEL_RO && + p->acc != PTE_ACC_USER_RW_KERNEL_RW && + p->acc != PTE_ACC_USER_RO_KERNEL_RW + ) << PAGE_EXEC_SHIFT) | + (1 << PAGE_GLOBAL_SHIFT) + ); +} + +NO_TRACE static inline void set_ptd_flags(pte_t *pt, size_t i, int flags) + WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) + REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) +{ + pte_t *p = &pt[i]; + + p->et = (flags & PAGE_NOT_PRESENT) + ? PTE_ET_INVALID + : PTE_ET_DESCRIPTOR; +} + +NO_TRACE static inline void set_pte_flags(pte_t *pt, size_t i, int flags) + WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) + REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) +{ + pte_t *p = &pt[i]; + + p->et = PTE_ET_ENTRY; + p->acc = PTE_ACC_USER_NO_KERNEL_RWX; + + if (flags & PAGE_USER) { + if (flags & PAGE_EXEC) { + if (flags & PAGE_READ) + p->acc = PTE_ACC_USER_RX_KERNEL_RX; + if (flags & PAGE_WRITE) + p->acc = PTE_ACC_USER_RWX_KERNEL_RWX; + } else { + if (flags & PAGE_READ) + p->acc = PTE_ACC_USER_RO_KERNEL_RW; + if (flags & PAGE_WRITE) + p->acc = PTE_ACC_USER_RW_KERNEL_RW; + } + } + + if (flags & PAGE_NOT_PRESENT) + p->et = PTE_ET_INVALID; + + p->cacheable = (flags & PAGE_CACHEABLE) != 0; +} + +NO_TRACE static inline void set_ptd_present(pte_t *pt, size_t i) + WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) + REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) +{ + pte_t *p = &pt[i]; + + p->et = PTE_ET_DESCRIPTOR; +} + +NO_TRACE static inline void set_pte_present(pte_t *pt, size_t i) + WRITES(ARRAY_RANGE(pt, PTL0_ENTRIES_ARCH)) + REQUIRES_ARRAY_MUTABLE(pt, PTL0_ENTRIES_ARCH) +{ + pte_t *p = &pt[i]; + + p->et = PTE_ET_ENTRY; +} + +extern void page_arch_init(void); +extern void page_fault(unsigned int, istate_t *); + +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/mm/page_fault.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/page_fault.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/mm/page_fault.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_PAGE_FAULT_H_ +#define KERN_sparc32_PAGE_FAULT_H_ + +typedef enum { + FAULT_TYPE_LOAD_USER_DATA = 0, + FAULT_TYPE_LOAD_SUPERVISOR_DATA = 1, + FAULT_TYPE_EXECUTE_USER = 2, + FAULT_TYPE_EXECUTE_SUPERVISOR = 3, + FAULT_TYPE_STORE_USER_DATA = 4, + FAULT_TYPE_STORE_SUPERVISOR_DATA = 5, + FAULT_TYPE_STORE_USER_INSTRUCTION = 6, + FAULT_TYPE_STORE_SUPERVISOR_INSTRUCTION = 7, +} mmu_fault_type_t; + +/** MMU Fault Status register. */ +typedef struct { + unsigned int : 14; + unsigned int ebe: 8; + unsigned int l: 2; + unsigned int at: 3; + unsigned int ft: 3; + unsigned int fav: 1; + unsigned int ow: 1; +} __attribute__((packed)) mmu_fault_status_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/mm/tlb.h =================================================================== --- kernel/arch/sparc32/include/arch/mm/tlb.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/mm/tlb.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_TLB_H_ +#define KERN_sparc32_TLB_H_ + +#define MMU_CONTROL 0x000 +#define MMU_CONTEXT_TABLE 0x100 +#define MMU_CONTEXT 0x200 +#define MMU_FAULT_STATUS 0x300 +#define MMU_FAULT_ADDRESS 0x400 + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/proc/task.h =================================================================== --- kernel/arch/sparc32/include/arch/proc/task.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/proc/task.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32leproc + * @{ + */ +/** @file + */ + +#ifndef KERN_abs32le_TASK_H_ +#define KERN_abs32le_TASK_H_ + +#include +#include + +/* + * On real hardware this structure stores task information + * specific to the architecture. + */ +typedef struct { +} task_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/proc/thread.h =================================================================== --- kernel/arch/sparc32/include/arch/proc/thread.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/proc/thread.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32proc + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_THREAD_H_ +#define KERN_sparc32_THREAD_H_ + +#include + +typedef struct { + /** Buffer for register windows with userspace content. */ + uint8_t *uspace_window_buffer; +} thread_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/register.h =================================================================== --- kernel/arch/sparc32/include/arch/register.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/register.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_REGISTER_H_ +#define KERN_sparc32_REGISTER_H_ + +#include + +/** Processor State Register. */ +typedef union { + uint32_t value; + struct { + unsigned int impl: 4; + unsigned int ver: 4; + unsigned int icc: 4; + unsigned int : 6; + unsigned int ec: 1; + unsigned int ef: 1; + unsigned int pil: 4; + unsigned int s: 1; + unsigned int ps: 1; + unsigned int et: 1; + unsigned int cwp: 5; + } __attribute__ ((packed)); +} psr_reg_t; + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/regwin.h =================================================================== --- kernel/arch/sparc32/include/arch/regwin.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/regwin.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32interrupt + * @{ + */ +/** + * @file + * @brief This file contains register window trap handlers. + */ + +#ifndef KERN_sparc32_REGWIN_H_ +#define KERN_sparc32_REGWIN_H_ + +#include +#include +#include + +#define UWB_ALIGNMENT 1024 + +/* Window Save Area offsets. */ +#define L0_OFFSET 0 +#define L1_OFFSET 4 +#define L2_OFFSET 8 +#define L3_OFFSET 12 +#define L4_OFFSET 16 +#define L5_OFFSET 20 +#define L6_OFFSET 24 +#define L7_OFFSET 28 +#define I0_OFFSET 32 +#define I1_OFFSET 36 +#define I2_OFFSET 40 +#define I3_OFFSET 44 +#define I4_OFFSET 48 +#define I5_OFFSET 52 +#define I6_OFFSET 56 +#define I7_OFFSET 60 + +/* Uspace Window Buffer constants. */ +#define UWB_SIZE ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE) +#define UWB_ALIGNMENT 1024 +#define UWB_ASIZE ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT) + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/stack.h =================================================================== --- kernel/arch/sparc32/include/arch/stack.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/stack.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_STACK_H_ +#define KERN_sparc32_STACK_H_ + +#include + +#define MEM_STACK_SIZE STACK_SIZE + +#define STACK_ITEM_SIZE 4 + +/** According to SPARC Compliance Definition, every stack frame is 16-byte aligned. */ +#define STACK_ALIGNMENT 8 + +/** + * 16-extended-word save area for %i[0-7] and %l[0-7] registers. + */ +#define STACK_WINDOW_SAVE_AREA_SIZE (16 * STACK_ITEM_SIZE) + +/** + * Six extended words for first six arguments. + */ +#define STACK_ARG_SAVE_AREA_SIZE (6 * STACK_ITEM_SIZE) + +/* + * Offsets of arguments on stack. + */ +#define STACK_ARG0 0 +#define STACK_ARG1 4 +#define STACK_ARG2 8 +#define STACK_ARG3 12 +#define STACK_ARG4 16 +#define STACK_ARG5 20 +#define STACK_ARG6 24 + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/trap.h =================================================================== --- kernel/arch/sparc32/include/arch/trap.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/trap.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32_TRAP_H_ +#define KERN_sparc32_TRAP_H_ + +#define TRAP_ENTRY_SIZE 16 +#define TRAP_TABLE_COUNT 256 +#define TRAP_TABLE_SIZE (TRAP_ENTRY_SIZE * TRAP_TABLE_COUNT) + +#ifndef __ASM__ +extern void *trap_table; +#endif + +#endif + +/** @} + */ Index: kernel/arch/sparc32/include/arch/types.h =================================================================== --- kernel/arch/sparc32/include/arch/types.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/include/arch/types.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_sparc32le_TYPES_H_ +#define KERN_sparc32le_TYPES_H_ + +#define ATOMIC_COUNT_MIN UINT32_MIN +#define ATOMIC_COUNT_MAX UINT32_MAX + +typedef uint32_t size_t; +typedef int32_t ssize_t; + +typedef uint32_t uintptr_t; +typedef uint32_t pfn_t; + +typedef uint32_t ipl_t; + +typedef uint32_t sysarg_t; +typedef int32_t native_t; +typedef uint32_t atomic_count_t; + +typedef struct { +} fncptr_t; + +#define INTN_C(c) INT32_C(c) +#define UINTN_C(c) UINT32_C(c) + +#define PRIdn PRId32 /**< Format for native_t. */ +#define PRIun PRIu32 /**< Format for sysarg_t. */ +#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu32 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/sparc32/src/context.S =================================================================== --- kernel/arch/sparc32/src/context.S (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/context.S (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,91 @@ +# +# Copyright (c) 2005 Jakub Jermar +# Copyright (c) 2013 Jakub Klama +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +#include +#include + +.text + +.global context_save_arch +.global context_restore_arch + +/* + * context_save_arch() is required not to create its own stack frame. See the + * generic context.h for explanation. + */ +context_save_arch: + # + # Force all our active register windows to memory so that we can find + # them there even if e.g. the thread is migrated to another processor. + # + #flushw + mov 7, %g1 +1: subcc %g1, 1, %g1 + bg 1b + save %sp, -64, %sp + + mov 7, %g1 +1: subcc %g1, 1, %g1 + bg 1b + restore + + CONTEXT_SAVE_ARCH_CORE %o0 + retl + mov 1, %o0 ! context_save_arch returns 1 + +context_restore_arch: + # + # Forget all previous windows, they are not going to be needed again. + # Enforce a window fill on the next RESTORE instruction by setting + # CANRESTORE to zero and other window configuration registers + # accordingly. Note that the same can be achieved by executing the + # FLUSHW instruction, but since we don't need to remember the previous + # windows, we do the former and save thus some unnecessary window + # spills. + # + #rdpr %pstate, %l0 + #andn %l0, PSTATE_IE_BIT, %l1 + #wrpr %l1, %pstate + #wrpr %g0, 0, %canrestore + #wrpr %g0, 0, %otherwin + #wrpr %g0, NWINDOWS - 2, %cansave + #wrpr %l0, %pstate + mov 7, %g1 +1: subcc %g1, 1, %g1 + bg 1b + save %sp, -64, %sp + + mov 7, %g1 +1: subcc %g1, 1, %g1 + bg 1b + restore + + CONTEXT_RESTORE_ARCH_CORE %o0 + retl + xor %o0, %o0, %o0 ! context_restore_arch returns 0 Index: kernel/arch/sparc32/src/cpu/cpu.c =================================================================== --- kernel/arch/sparc32/src/cpu/cpu.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/cpu/cpu.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#include +#include +#include +#include +#include + + +void fpu_disable(void) +{ +} + +void fpu_enable(void) +{ +} + +void cpu_arch_init(void) +{ +} + +void cpu_identify(void) +{ +} + +void cpu_print_report(cpu_t* cpu) +{ +} + +/** @} + */ Index: kernel/arch/sparc32/src/ddi/ddi.c =================================================================== --- kernel/arch/sparc32/src/ddi/ddi.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/ddi/ddi.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32leddi + * @{ + */ +/** @file + * @brief DDI. + */ + +#include +#include +#include + +/** Enable I/O space range for task. + * + */ +int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size) +{ + return 0; +} + +/** @} + */ Index: kernel/arch/sparc32/src/debug/stacktrace.c =================================================================== --- kernel/arch/sparc32/src/debug/stacktrace.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/debug/stacktrace.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2010 Jakub Jermar + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + */ + +#include +#include +#include + +#include +#include + +#define FRAME_OFFSET_FP_PREV 14 +#define FRAME_OFFSET_RA 15 + +extern void alloc_window_and_flush(void); + +bool kernel_stack_trace_context_validate(stack_trace_context_t *ctx) +{ + uintptr_t kstack; + uint32_t l1, l2; + + read_from_invalid(&kstack, &l1, &l2); + kstack -= 128; + + if (THREAD && (ctx->fp == kstack)) + return false; + return ctx->fp != 0; +} + +bool kernel_frame_pointer_prev(stack_trace_context_t *ctx, uintptr_t *prev) +{ + uint64_t *stack = (void *) ctx->fp; + alloc_window_and_flush(); + *prev = stack[FRAME_OFFSET_FP_PREV]; + return true; +} + +bool kernel_return_address_get(stack_trace_context_t *ctx, uintptr_t *ra) +{ + uint64_t *stack = (void *) ctx->fp; + alloc_window_and_flush(); + *ra = stack[FRAME_OFFSET_RA]; + return true; +} + +bool uspace_stack_trace_context_validate(stack_trace_context_t *ctx) +{ + return false; +} + +bool uspace_frame_pointer_prev(stack_trace_context_t *ctx, uintptr_t *prev) +{ + return false; +} + +bool uspace_return_address_get(stack_trace_context_t *ctx , uintptr_t *ra) +{ + return false; +} + +/** @} + */ Index: kernel/arch/sparc32/src/exception.c =================================================================== --- kernel/arch/sparc32/src/exception.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/exception.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,176 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc64interrupt + * @{ + */ +/** @file + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/** Handle instruction_access_exception. (0x1) */ +void instruction_access_exception(int n, istate_t *istate) +{ + page_fault(n, istate); +// fault_if_from_uspace(istate, "%s.", __func__); +// panic_badtrap(istate, n, "%s.", __func__); +} + +/** Handle instruction_access_error. (0x21) */ +void instruction_access_error(int n, istate_t *istate) +{ + fault_if_from_uspace(istate, "%s.", __func__); + panic_badtrap(istate, n, "%s.", __func__); +} + +/** Handle illegal_instruction. (0x2) */ +void illegal_instruction(int n, istate_t *istate) +{ + fault_if_from_uspace(istate, "%s.", __func__); + panic_badtrap(istate, n, "%s.", __func__); +} + +/** Handle privileged_instruction. (0x3) */ +void privileged_instruction(int n, istate_t *istate) +{ + fault_if_from_uspace(istate, "%s.", __func__); + panic_badtrap(istate, n, "%s.", __func__); +} + +/** Handle fp_disabled. (0x3) */ +void fp_disabled(int n, istate_t *istate) +{ + fault_if_from_uspace(istate, "%s.", __func__); + panic_badtrap(istate, n, "%s.", __func__); +} + +/** Handle fp_exception. (0x08) */ +void fp_exception(int n, istate_t *istate) +{ + fault_if_from_uspace(istate, "%s.", __func__); + panic_badtrap(istate, n, "%s.", __func__); +} + +/** Handle tag_overflow. (0x0a) */ +void tag_overflow(int n, istate_t *istate) +{ + fault_if_from_uspace(istate, "%s.", __func__); + panic_badtrap(istate, n, "%s.", __func__); +} + +/** Handle division_by_zero. (0x2a) */ +void division_by_zero(int n, istate_t *istate) +{ + fault_if_from_uspace(istate, "%s.", __func__); + panic_badtrap(istate, n, "%s.", __func__); +} + +/** Handle data_access_exception. (0x9) */ +void data_access_exception(int n, istate_t *istate) +{ + page_fault(n, istate); +// fault_if_from_uspace(istate, "%s.", __func__); +// panic_badtrap(istate, n, "%s.", __func__); +} + +/** Handle data_access_error. (0x29) */ +void data_access_error(int n, istate_t *istate) +{ + page_fault(n, istate); +// fault_if_from_uspace(istate, "%s.", __func__); +// panic_badtrap(istate, n, "%s.", __func__); +} + +/** Handle data_store_error. (0x29) */ +void data_store_error(int n, istate_t *istate) +{ + page_fault(n, istate); +// fault_if_from_uspace(istate, "%s.", __func__); +// panic_badtrap(istate, n, "%s.", __func__); +} +/** Handle data_access_error. (0x2c) */ +void data_access_mmu_miss(int n, istate_t *istate) +{ + fault_if_from_uspace(istate, "%s.", __func__); + panic_badtrap(istate, n, "%s.", __func__); +} + +/** Handle mem_address_not_aligned. (0x7) */ +void mem_address_not_aligned(int n, istate_t *istate) +{ + fault_if_from_uspace(istate, "%s.", __func__); + panic_badtrap(istate, n, "%s.", __func__); +} + +sysarg_t syscall(sysarg_t a1, sysarg_t a2, sysarg_t a3, sysarg_t a4, sysarg_t a5, sysarg_t a6, sysarg_t id) +{ +// printf("syscall %d\n", id); +// printf("args: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", a1, a2, a3, a4, a5, a6); +// if (id == 0x4f) { + // flush_windows(); + // return 0; + // } + + return syscall_handler(a1, a2, a3, a4, a5, a6, id); +} + +void irq_exception(unsigned int nr, istate_t *istate) +{ + machine_irq_exception(nr, istate); +} + +void preemptible_save_uspace(uintptr_t sp, istate_t *istate) +{ + as_page_fault(sp, PF_ACCESS_WRITE, istate); +} + +void preemptible_restore_uspace(uintptr_t sp, istate_t *istate) +{ + as_page_fault(sp, PF_ACCESS_WRITE, istate); +} + +/** @} + */ Index: kernel/arch/sparc32/src/machine/leon3/leon3.c =================================================================== --- kernel/arch/sparc32/src/machine/leon3/leon3.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/machine/leon3/leon3.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,174 @@ +/* + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + */ + +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void leon3_init(bootinfo_t *); +static void leon3_cpu_halt(void); +static void leon3_get_memory_extents(uintptr_t *, size_t *); +static void leon3_timer_start(void); +static void leon3_irq_exception(unsigned int, istate_t *); +static void leon3_output_init(void); +static void leon3_input_init(void); +static size_t leon3_get_irq_count(void); +static const char *leon3_get_platform_name(void); + +struct leon3_machine_t +{ + bootinfo_t *bootinfo; + outdev_t *scons_dev; + grlib_irqmp_t irqmp; + //grlib_timer_t timer; +}; + +struct sparc_machine_ops leon3_machine_ops = { + leon3_init, + leon3_cpu_halt, + leon3_get_memory_extents, + leon3_timer_start, + leon3_irq_exception, + leon3_output_init, + leon3_input_init, + leon3_get_irq_count, + leon3_get_platform_name +}; + +static struct leon3_machine_t machine; + +static void leon3_init(bootinfo_t *bootinfo) +{ + machine.bootinfo = bootinfo; + + grlib_irqmp_init(&machine.irqmp, bootinfo); +} + +static void leon3_cpu_halt(void) +{ + for (;;); +} + +static void leon3_get_memory_extents(uintptr_t *start, size_t *size) +{ + *start = LEON3_SDRAM_START; + *size = 64 * 1024 * 1024;//machine.bootinfo->memsize; +} + +static void leon3_timer_start(void) +{ + //machine.timer = grlib_timer_init(machine.bootinfo->timer_base, machine.bootinfo->timer_irq); +} + +static void leon3_irq_exception(unsigned int exc_no, istate_t *istate) +{ + int irqnum = grlib_irqmp_inum_get(&machine.irqmp); + + grlib_irqmp_clear(&machine.irqmp, irqnum); + + irq_t *irq = irq_dispatch_and_lock(irqnum); + if (irq) { + irq->handler(irq); + spinlock_unlock(&irq->lock); + } else + printf("cpu%d: spurious interrupt (irq=%d)\n", CPU->id, irqnum); +} + +static void leon3_output_init(void) +{ + printf("leon3_output_init\n"); + printf("machine.bootinfo=%p, machine.bootinfo->uart_base=0x%08x\n", machine.bootinfo, machine.bootinfo->uart_base); + + machine.scons_dev = grlib_uart_init(machine.bootinfo->uart_base, machine.bootinfo->uart_irq); + + if (machine.scons_dev) + stdout_wire(machine.scons_dev); +} + +static void leon3_input_init(void) +{ +#if 0 + grlib_uart_t *scons_inst; + + if (machine.scons_dev) { + /* Create input device. */ + scons_inst = (void *)machine.scons_dev->data; + + srln_instance_t *srln_instance = srln_init(); + if (srln_instance) { + indev_t *sink = stdin_wire(); + indev_t *srln = srln_wire(srln_instance, sink); + grlib_uart_input_wire(scons_inst, srln); + + /* Enable interrupts from UART */ + grlib_irqmp_unmask(&machine.irqmp, machine.bootinfo->uart_irq); + } + } +#endif +} + +static size_t leon3_get_irq_count(void) +{ + return LEON3_IRQ_COUNT; +} + +static const char *leon3_get_platform_name(void) +{ + return "LEON3"; +} + + Index: kernel/arch/sparc32/src/machine_func.c =================================================================== --- kernel/arch/sparc32/src/machine_func.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/machine_func.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2009 Vineeth Pillai + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32 + * @{ + */ +/** @file + * @brief Definitions of machine specific functions. + * + * These functions enable to differentiate more kinds of sparc emulators + * or CPUs. It's the same concept as "arch" functions on the architecture + * level. + */ + +#include +#include + +/** Pointer to machine_ops structure being used. */ +struct sparc_machine_ops *machine_ops; + +/** Initialize machine_ops pointer. */ +void machine_ops_init(void) +{ +#if defined(MACHINE_leon3) + machine_ops = &leon3_machine_ops; +#else +#error Machine type not defined. +#endif +} + +/** Maps HW devices to the kernel address space using #hw_map. */ +void machine_init(bootinfo_t *bootinfo) +{ + (machine_ops->machine_init)(bootinfo); +} + + +/** Starts timer. */ +void machine_timer_irq_start(void) +{ + (machine_ops->machine_timer_irq_start)(); +} + + +/** Halts CPU. */ +void machine_cpu_halt(void) +{ + (machine_ops->machine_cpu_halt)(); +} + +/** Get extents of available memory. + * + * @param start Place to store memory start address. + * @param size Place to store memory size. + */ +void machine_get_memory_extents(uintptr_t *start, size_t *size) +{ + (machine_ops->machine_get_memory_extents)(start, size); +} + +/** Interrupt exception handler. + * + * @param exc_no Interrupt exception number. + * @param istate Saved processor state. + */ +void machine_irq_exception(unsigned int exc_no, istate_t *istate) +{ + (machine_ops->machine_irq_exception)(exc_no, istate); +} + +/* + * configure the output device. + */ +void machine_output_init(void) +{ + (machine_ops->machine_output_init)(); +} + +/* + * configure the input device. + */ +void machine_input_init(void) +{ + (machine_ops->machine_input_init)(); +} + +/** Get IRQ number range used by machine. */ +size_t machine_get_irq_count(void) +{ + return (machine_ops->machine_get_irq_count)(); +} + +const char * machine_get_platform_name(void) +{ + if (machine_ops->machine_get_platform_name) + return machine_ops->machine_get_platform_name(); + return NULL; +} +/** @} + */ Index: kernel/arch/sparc32/src/mm/as.c =================================================================== --- kernel/arch/sparc32/src/mm/as.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/mm/as.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32mm + * @{ + */ + +#include +#include +#include +#include +#include +#include + +static ptd_t context_table[ASID_MAX_ARCH] __attribute__((aligned (1024))); + +void as_arch_init(void) +{ + as_operations = &as_pt_operations; + as_context_table = (uintptr_t)&context_table; +} + +void as_install_arch(as_t *as) +{ + printf("as_install_arch(asid=%d)\n", as->asid); + printf("genarch.page_table=%p\n", as->genarch.page_table); + + context_table[as->asid].table_pointer = (uintptr_t)as->genarch.page_table >> 6; + context_table[as->asid].et = PTE_ET_DESCRIPTOR; + asi_u32_write(ASI_MMUREGS, 0x200, as->asid); + asi_u32_write(ASI_MMUCACHE, 0, 1); + asi_u32_write(ASI_MMUFLUSH, 0x400, 1); +} + +/** @} + */ Index: kernel/arch/sparc32/src/mm/frame.c =================================================================== --- kernel/arch/sparc32/src/mm/frame.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/mm/frame.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,106 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32mm + * @{ + */ +/** @file + * @brief Frame related functions. + */ + +#include +#include +#include +#include +#include +#include + +static void frame_common_arch_init(bool low) +{ + uintptr_t base; + size_t size; + + machine_get_memory_extents(&base, &size); + + base = ALIGN_UP(base, FRAME_SIZE); + size = ALIGN_DOWN(size, FRAME_SIZE); + + if (!frame_adjust_zone_bounds(low, &base, &size)) + return; + + if (low) { + zone_create(ADDR2PFN(base), SIZE2FRAMES(size), + BOOT_PT_START_FRAME + BOOT_PT_SIZE_FRAMES, + ZONE_AVAILABLE | ZONE_LOWMEM); + + printf("low_zone: %d frames\n", SIZE2FRAMES(size)); + } else { + pfn_t conf = zone_external_conf_alloc(SIZE2FRAMES(size)); + if (conf != 0) + zone_create(ADDR2PFN(base), SIZE2FRAMES(size), conf, + ZONE_AVAILABLE | ZONE_HIGHMEM); + + printf("high zone: %d frames\n", SIZE2FRAMES(size)); + } + + printf("free: %d\n", frame_total_free_get()); +} + +void physmem_print(void) +{ + +} + +/** Create low memory zones. */ +void frame_low_arch_init(void) +{ + frame_common_arch_init(true); + + /* blacklist boot page table */ + frame_mark_unavailable(BOOT_PT_START_FRAME, BOOT_PT_SIZE_FRAMES); + printf("free: %d\n", frame_total_free_get()); + //machine_frame_init(); +} + +/** Create high memory zones. */ +void frame_high_arch_init(void) +{ + frame_common_arch_init(false); +} + +/** Frees the boot page table. */ +/*void boot_page_table_free(void) +{ + unsigned int i; + for (i = 0; i < BOOT_PT_SIZE_FRAMES; i++) + frame_free(i * FRAME_SIZE + BOOT_PT_ADDRESS); +}*/ + +/** @} + */ Index: kernel/arch/sparc32/src/mm/km.c =================================================================== --- kernel/arch/sparc32/src/mm/km.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/mm/km.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup sparc32mm + * @{ + */ + +#include +#include +#include +#include + +void km_identity_arch_init(void) +{ + config.identity_base = KM_SPARC32_IDENTITY_START; + config.identity_size = KM_SPARC32_IDENTITY_SIZE; +} + +void km_non_identity_arch_init(void) +{ + km_non_identity_span_add(KM_SPARC32_NON_IDENTITY_START, + KM_SPARC32_NON_IDENTITY_SIZE); +} + +bool km_is_non_identity_arch(uintptr_t addr) +{ + return iswithin(KM_SPARC32_NON_IDENTITY_START, + KM_SPARC32_NON_IDENTITY_SIZE, addr, 1); +} + +/** @} + */ Index: kernel/arch/sparc32/src/mm/page.c =================================================================== --- kernel/arch/sparc32/src/mm/page.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/mm/page.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32lemm + * @{ + */ +/** @file + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +void page_arch_init(void) +{ + int flags = PAGE_CACHEABLE | PAGE_EXEC; + page_mapping_operations = &pt_mapping_operations; + + page_table_lock(AS_KERNEL, true); + + /* Kernel identity mapping */ + //FIXME: We need to consider the possibility that + //identity_base > identity_size and physmem_end. + //This might lead to overflow if identity_size is too big. + for (uintptr_t cur = PHYSMEM_START_ADDR; + cur < min(KA2PA(config.identity_base) + + config.identity_size, config.physmem_end); + cur += FRAME_SIZE) + page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); + + + page_table_unlock(AS_KERNEL, true); + as_switch(NULL, AS_KERNEL); + +// printf("as_context_table=0x%08x\n", as_context_table); + + /* Switch MMU to new context table */ + asi_u32_write(ASI_MMUREGS, MMU_CONTEXT_TABLE, KA2PA(as_context_table) >> 4); + + //boot_page_table_free(); +} + +void page_fault(unsigned int n __attribute__((unused)), istate_t *istate) +{ + uint32_t fault_status = asi_u32_read(ASI_MMUREGS, MMU_FAULT_STATUS); + uintptr_t fault_address = asi_u32_read(ASI_MMUREGS, MMU_FAULT_ADDRESS); + mmu_fault_status_t *fault = (mmu_fault_status_t *)&fault_status; + mmu_fault_type_t type = (mmu_fault_type_t)fault->at; + +// printf("page fault on address 0x%08x, status 0x%08x, type %d\n", fault_address, fault_status, type); + + if (type == FAULT_TYPE_LOAD_USER_DATA || + type == FAULT_TYPE_LOAD_SUPERVISOR_DATA) + as_page_fault(fault_address, PF_ACCESS_READ, istate); + + if (type == FAULT_TYPE_EXECUTE_USER || + type == FAULT_TYPE_EXECUTE_SUPERVISOR) + as_page_fault(fault_address, PF_ACCESS_EXEC, istate); + + if (type == FAULT_TYPE_STORE_USER_DATA || + type == FAULT_TYPE_STORE_USER_INSTRUCTION || + type == FAULT_TYPE_STORE_SUPERVISOR_INSTRUCTION || + type == FAULT_TYPE_STORE_SUPERVISOR_DATA) + as_page_fault(fault_address, PF_ACCESS_WRITE, istate); +} + +/** @} + */ Index: kernel/arch/sparc32/src/mm/tlb.c =================================================================== --- kernel/arch/sparc32/src/mm/tlb.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/mm/tlb.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32lemm + * @{ + */ + +#include +#include +#include +#include + +void tlb_invalidate_all(void) +{ +} + +void tlb_invalidate_asid(asid_t asid __attribute__((unused))) +{ + tlb_invalidate_all(); +} + +void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, size_t cnt) +{ + tlb_invalidate_all(); +} + +void tlb_arch_init(void) +{ +} + +void tlb_print(void) +{ +} + +/** @} + */ Index: kernel/arch/sparc32/src/proc/scheduler.c =================================================================== --- kernel/arch/sparc32/src/proc/scheduler.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/proc/scheduler.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32leproc + * @{ + */ +/** @file + */ + +#include +#include +#include +#include + +void before_task_runs_arch(void) +{ +} + +void before_thread_runs_arch(void) +{ + if (THREAD->uspace) { + uint32_t kernel_sp = (uint32_t) THREAD->kstack + STACK_SIZE - 8; + uint32_t uspace_wbuf = (uint32_t) THREAD->arch.uspace_window_buffer; + write_to_invalid(kernel_sp, uspace_wbuf, 0); + } +} + +void after_thread_ran_arch(void) +{ + if (THREAD->uspace) { + uint32_t kernel_sp; + uint32_t uspace_wbuf; + uint32_t l7; + read_from_invalid(&kernel_sp, &uspace_wbuf, &l7); + THREAD->arch.uspace_window_buffer = (uint8_t *)uspace_wbuf; + } +} + +/** @} + */ Index: kernel/arch/sparc32/src/proc/task.c =================================================================== --- kernel/arch/sparc32/src/proc/task.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/proc/task.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32leproc + * @{ + */ +/** @file + */ + +#include + +void task_create_arch(task_t *t) +{ +} + +void task_destroy_arch(task_t *t) +{ +} + +/** @} + */ Index: kernel/arch/sparc32/src/proc/thread.c =================================================================== --- kernel/arch/sparc32/src/proc/thread.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/proc/thread.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32leproc + * @{ + */ +/** @file + */ + +#include +#include + +void thr_constructor_arch(thread_t *t) +{ + t->arch.uspace_window_buffer = NULL; +} + +void thr_destructor_arch(thread_t *t) +{ + if (t->arch.uspace_window_buffer) { + uintptr_t uw_buf = (uintptr_t) t->arch.uspace_window_buffer; + /* + * Mind the possible alignment of the userspace window buffer + * belonging to a killed thread. + */ + free((uint8_t *) ALIGN_DOWN(uw_buf, UWB_ALIGNMENT)); + } +} + +void thread_create_arch(thread_t *t) +{ + if ((t->uspace) && (!t->arch.uspace_window_buffer)) + { + /* + * The thread needs userspace window buffer and the object + * returned from the slab allocator doesn't have any. + */ + t->arch.uspace_window_buffer = malloc(UWB_ASIZE, 0); + } else { + uintptr_t uw_buf = (uintptr_t) t->arch.uspace_window_buffer; + + /* + * Mind the possible alignment of the userspace window buffer + * belonging to a killed thread. + */ + t->arch.uspace_window_buffer = (uint8_t *) ALIGN_DOWN(uw_buf, + UWB_ASIZE); + } +} + +/** @} + */ Index: kernel/arch/sparc32/src/regwin_test.S =================================================================== --- kernel/arch/sparc32/src/regwin_test.S (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/regwin_test.S (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,106 @@ +.global func1 +.global func2 +.global func3 +.global func4 +.global func5 +.global func6 +.global func7 +.global func8 +.global func9 +.global func10 +.global func11 +.global func12 + +func1: + save %sp, -96, %sp + set 1, %l7 + call func2 + nop + ret + restore + +func2: + save %sp, -96, %sp + set 2, %l7 + call func3 + nop + ret + restore + +func3: + save %sp, -96, %sp + set 3, %l7 + call func4 + nop + ret + restore + +func4: + save %sp, -96, %sp + set 4, %l7 + call func5 + nop + ret + restore + +func5: + save %sp, -96, %sp + set 5, %l7 + call func6 + nop + ret + restore + +func6: + save %sp, -96, %sp + set 6, %l7 + call func7 + nop + ret + restore + +func7: + save %sp, -96, %sp + set 7, %l7 + call func8 + nop + ret + restore + +func8: + save %sp, -96, %sp + set 8, %l7 + call func9 + nop + ret + restore + +func9: + save %sp, -96, %sp + set 9, %l7 + call func10 + nop + ret + restore + +func10: + save %sp, -96, %sp + set 10, %l7 + call func11 + nop + ret + restore + +func11: + save %sp, -96, %sp + set 11, %l7 + call func12 + nop + ret + restore + +func12: + save %sp, -96, %sp + set 12, %l7 + ret + restore Index: kernel/arch/sparc32/src/smp/ipi.c =================================================================== --- kernel/arch/sparc32/src/smp/ipi.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/smp/ipi.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#ifdef CONFIG_SMP + +#include + +void ipi_broadcast_arch(int ipi) +{ +} + +#endif /* CONFIG_SMP */ + +/** @} + */ Index: kernel/arch/sparc32/src/smp/smp.c =================================================================== --- kernel/arch/sparc32/src/smp/smp.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/smp/smp.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#include + +#if 0 +void smp_init(void) +{ +} + +void kmp(void *arg) +{ +} +#endif + +/** @} + */ Index: kernel/arch/sparc32/src/sparc32.c =================================================================== --- kernel/arch/sparc32/src/sparc32.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/sparc32.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,177 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +char memcpy_from_uspace_failover_address; +char memcpy_to_uspace_failover_address; +bootinfo_t machine_bootinfo; + +void arch_pre_main(void *unused, bootinfo_t *bootinfo) +{ + init.cnt = min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); + memcpy(&machine_bootinfo, bootinfo, sizeof(machine_bootinfo)); + + size_t i; + for (i = 0; i < init.cnt; i++) { + init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr); + init.tasks[i].size = bootinfo->tasks[i].size; + str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN, + bootinfo->tasks[i].name); + } + + machine_ops_init(); +} + +void arch_pre_mm_init(void) +{ +} + +extern void func1(void); + +void arch_post_mm_init(void) +{ + /* Test register windows */ + write_to_invalid(0xdeadbeef, 0xcafebabe, 0); + func1(); + + machine_init(&machine_bootinfo); + + if (config.cpu_active == 1) { + /* Initialize IRQ routing */ + irq_init(16, 16); + + /* Merge all memory zones to 1 big zone */ + zone_merge_all(); + } + + machine_output_init(); +} + + +void arch_post_cpu_init() +{ +} + +void arch_pre_smp_init(void) +{ +} + +void arch_post_smp_init(void) +{ +// machine_input_init(); +} + +void calibrate_delay_loop(void) +{ +} + +sysarg_t sys_tls_set(uintptr_t addr) +{ + return EOK; +} + +/** Construct function pointer + * + * @param fptr function pointer structure + * @param addr function address + * @param caller calling function address + * + * @return address of the function pointer + * + */ +void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) +{ + return addr; +} + +void arch_reboot(void) +{ +} + +void irq_initialize_arch(irq_t *irq) +{ + (void) irq; +} + +void istate_decode(istate_t *istate) +{ + (void) istate; +} + +void fpu_init(void) +{ +} + +void fpu_context_save(fpu_context_t *ctx) +{ +} + +void fpu_context_restore(fpu_context_t *ctx) +{ +} + +int memcpy_from_uspace(void *dst, const void *uspace_src, size_t size) +{ + memcpy(dst, uspace_src, size); + return 1; +} + +int memcpy_to_uspace(void *uspace_dst, const void *src, size_t size) +{ + memcpy(uspace_dst, src, size); + return 1; +} + +/** @} + */ Index: kernel/arch/sparc32/src/start.S =================================================================== --- kernel/arch/sparc32/src/start.S (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/start.S (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,88 @@ +# +# Copyright (c) 2013 Jakub Klama +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +.text + +.global kernel_image_start +.global early_putchar +.global kernel_sp +.global uspace_wbuf + +kernel_image_start: + # Install trap handlers + set trap_table, %g1 + mov %g1, %tbr + + mov %psr, %g1 ! Initialize WIM + add %g1, 1, %g2 + and %g2, 0x7, %g2 + set 1, %g3 + sll %g3, %g2, %g3 + mov %g3, %wim + + or %g1, 0x20, %g1 + or %g1, 0xf00, %g1 ! PIL + wr %g1, %psr + + set boot_stack, %sp + mov %sp, %fp + sub %sp, 96, %sp + + mov %o1, %l1 + set 0xdeadbeef, %o0 + set 0xdeadbeef, %o1 + set 0, %o2 + call write_to_invalid + nop + + mov %l1, %o1 + call arch_pre_main + nop + + call main_bsp + nop + +early_putchar: + set 0x80000100, %l0 + cmp %o0, '\n' + bne skip + set '\r', %l1 + sta %l1, [%l0] 0x1c +skip: sta %o0, [%l0] 0x1c + retl + nop + +kernel_sp: +.space 4 + +uspace_wbuf: +.space 4 + +.align 16 +.space 4096 +boot_stack: Index: kernel/arch/sparc32/src/trap_table.S =================================================================== --- kernel/arch/sparc32/src/trap_table.S (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/trap_table.S (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,1244 @@ +# +# Copyright (c) 2013 Jakub Klama +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +#include +#include + +.text + +.global trap_table +.global reset_trap +.global preemptible_trap +.global interrupt_trap +.global syscall_trap +.global window_overflow_trap +.global window_underflow_trap +.global write_to_invalid +.global read_from_invalid +.global flush_windows + +.macro get_wim_number reg + clr \reg + mov %wim, %g5 +1: andcc %g5, 1, %g0 + bne 2f + nop + srl %g5, 1, %g5 + inc \reg + b 1b +2: nop + +.endm + +.macro get_cwp reg + mov %psr, \reg + and \reg, 0x7, \reg +.endm + +.macro switch_to_invalid saved_wim, saved_psr + get_wim_number %l3 + mov %wim, \saved_wim ! save WIM + mov %g0, %wim ! clear WIM + mov %psr, \saved_psr ! read PSR + and \saved_psr, 0xfffffff0, %l4 + or %l4, %l3, %l3 ! set CWP + mov %l3, %psr ! write PSR + nop + nop + nop + nop ! wait for PSR to be effective +.endm + +.macro switch_back wim, psr + mov \wim, %wim ! saved WIM + mov \psr, %psr ! saved PSR + nop + nop + nop + nop +.endm + +/* Save next window to kernel stack or UWB */ +.macro inline_save_kernel + mov %wim, %l3 + sll %l3, 7, %l4 + srl %l3, 1, %l3 + or %l3, %l4, %l3 + and %l3, 0xff, %l3 + mov %g0, %wim + + mov %l5, %g5 + mov %l6, %g6 + mov %l7, %g7 + + save + std %l0, [%sp + 0] + std %l2, [%sp + 8] + std %l4, [%sp + 16] + std %l6, [%sp + 24] + std %i0, [%sp + 32] + std %i2, [%sp + 40] + std %i4, [%sp + 48] + std %i6, [%sp + 56] + mov %g5, %l5 + mov %g6, %l6 + mov %g7, %l7 + restore + mov %l3, %wim +.endm + +.macro inline_save_uspace uwb + mov %wim, %l3 + sll %l3, 7, %l4 + srl %l3, 1, %l3 + or %l3, %l4, %l3 + and %l3, 0xff, %l3 + mov %g0, %wim + mov \uwb, %g3 + + mov %l5, %g5 + mov %l6, %g6 + mov %l7, %g7 + + save + std %l0, [%g3 + 0] + std %l2, [%g3 + 8] + std %l4, [%g3 + 16] + std %l6, [%g3 + 24] + std %i0, [%g3 + 32] + std %i2, [%g3 + 40] + std %i4, [%g3 + 48] + std %i6, [%g3 + 56] + mov %g5, %l5 + mov %g6, %l6 + mov %g7, %l7 + add \uwb, 64, \uwb + restore + mov %l3, %wim +.endm + +/* Restore window from kernel stack or UWB */ +.macro inline_restore_kernel + mov %wim, %l3 + srl %l3, 7, %l4 + sll %l3, 1, %l3 + or %l3, %l4, %l3 + and %l3, 0xff, %l3 + + mov %g0, %wim + restore + mov %l5, %g5 + mov %l6, %g6 + mov %l7, %g7 + restore + mov %g5, %l5 + mov %g6, %l6 + mov %g7, %l7 + save + + ldd [%sp + 0], %l0 + ldd [%sp + 8], %l2 + ldd [%sp + 16], %l4 + ldd [%sp + 24], %l6 + ldd [%sp + 32], %i0 + ldd [%sp + 40], %i2 + ldd [%sp + 48], %i4 + ldd [%sp + 56], %i6 + save + + mov %l3, %wim +.endm + +.macro inline_restore_uspace uwb + mov %wim, %l3 + srl %l3, 7, %l4 + sll %l3, 1, %l3 + or %l3, %l4, %l3 + and %l3, 0xff, %l3 + + mov %g0, %wim + restore + mov %l5, %g5 + mov %l6, %g6 + mov %l7, %g7 + restore + mov %g5, %l5 + mov %g6, %l6 + mov %g7, %l7 + save + + sub \uwb, 64, \uwb + ldd [\uwb + 0], %l0 + ldd [\uwb + 8], %l2 + ldd [\uwb + 16], %l4 + ldd [\uwb + 24], %l6 + ldd [\uwb + 32], %i0 + ldd [\uwb + 40], %i2 + ldd [\uwb + 48], %i4 + ldd [\uwb + 56], %i6 + save + + mov %l3, %wim +.endm + +.macro if_from_kernel label + mov %psr, %l3 + and %l3, (1 << 6), %l3 + cmp %l3, 0 + bne \label + nop +.endm + +write_to_invalid: + ! Write value 1 + mov %o0, %g7 + switch_to_invalid %g3, %g4 + mov %g7, %l5 + switch_back %g3, %g4 + ! Write value 2 + mov %o1, %g7 + switch_to_invalid %g3, %g4 + mov %g7, %l6 + switch_back %g3, %g4 + ! Write value 3 + mov %o2, %g7 + switch_to_invalid %g3, %g4 + mov %g7, %l7 + switch_back %g3, %g4 + retl + nop + +read_from_invalid: + ! Read value 1 + mov %o0, %g7 + switch_to_invalid %g3, %g4 + st %l5, [%g7] + switch_back %g3, %g4 + ! Write value 2 + mov %o1, %g7 + switch_to_invalid %g3, %g4 + st %l6, [%g7] + switch_back %g3, %g4 + ! Write value 3 + mov %o2, %g7 + switch_to_invalid %g3, %g4 + st %l7, [%g7] + switch_back %g3, %g4 + retl + nop + +reset_trap: + set 0x80000100, %l0 + set 'r', %l1 + sta %l1, [%l0] 0x1c + rett + +window_overflow_trap: + mov %g7, %l0 + + /* Check whether previous mode was usermode */ + mov %psr, %l4 + and %l4, (1 << 6), %l4 + cmp %l4, 0 + bne 1f + nop + + /* userspace: */ + /* time to check whether desired stack page is mapped + * on the MMU. if so, process with saving window directly. + * if not, go to preemptible trap handler */ + mov %wim, %g5 + mov %g0, %wim + save + mov %sp, %g4 + restore + mov %g5, %wim + + /* Check beginning of %sp */ + and %g4, 0xfffff000, %l4 + lda [%l4] 0x18, %l4 + cmp %l4, 0 + bne 1f + nop + + /* prepare args for preemptible handler */ + mov %g4, %o0 + set preemptible_save_uspace, %o2 + b preemptible_trap + nop + + /* Check end of %sp */ + add %g4, 56, %g4 + and %l4, 0xfffff000, %l4 + lda [%l4] 0x18, %l4 + cmp %l4, 0 + bne 1f + nop + + /* prepare args for preemptible handler */ + mov %g4, %o0 + set preemptible_save_uspace, %o2 + b preemptible_trap + nop + + /* kernel: */ +1: /* rotate WIM on bit right, we have 8 windows */ + mov %wim, %l3 + sll %l3, 7, %l4 + srl %l3, 1, %l3 + or %l3, %l4, %l3 + and %l3, 0xff, %l3 + + /* disable WIM traps */ + mov %g0,%wim + nop; nop; nop + + /* Save invalid window data */ + mov %l5, %g5 ! kernel stack pointer + mov %l6, %g6 ! kernel wbuf + mov %l7, %g7 + + + /* we should check whether window needs to be saved + * to kernel stack or uwb + */ + cmp %g7, 0 + bne 2f + nop + + /* dump registers to stack */ + save + std %l0, [%sp + 0] + std %l2, [%sp + 8] + std %l4, [%sp + 16] + std %l6, [%sp + 24] + std %i0, [%sp + 32] + std %i2, [%sp + 40] + std %i4, [%sp + 48] + std %i6, [%sp + 56] + b 3f + nop + + /* dump registers to uwb */ +2: save + std %l0, [%g6 + 0] + std %l2, [%g6 + 8] + std %l4, [%g6 + 16] + std %l6, [%g6 + 24] + std %i0, [%g6 + 32] + std %i2, [%g6 + 40] + std %i4, [%g6 + 48] + std %i6, [%g6 + 56] + add %g6, 64, %g6 + + /* check whether it's the last user window to be saved */ + and %g7, 0x7, %l5 + mov %psr, %l4 + and %l4, 0x7, %l4 + cmp %l5, %l4 + bne 3f + nop + + /* clear uspace window mark */ + clr %g7 + +3: /* back to where we should be */ + mov %g5, %l5 + mov %g6, %l6 + mov %g7, %l7 + restore + + /* set new value of window */ + mov %l3,%wim + nop; nop; nop + + /* go home */ + mov %l0, %g7 + jmp %l1 + rett %l2 + +window_underflow_trap: + mov %g7, %l0 + + /* Check whether previous mode was usermode */ + mov %psr, %l4 + and %l4, (1 << 6), %l4 + cmp %l4, 0 + bne 1f + nop + + /* userspace: */ + /* time to check whether desired stack page is mapped + * on the MMU. if so, process with saving window directly. + * if not, go to preemptible trap handler */ + mov %wim, %g5 + mov %g0, %wim + restore + restore + mov %sp, %g4 + save + save + mov %g5, %wim + and %sp, 0xfffff000, %l4 + lda [%l4] 0x18, %l4 + cmp %l4, 0 + bne 1f + nop + + /* prepare args for preemptible handler */ + mov %g4, %o0 + set preemptible_restore_uspace, %o2 + b preemptible_trap + nop + + /* rotate WIM on bit LEFT, we have 8 windows */ +1: mov %wim,%l3 + srl %l3,7,%l4 + sll %l3,1,%l3 + or %l3,%l4,%l3 + and %l3, 0xff,%l3 + + /* disable WIM traps */ + mov %g0,%wim + nop; nop; nop + + /* kernel: */ + restore + restore + mov %l5, %g5 ! kernel stack pointer + mov %l6, %g6 ! kernel wbuf + mov %l7, %g7 + + ldd [%sp + 0], %l0 + ldd [%sp + 8], %l2 + ldd [%sp + 16], %l4 + ldd [%sp + 24], %l6 + ldd [%sp + 32], %i0 + ldd [%sp + 40], %i2 + ldd [%sp + 48], %i4 + ldd [%sp + 56], %i6 + b 2f + nop + +2: /* Restore invalid window data */ + restore + mov %g5, %l5 + mov %g6, %l6 + mov %g7, %l7 + save + save + save + + /* Set new value of window */ + mov %l3,%wim + nop; nop; nop + + /* go home */ + mov %l0, %g7 + jmp %l1 + rett %l2 + +flush_windows: + mov 7, %g1 +1: subcc %g1, 1, %g1 + bg 1b + save %sp, -64, %sp + + mov 7, %g1 +1: subcc %g1, 1, %g1 + bg 1b + restore + + retl + nop + +preemptible_trap: + /* Save %g7 */ + mov %g7, %l0 + + /* Check whether we landed in invalid window */ + get_wim_number %g6 + get_cwp %g7 + cmp %g6, %g7 + bne 4f + nop + + /* We are in invalid window. Check whether previous mode was usermode */ + if_from_kernel 3f + + /* Trap originated from uspace */ + /* Kernel stack pointer is at %l5, uwb is at %l6 */ + inline_save_uspace %l6 + + /* set uspace window mark */ + mov %psr, %l7 + inc %l7 + and %l7, 0x7, %l7 + or %l7, 0x10, %l7 + b 4f + nop + +3: /* Trap originated from kernel */ + inline_save_kernel + +4: /* Check whether previous mode was usermode */ + if_from_kernel 5f + + /* Load kernel stack pointer from invalid window */ + switch_to_invalid %g5, %g6 + + /* set uspace window mark */ + mov %g6, %l7 + inc %l7 + and %l7, 0x7, %l7 + or %l7, 0x10, %l7 + + /* Save stack pointer */ + mov %l5, %g7 + switch_back %g5, %g6 + mov %g7, %sp +// mov %sp, %fp + +5: /* Set up stack frame */ + sub %sp, 128, %sp + + /* Save trap data on stack */ + mov %psr, %l5 + st %l1, [%sp + 92] + st %l2, [%sp + 96] + st %l5, [%sp + 100] + st %g1, [%sp + 104] + st %g2, [%sp + 108] + st %g3, [%sp + 112] + st %g4, [%sp + 116] + st %l0, [%sp + 120] + + /* Enable traps */ + mov %psr, %l0 + or %l0, (1 << 5), %l0 + mov %l0, %psr + nop + nop + nop + nop + + /* Get UWB address */ +// switch_to_invalid %g5, %g6 +// mov %l6, %g1 +// switch_back %g5, %g6 + +# /* Flush windows to stack */ + call flush_windows + nop +/* + get_wim_number %g2 + get_cwp %g5 + mov %psr, %g6 + + sub %g2, 1, %g4 + and %g4, 0x7, %g4 +0: mov %g0, %wim + cmp %g5, %g4 + be 0f + nop + + restore + add %g1, 64, %g1 + std %l0, [%g1 + 0] + std %l2, [%g1 + 8] + std %l4, [%g1 + 16] + std %l6, [%g1 + 24] + std %i0, [%g1 + 32] + std %l2, [%g1 + 40] + std %l4, [%g1 + 48] + std %l6, [%g1 + 56] + inc %g5 + and %g5, 0x7, %g5 + ba 0b + nop + +0: inc %g4 + and %g4, 0x7, %g4 + clr %g5 + inc %g5 + sll %g5, %g4, %g5 + + * Write values to invalid window and switch back * + mov %g7, %l5 + mov %g1, %l6 + clr %l7 + switch_back %g5, %g6 +*/ + + /* Jump to actual subroutine */ + call %o2 + add %sp, 128, %o1 + + /* Return from handler */ + ld [%sp + 92], %l1 + ld [%sp + 96], %l2 + ld [%sp + 100], %l0 + mov %l0, %psr + nop + nop + nop + nop + nop + + /* If trap originated from uspace, clear uspace window mark and save uwb address for future use */ + if_from_kernel 9f + switch_to_invalid %g5, %g6 + clr %l7 + mov %l5, %g2 + mov %l6, %g7 + switch_back %g5, %g6 + mov %g7, %g1 + + /* If trap originated from uspace, restore all windows from UWB */ + /* UWB pointer is at %g1 */ +0: mov %g0, %wim + clr %g5 + andcc %g1, UWB_ALIGNMENT - 1, %g0 + bz 0f + nop + + restore + sub %g1, 64, %g1 + ldd [%g1 + 0], %l0 + ldd [%g1 + 8], %l2 + ldd [%g1 + 16], %l4 + ldd [%g1 + 24], %l6 + ldd [%g1 + 32], %i0 + ldd [%g1 + 40], %i2 + ldd [%g1 + 48], %i4 + ldd [%g1 + 56], %i6 + inc %g5 + and %g5, 0x7, %g5 + ba 0b + nop + + /* We've restored all uspace windows. Now time to + * fix CWP and WIM + */ +0: restore + get_cwp %g7 + clr %g5 + inc %g5 + sll %g5, %g7, %g5 + + /* Write values to invalid window and switch back */ + mov %g2, %l5 + mov %g1, %l6 + clr %l7 + switch_back %g5, %g6 + + mov %sp, %l3 + sub %g2, 128, %sp + ld [%sp + 104], %g1 + ld [%sp + 108], %g2 + ld [%sp + 112], %g3 + ld [%sp + 116], %g4 + ld [%sp + 120], %g7 + mov %l3, %sp + b 10f + nop + +9: inline_restore_kernel + + ld [%sp + 104], %g1 + ld [%sp + 108], %g2 + ld [%sp + 112], %g3 + ld [%sp + 116], %g4 + ld [%sp + 120], %g7 + +10: jmp %l1 + rett %l2 + +interrupt_trap: + /* Save %g7 */ + mov %g7, %l0 + + /* Check whether we landed in invalid window */ + get_wim_number %g6 + get_cwp %g7 + cmp %g6, %g7 + bne 4f + nop + + /* We are in invalid window. Check whether previous mode was usermode */ + if_from_kernel 3f + + /* Trap originated from uspace */ + /* Kernel stack pointer is at %l5, uwb is at %l6 */ + inline_save_uspace %l6 + + /* set uspace window mark */ + mov %psr, %l7 + inc %l7 + and %l7, 0x7, %l7 + or %l7, 0x10, %l7 + b 4f + nop + +3: /* Trap originated from kernel */ + inline_save_kernel + +4: /* Check whether previous mode was usermode */ + if_from_kernel 5f + + /* Load kernel stack pointer from invalid window */ + switch_to_invalid %g5, %g6 + + /* set uspace window mark */ + mov %g6, %l7 + inc %l7 + and %l7, 0x7, %l7 + or %l7, 0x10, %l7 + + /* Save stack pointer */ + mov %l5, %g7 + switch_back %g5, %g6 + mov %g7, %sp +// mov %sp, %fp + +5: /* Set up stack frame */ + sub %sp, 128, %sp + + /* Save trap data on stack */ + mov %psr, %l5 + st %l1, [%sp + 92] + st %l2, [%sp + 96] + st %l5, [%sp + 100] + st %g1, [%sp + 104] + st %g2, [%sp + 108] + st %g3, [%sp + 112] + st %g4, [%sp + 116] + st %l0, [%sp + 120] + + /* Enable traps */ + mov %psr, %l0 + or %l0, (1 << 5), %l0 + mov %l0, %psr + nop + nop + nop + nop + + /* Flush windows to stack */ + call flush_windows + nop + + /* Jump to actual subroutine */ + mov %g2, %o0 + call irq_exception + add %sp, 128, %o1 + + /* Return from handler */ + ld [%sp + 92], %l1 + ld [%sp + 96], %l2 + ld [%sp + 100], %l0 + mov %l0, %psr + nop + nop + nop + nop + nop + + /* If trap originated from uspace, clear uspace window mark and save uwb address for future use */ + if_from_kernel 6f + switch_to_invalid %g5, %g6 + clr %l7 + mov %l5, %g2 + mov %l6, %g7 + switch_back %g5, %g6 + mov %g7, %g1 + + /* If trap originated from uspace, restore all windows from UWB */ + /* UWB pointer is at %g1 */ +0: mov %g0, %wim + clr %g5 + andcc %g1, UWB_ALIGNMENT - 1, %g0 + bz 0f + nop + + restore + sub %g1, 64, %g1 + ldd [%g1 + 0], %l0 + ldd [%g1 + 8], %l2 + ldd [%g1 + 16], %l4 + ldd [%g1 + 24], %l6 + ldd [%g1 + 32], %i0 + ldd [%g1 + 40], %i2 + ldd [%g1 + 48], %i4 + ldd [%g1 + 56], %i6 + inc %g5 + and %g5, 0x7, %g5 + ba 0b + nop + + /* We've restored all uspace windows. Now time to + * fix CWP and WIM + */ +0: restore + get_cwp %g7 + clr %g5 + inc %g5 + sll %g5, %g7, %g5 + + /* Write values to invalid window and switch back */ + mov %g2, %l5 + mov %g1, %l6 + clr %l7 + switch_back %g5, %g6 + + /* If next window is invalid, do inline restore */ +6: get_wim_number %g6 + get_cwp %g7 + inc %g7 + and %g7, 0x7, %g7 + cmp %g6, %g7 + bne 8f + + if_from_kernel 7f + + inline_restore_uspace %g1 + switch_to_invalid %g5, %g6 + mov %g1, %l6 + switch_back %g5, %g6 + b 8f + nop + +7: inline_restore_kernel + +8: ld [%sp + 104], %g1 + ld [%sp + 108], %g2 + ld [%sp + 112], %g3 + ld [%sp + 116], %g4 + ld [%sp + 120], %g7 + jmp %l1 + rett %l2 + + +syscall_trap: + /* Save %g7 */ + mov %g7, %l0 + + /* Check whether we landed in invalid window */ + get_wim_number %g6 + get_cwp %g7 + cmp %g6, %g7 + bne 4f + nop + + /* We are in invalid window. Check whether previous mode was usermode */ + if_from_kernel 3f + + /* Trap originated from uspace */ + /* Kernel stack pointer is at %l5, uwb is at %l6 */ + inline_save_uspace %l6 + + /* set uspace window mark */ + mov %psr, %l7 + inc %l7 + and %l7, 0x7, %l7 + or %l7, 0x10, %l7 + b 4f + nop + +3: /* Trap originated from kernel */ + inline_save_kernel + +4: /* Check whether previous mode was usermode */ + if_from_kernel 5f + + /* Load kernel stack pointer from invalid window */ + switch_to_invalid %g5, %g6 + + /* set uspace window mark */ + mov %g6, %l7 + inc %l7 + and %l7, 0x7, %l7 + or %l7, 0x10, %l7 + + /* Save stack pointer */ + mov %l5, %g7 + switch_back %g5, %g6 + mov %g7, %sp +// mov %sp, %fp + +5: /* Set up stack frame */ + sub %sp, 128, %sp + + /* Save trap data on stack */ + mov %psr, %l5 + st %l1, [%sp + 92] + st %l2, [%sp + 96] + st %l5, [%sp + 100] + st %g1, [%sp + 104] + st %g2, [%sp + 108] + st %g3, [%sp + 112] + st %g4, [%sp + 116] + st %l0, [%sp + 120] + + /* Enable traps */ + mov %psr, %l0 + or %l0, (1 << 5), %l0 + mov %l0, %psr + nop + nop + nop + nop + + /* Flush windows */ + call flush_windows + nop + + /* Jump to actual subroutine */ + sub %o0, 0x80, %o0 + st %o0, [ %sp + 92 ] + mov %i0, %o0 + mov %i1, %o1 + mov %i2, %o2 + mov %i3, %o3 + mov %i4, %o4 + call syscall + mov %i5, %o5 + + /* Return from handler */ + ld [%sp + 92], %l1 + ld [%sp + 96], %l2 + ld [%sp + 100], %l0 + mov %o0, %i0 + mov %psr, %l1 + and %l1, 0xf, %l1 + and %l0, 0xfffffff0, %l0 + or %l0, %l1, %l0 + mov %l0, %psr + nop + nop + nop + nop + nop + + /* If trap originated from uspace, clear uspace window mark and save uwb address for future use */ + if_from_kernel 8f + switch_to_invalid %g5, %g6 + mov %l5, %g2 + mov %l6, %g1 + mov %l7, %g7 + switch_back %g5, %g6 + + /* If trap originated from uspace, restore all windows from UWB */ + /* UWB pointer is at %g1 */ +0: mov %g0, %wim + clr %g5 + andcc %g1, UWB_ALIGNMENT - 1, %g0 + bz 0f + nop + + restore + sub %g1, 64, %g1 + ldd [%g1 + 0], %l0 + ldd [%g1 + 8], %l2 + ldd [%g1 + 16], %l4 + ldd [%g1 + 24], %l6 + ldd [%g1 + 32], %i0 + ldd [%g1 + 40], %i2 + ldd [%g1 + 48], %i4 + ldd [%g1 + 56], %i6 + inc %g5 + and %g5, 0x7, %g5 + ba 0b + nop + + /* We've restored all uspace windows. Now time to + * fix CWP and WIM + */ +0: restore + get_cwp %g7 + clr %g5 + inc %g5 + sll %g5, %g7, %g5 + + /* Write values to invalid window and switch back */ + mov %g2, %l5 + mov %g1, %l6 + clr %l7 + switch_back %g5, %g6 + +8: mov %sp, %l1 + sub %g2, 128, %sp + ld [%sp + 104], %g1 + ld [%sp + 108], %g2 + ld [%sp + 112], %g3 + ld [%sp + 116], %g4 + ld [%sp + 120], %g7 + mov %l1, %sp + jmp %l2 + rett %l2 + 4 + +#define STRAP(_vector, _handler) \ + .org trap_table + _vector * TRAP_ENTRY_SIZE; \ + mov %psr, %l0 ; \ + sethi %hi(_handler), %l4 ; \ + jmp %lo(_handler) + %l4 ; \ + nop + +#define TRAP(_vector, _handler) \ + .org trap_table + _vector * TRAP_ENTRY_SIZE; \ + set _vector, %o0 ; \ + sethi %hi(_handler), %o2 ; \ + b preemptible_trap ; \ + or %o2, %lo(_handler), %o2 ; + +#define SYSCALL(_vector) \ + .org trap_table + _vector * TRAP_ENTRY_SIZE; \ + set _vector, %o0 ; \ + b syscall_trap ; \ + nop ; + +#define INTERRUPT(_vector, _priority) \ + .org trap_table + _vector * TRAP_ENTRY_SIZE; \ + mov %psr, %l0 ; \ + mov _priority, %g2 ; \ + b interrupt_trap ; \ + nop ; + +#define BADTRAP(_vector) \ + .org trap_table + _vector * TRAP_ENTRY_SIZE ; \ + ta 0 ; + +.align TRAP_TABLE_SIZE +trap_table: + STRAP(0x0, reset_trap) + TRAP(0x1, instruction_access_exception) + TRAP(0x2, illegal_instruction) + TRAP(0x3, privileged_instruction) + TRAP(0x4, fp_disabled) + STRAP(0x5, window_overflow_trap) + STRAP(0x6, window_underflow_trap) + TRAP(0x7, mem_address_not_aligned) + TRAP(0x8, fp_exception) + TRAP(0x9, data_access_exception) + TRAP(0xa, tag_overflow) + BADTRAP(0xb) + BADTRAP(0xc) + BADTRAP(0xd) + BADTRAP(0xe) + BADTRAP(0xf) + BADTRAP(0x10) + INTERRUPT(0x11, 1) + INTERRUPT(0x12, 2) + INTERRUPT(0x13, 3) + INTERRUPT(0x14, 4) + INTERRUPT(0x15, 5) + INTERRUPT(0x16, 6) + INTERRUPT(0x17, 7) + INTERRUPT(0x18, 8) + INTERRUPT(0x19, 9) + INTERRUPT(0x1a, 10) + INTERRUPT(0x1b, 11) + INTERRUPT(0x1c, 12) + INTERRUPT(0x1d, 13) + INTERRUPT(0x1e, 14) + INTERRUPT(0x1f, 15) + TRAP(0x21, instruction_access_error) + BADTRAP(0x22) + BADTRAP(0x23) + BADTRAP(0x24) + BADTRAP(0x25) + BADTRAP(0x26) + BADTRAP(0x27) + BADTRAP(0x28) + TRAP(0x29, data_access_error) + TRAP(0x2a, division_by_zero) + TRAP(0x2b, data_store_error) + TRAP(0x2c, data_access_mmu_miss) + BADTRAP(0x2d) + BADTRAP(0x2e) + BADTRAP(0x2f) + BADTRAP(0x30) + BADTRAP(0x31) + BADTRAP(0x32) + BADTRAP(0x33) + BADTRAP(0x34) + BADTRAP(0x35) + BADTRAP(0x36) + BADTRAP(0x37) + BADTRAP(0x38) + BADTRAP(0x39) + BADTRAP(0x3a) + BADTRAP(0x3b) + BADTRAP(0x3c) + BADTRAP(0x3d) + BADTRAP(0x3e) + BADTRAP(0x3f) + BADTRAP(0x40) + BADTRAP(0x41) + BADTRAP(0x42) + BADTRAP(0x43) + BADTRAP(0x44) + BADTRAP(0x45) + BADTRAP(0x46) + BADTRAP(0x47) + BADTRAP(0x48) + BADTRAP(0x49) + BADTRAP(0x4a) + BADTRAP(0x4b) + BADTRAP(0x4c) + BADTRAP(0x4d) + BADTRAP(0x4e) + BADTRAP(0x4f) + BADTRAP(0x50) + BADTRAP(0x51) + BADTRAP(0x52) + BADTRAP(0x53) + BADTRAP(0x54) + BADTRAP(0x55) + BADTRAP(0x56) + BADTRAP(0x57) + BADTRAP(0x58) + BADTRAP(0x59) + BADTRAP(0x5a) + BADTRAP(0x5b) + BADTRAP(0x5c) + BADTRAP(0x5d) + BADTRAP(0x5e) + BADTRAP(0x5f) + BADTRAP(0x60) + BADTRAP(0x61) + BADTRAP(0x62) + BADTRAP(0x63) + BADTRAP(0x64) + BADTRAP(0x65) + BADTRAP(0x66) + BADTRAP(0x67) + BADTRAP(0x68) + BADTRAP(0x69) + BADTRAP(0x6a) + BADTRAP(0x6b) + BADTRAP(0x6c) + BADTRAP(0x6d) + BADTRAP(0x6e) + BADTRAP(0x6f) + BADTRAP(0x70) + BADTRAP(0x71) + BADTRAP(0x72) + BADTRAP(0x73) + BADTRAP(0x74) + BADTRAP(0x75) + BADTRAP(0x76) + BADTRAP(0x77) + BADTRAP(0x78) + BADTRAP(0x79) + BADTRAP(0x7a) + BADTRAP(0x7b) + BADTRAP(0x7c) + BADTRAP(0x7d) + BADTRAP(0x7e) + BADTRAP(0x7f) + SYSCALL(0x80) + SYSCALL(0x81) + SYSCALL(0x82) + SYSCALL(0x83) + SYSCALL(0x84) + SYSCALL(0x85) + SYSCALL(0x86) + SYSCALL(0x87) + SYSCALL(0x88) + SYSCALL(0x89) + SYSCALL(0x8a) + SYSCALL(0x8b) + SYSCALL(0x8c) + SYSCALL(0x8d) + SYSCALL(0x8e) + SYSCALL(0x8f) + SYSCALL(0x90) + SYSCALL(0x91) + SYSCALL(0x92) + SYSCALL(0x93) + SYSCALL(0x94) + SYSCALL(0x95) + SYSCALL(0x96) + SYSCALL(0x97) + SYSCALL(0x98) + SYSCALL(0x99) + SYSCALL(0x9a) + SYSCALL(0x9b) + SYSCALL(0x9c) + SYSCALL(0x9d) + SYSCALL(0x9e) + SYSCALL(0x9f) + SYSCALL(0xa0) + SYSCALL(0xa1) + SYSCALL(0xa2) + SYSCALL(0xa3) + SYSCALL(0xa4) + SYSCALL(0xa5) + SYSCALL(0xa6) + SYSCALL(0xa7) + SYSCALL(0xa8) + SYSCALL(0xa9) + SYSCALL(0xaa) + SYSCALL(0xab) + SYSCALL(0xac) + SYSCALL(0xad) + SYSCALL(0xae) + SYSCALL(0xaf) + SYSCALL(0xb0) + SYSCALL(0xb1) + SYSCALL(0xb2) + SYSCALL(0xb3) + SYSCALL(0xb4) + SYSCALL(0xb5) + SYSCALL(0xb6) + SYSCALL(0xb7) + SYSCALL(0xb8) + SYSCALL(0xb9) + SYSCALL(0xba) + SYSCALL(0xbb) + SYSCALL(0xbc) + SYSCALL(0xbd) + SYSCALL(0xbe) + SYSCALL(0xbf) + SYSCALL(0xc0) + SYSCALL(0xc1) + SYSCALL(0xc2) + SYSCALL(0xc3) + SYSCALL(0xc4) + SYSCALL(0xc5) + SYSCALL(0xc6) + SYSCALL(0xc7) + SYSCALL(0xc8) + SYSCALL(0xc9) + SYSCALL(0xca) + SYSCALL(0xcb) + SYSCALL(0xcc) + SYSCALL(0xcd) + SYSCALL(0xce) + SYSCALL(0xcf) Index: kernel/arch/sparc32/src/userspace.c =================================================================== --- kernel/arch/sparc32/src/userspace.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/arch/sparc32/src/userspace.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2010 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup abs32le + * @{ + */ +/** @file + */ + +#include +#include +#include +#include +#include +#include + +void userspace(uspace_arg_t *kernel_uarg) +{ +// printf("userspace(): entry=%p, stack=%p, stacksize=%d\n", kernel_uarg->uspace_entry, kernel_uarg->uspace_stack, kernel_uarg->uspace_stack_size); + /* On real hardware this switches the CPU to user + space mode and jumps to kernel_uarg->uspace_entry. */ + + uint32_t l0, l1, l2; + uint32_t psr = psr_read(); + uint8_t wim; + + psr &= ~(1 << 7); + psr &= ~(1 << 6); + + /* Read invalid window variables */ + read_from_invalid(&l0, &l1, &l2); + + /* Make current window invalid */ + wim = (psr & 0x7) + 1; + wim = (1 << wim) | (1 >> (8 - wim)); + + asm volatile ( + "flush\n" + "mov %[stack], %%sp\n" + "mov %[wim], %%wim\n" + "ld %[v0], %%o0\n" + "ld %[v1], %%o1\n" + "ld %[v2], %%o2\n" + "call write_to_invalid\n" + "nop\n" + "ld %[arg], %%o1\n" + "jmp %[entry]\n" + "mov %[psr], %%psr\n" :: [entry] "r" (kernel_uarg->uspace_entry), + [arg] "m" (kernel_uarg->uspace_uarg), + [psr] "r" (psr), + [wim] "r" ((uint32_t)wim), + [v0] "m" (l0), + [v1] "m" (l1), + [v2] "m" (l2), + [stack] "r" (kernel_uarg->uspace_stack + kernel_uarg->uspace_stack_size - 64) : "%g3", "%g4"); + + while (true); +} + +/** @} + */ Index: kernel/genarch/Makefile.inc =================================================================== --- kernel/genarch/Makefile.inc (revision ac36aed6ba03d52c09889649d82815646527f5b5) +++ kernel/genarch/Makefile.inc (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -110,4 +110,14 @@ endif +ifeq ($(CONFIG_GRLIB_UART),y) + GENARCH_SOURCES += \ + genarch/src/drivers/grlib_uart/grlib_uart.c +endif + +ifeq ($(CONFIG_GRLIB_IRQMP),y) + GENARCH_SOURCES += \ + genarch/src/drivers/grlib_irqmp/grlib_irqmp.c +endif + ifeq ($(CONFIG_AM335X_TIMERS),y) GENARCH_SOURCES += \ Index: kernel/genarch/include/genarch/drivers/grlib_irqmp/grlib_irqmp.h =================================================================== --- kernel/genarch/include/genarch/drivers/grlib_irqmp/grlib_irqmp.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/genarch/include/genarch/drivers/grlib_irqmp/grlib_irqmp.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Gaisler GRLIB interrupt controller driver. + */ + +#ifndef KERN_GRLIB_IRQMP_H_ +#define KERN_GRLIB_IRQMP_H_ + +#include +#include + +#define GRLIB_IRQMP_MASK_OFFSET 0x40 +#define GRLIB_IRQMP_FORCE_OFFSET 0x80 + +/** IRQMP registers */ +typedef struct { + uint32_t level; + uint32_t pending; + uint32_t force; + uint32_t clear; + uint32_t mp_status; + uint32_t broadcast; +} grlib_irqmp_regs_t; + +/** LEON3 interrupt assignments */ +enum grlib_irq_source { + GRLIB_INT_AHBERROR = 1, + GRLIB_INT_UART1 = 2, + GRLIB_INT_PCIDMA = 4, + GRLIB_INT_CAN = 5, + GRLIB_INT_TIMER0 = 6, + GRLIB_INT_TIMER1 = 7, + GRLIB_INT_TIMER2 = 8, + GRLIB_INT_TIMER3 = 9, + GRLIB_INT_ETHERNET = 14 +}; + +typedef struct { + grlib_irqmp_regs_t *regs; +} grlib_irqmp_t; + +extern void grlib_irqmp_init(grlib_irqmp_t *, bootinfo_t *); +extern int grlib_irqmp_inum_get(grlib_irqmp_t *); +extern void grlib_irqmp_clear(grlib_irqmp_t *, int); +extern void grlib_irqmp_mask(grlib_irqmp_t *, int); +extern void grlib_irqmp_unmask(grlib_irqmp_t *, int); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/drivers/grlib_uart/grlib_uart.h =================================================================== --- kernel/genarch/include/genarch/drivers/grlib_uart/grlib_uart.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/genarch/include/genarch/drivers/grlib_uart/grlib_uart.h (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,106 @@ +/* + * Copyright (c) 2010 Jiri Svoboda + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Gaisler GRLIB UART IP-Core driver. + */ + +#ifndef KERN_GRLIB_UART_H_ +#define KERN_GRLIB_UART_H_ + +#include +#include +#include +#include + +typedef struct { + unsigned int rcnt: 6; + unsigned int tcnt: 6; + unsigned int : 9; + unsigned int rf: 1; + unsigned int tf: 1; + unsigned int rh: 1; + unsigned int th: 1; + unsigned int fe: 1; + unsigned int pe: 1; + unsigned int ov: 1; + unsigned int br: 1; + unsigned int te: 1; + unsigned int ts: 1; + unsigned int dr: 1; +} grlib_uart_status_t; + +typedef struct { + unsigned int fa: 1; + unsigned int : 16; + unsigned int si: 1; + unsigned int di: 1; + unsigned int bi: 1; + unsigned int db: 1; + unsigned int rf: 1; + unsigned int tf: 1; + unsigned int ec: 1; + unsigned int lb: 1; + unsigned int fl: 1; + unsigned int pe: 1; + unsigned int ps: 1; + unsigned int ti: 1; + unsigned int ri: 1; + unsigned int te: 1; + unsigned int re: 1; +} grlib_uart_control_t; + +/** GRLIB UART registers */ +typedef struct { + uint32_t data; + uint32_t status; + uint32_t control; + uint32_t scaler; + uint32_t debug; +} grlib_uart_io_t; + +typedef struct { + grlib_uart_io_t *io; + indev_t *indev; + irq_t irq; + parea_t parea; +} grlib_uart_t; + +extern outdev_t *grlib_uart_init(uintptr_t, inr_t inr); +extern void grlib_uart_input_wire(grlib_uart_t *, + indev_t *); + +#endif + +/** @} + */ Index: kernel/genarch/src/drivers/grlib_irqmp/grlib_irqmp.c =================================================================== --- kernel/genarch/src/drivers/grlib_irqmp/grlib_irqmp.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/genarch/src/drivers/grlib_irqmp/grlib_irqmp.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Gaisler GRLIB interrupt controller. + */ + +#include +#include + +#include + +void grlib_irqmp_init(grlib_irqmp_t *irqc, bootinfo_t *bootinfo) +{ + irqc->regs = (void *) km_map(bootinfo->intc_base, PAGE_SIZE, + PAGE_NOT_CACHEABLE); + + printf("irqmp regs: %p\n", irqc->regs); + + /* Mask all interrupts */ + pio_write_32((void *)irqc->regs + GRLIB_IRQMP_MASK_OFFSET, 0x8); +} + +int grlib_irqmp_inum_get(grlib_irqmp_t *irqc) +{ + int i; + uint32_t pending = pio_read_32(&irqc->regs->pending); + + for (i = 1; i < 16; i++) { + if (pending & (1 << i)) + return i; + } + + return -1; +} + +void grlib_irqmp_clear(grlib_irqmp_t *irqc, int inum) +{ + inum++; + pio_write_32(&irqc->regs->clear, (1 << inum)); +} + +void grlib_irqmp_mask(grlib_irqmp_t *irqc, int src) +{ + uint32_t mask = pio_read_32((void *)irqc->regs + GRLIB_IRQMP_MASK_OFFSET); + + src++; + mask &= ~(1 << src); + + pio_write_32((void *)irqc->regs + GRLIB_IRQMP_MASK_OFFSET, mask); +} + +void grlib_irqmp_unmask(grlib_irqmp_t *irqc, int src) +{ + uint32_t mask = pio_read_32((void *)irqc->regs + GRLIB_IRQMP_MASK_OFFSET); + + src++; + mask |= (1 << src); + + pio_write_32((void *)irqc->regs + GRLIB_IRQMP_MASK_OFFSET, mask); +} + +/** @} + */ Index: kernel/genarch/src/drivers/grlib_uart/grlib_uart.c =================================================================== --- kernel/genarch/src/drivers/grlib_uart/grlib_uart.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) +++ kernel/genarch/src/drivers/grlib_uart/grlib_uart.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -0,0 +1,167 @@ +/* + * Copyright (c) 2009 Martin Decky + * Copyright (c) 2010 Jiri Svoboda + * Copyright (c) 2013 Jakub Klama + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Gaisler GRLIB UART IP-Core driver. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void grlib_uart_sendb(outdev_t *dev, uint8_t byte) +{ + uint32_t reg; + grlib_uart_status_t *status; + grlib_uart_t *uart = + (grlib_uart_t *) dev->data; + + /* Wait for space becoming available in Tx FIFO. */ + do { + reg = pio_read_32(&uart->io->status); + status = (grlib_uart_status_t *)® + } while (status->tf != 0); + + pio_write_32(&uart->io->data, byte); +} + +static void grlib_uart_putchar(outdev_t *dev, wchar_t ch) +{ + grlib_uart_t *uart = + (grlib_uart_t *) dev->data; + + if ((!uart->parea.mapped) || (console_override)) { + if (!ascii_check(ch)) { + grlib_uart_sendb(dev, U_SPECIAL); + } else { + if (ch == '\n') + grlib_uart_sendb(dev, (uint8_t) '\r'); + grlib_uart_sendb(dev, (uint8_t) ch); + } + } +} + +static irq_ownership_t grlib_uart_claim(irq_t *irq) +{ + return IRQ_ACCEPT; +} + +static void grlib_uart_irq_handler(irq_t *irq) +{ + uint32_t reg; + grlib_uart_t *uart = irq->instance; + grlib_uart_status_t *status; + + reg = pio_read_32(&uart->io->status); + status = (grlib_uart_status_t *)® + + while (status->dr != 0) { + uint32_t data = pio_read_32(&uart->io->data); + reg = pio_read_32(&uart->io->status); + status = (grlib_uart_status_t *)® + indev_push_character(uart->indev, data & 0xff); + } +} + +static outdev_operations_t grlib_uart_ops = { + .write = grlib_uart_putchar, + .redraw = NULL +}; + +outdev_t *grlib_uart_init(uintptr_t paddr, inr_t inr) +{ + printf("grlib_uart_init: paddr=0x%08x\n", paddr); + + outdev_t *uart_dev = malloc(sizeof(outdev_t), FRAME_ATOMIC); + if (!uart_dev) + return NULL; + + grlib_uart_t *uart = + malloc(sizeof(grlib_uart_t), FRAME_ATOMIC); + if (!uart) { + free(uart_dev); + return NULL; + } + + outdev_initialize("grlib_uart_dev", uart_dev, &grlib_uart_ops); + uart_dev->data = uart; + + uart->io = (grlib_uart_io_t *) km_map(paddr, PAGE_SIZE, + PAGE_WRITE | PAGE_NOT_CACHEABLE); + uart->indev = NULL; + + /* Initialize IRQ structure. */ + irq_initialize(&uart->irq); + uart->irq.devno = device_assign_devno(); + uart->irq.inr = inr; + uart->irq.claim = grlib_uart_claim; + uart->irq.handler = grlib_uart_irq_handler; + uart->irq.instance = uart; + + /* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */ + grlib_uart_control_t control = + { .fa = 1, .rf = 1, .tf = 1, .ri = 1, + .te = 1, .re = 1}; + + uint32_t *reg = (uint32_t *)&control; + pio_write_32(&uart->io->control, *reg); + + link_initialize(&uart->parea.link); + uart->parea.pbase = paddr; + uart->parea.frames = 1; + uart->parea.unpriv = false; + uart->parea.mapped = false; + ddi_parea_register(&uart->parea); + + return uart_dev; +} + +void grlib_uart_input_wire(grlib_uart_t *uart, indev_t *indev) +{ + ASSERT(uart); + ASSERT(indev); + + uart->indev = indev; + irq_register(&uart->irq); +} + +/** @} + */ Index: kernel/generic/src/main/main.c =================================================================== --- kernel/generic/src/main/main.c (revision ac36aed6ba03d52c09889649d82815646527f5b5) +++ kernel/generic/src/main/main.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -166,4 +166,8 @@ config.stack_base = config.base + config.kernel_size; + printf("base = 0x%08x\n", config.base); + printf("kernel_size = 0x%08x\n", config.kernel_size); + printf("stack_base = 0x%08x\n", config.stack_base); + /* Avoid placing stack on top of init */ size_t i; Index: kernel/generic/src/proc/scheduler.c =================================================================== --- kernel/generic/src/proc/scheduler.c (revision ac36aed6ba03d52c09889649d82815646527f5b5) +++ kernel/generic/src/proc/scheduler.c (revision b51cf2cfbf7533cc494e6a1795d62f5fbd481c87) @@ -64,4 +64,6 @@ #include +//#define SCHEDULER_VERBOSE 1 + static void scheduler_separated_stack(void); @@ -518,5 +520,5 @@ #ifdef SCHEDULER_VERBOSE printf("cpu%u: tid %" PRIu64 " (priority=%d, ticks=%" PRIu64 - ", nrdy=%ld)\n", CPU->id, THREAD->tid, THREAD->priority, + ", nrdy=%d)\n", CPU->id, THREAD->tid, THREAD->priority, THREAD->ticks, atomic_get(&CPU->nrdy)); #endif