Index: arch/amd64/Makefile.inc
===================================================================
--- arch/amd64/Makefile.inc	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/amd64/Makefile.inc	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -11,5 +11,5 @@
 BFD_ARCH=i386:x86-64
 
-DEFS=-DARCH=$(ARCH)
+DEFS=-DARCH=$(ARCH) -DFPU_LAZY
 
 ifdef SMP
Index: arch/amd64/include/cpu.h
===================================================================
--- arch/amd64/include/cpu.h	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/amd64/include/cpu.h	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -52,6 +52,4 @@
 
 
-extern void set_TS_flag(void);
-extern void reset_TS_flag(void);
 extern void set_efer_flag(int flag);
 extern __u64 read_efer_flag(void);
Index: arch/amd64/src/cpu/cpu.c
===================================================================
--- arch/amd64/src/cpu/cpu.c	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/amd64/src/cpu/cpu.c	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -91,5 +91,5 @@
  *
  */
-void set_TS_flag(void)
+void fpu_disable(void)
 {
 	__asm__	volatile (
@@ -103,5 +103,5 @@
 }
 
-void reset_TS_flag(void)
+void fpu_enable(void)
 {
 	__asm__	volatile (
Index: arch/amd64/src/fpu_context.c
===================================================================
--- arch/amd64/src/fpu_context.c	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/amd64/src/fpu_context.c	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -34,18 +34,5 @@
 void fpu_context_save(fpu_context_t *fctx)
 {
-}
-
-void fpu_context_restore(fpu_context_t *fctx)
-{
-	if(THREAD==CPU->fpu_owner) 
-		reset_TS_flag();
-	else
-		set_TS_flag(); 
-}
-
-
-void fpu_lazy_context_save(fpu_context_t *fctx)
-{
-	/* TODO: We need malloc that allocates on 16-byte boundary !! */
+	/* Align on 16-byte boundary */
 	if (((__u64)fctx) & 0xf)
 		fctx = (fpu_context_t *)((((__u64)fctx) | 0xf) + 1);
@@ -57,5 +44,5 @@
 }
 
-void fpu_lazy_context_restore(fpu_context_t *fctx)
+void fpu_context_restore(fpu_context_t *fctx)
 {
 	/* TODO: We need malloc that allocates on 16-byte boundary !! */
Index: arch/amd64/src/interrupt.c
===================================================================
--- arch/amd64/src/interrupt.c	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/amd64/src/interrupt.c	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -39,5 +39,5 @@
 #include <symtab.h>
 #include <arch/asm.h>
-
+#include <proc/scheduler.h>
 
 
@@ -139,18 +139,9 @@
 void nm_fault(__u8 n, __native stack[])
 {
-	reset_TS_flag();
-	if (CPU->fpu_owner != NULL) {  
-		fpu_lazy_context_save(&CPU->fpu_owner->saved_fpu_context);
-		/* don't prevent migration */
-		CPU->fpu_owner->fpu_context_engaged=0; 
-	}
-	if (THREAD->fpu_context_exists)
-		fpu_lazy_context_restore(&THREAD->saved_fpu_context);
-	else {
-		fpu_init();
-		THREAD->fpu_context_exists=1;
-	}
-	CPU->fpu_owner=THREAD;
-	THREAD->fpu_context_engaged = 1;
+#ifdef FPU_LAZY     
+	scheduler_fpu_lazy_request();
+#else
+	panic("fpu fault");
+#endif
 }
 
Index: arch/ia32/Makefile.inc
===================================================================
--- arch/ia32/Makefile.inc	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/ia32/Makefile.inc	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -8,5 +8,5 @@
 
 
-DEFS:=-DARCH=$(ARCH)
+DEFS:=-DARCH=$(ARCH) -DFPU_LAZY
 
 ifdef SMP
Index: arch/ia32/Makefile.inc.cross
===================================================================
--- arch/ia32/Makefile.inc.cross	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/ia32/Makefile.inc.cross	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -8,9 +8,10 @@
 LD=$(IA-32_BINUTILS_DIR)/$(IA-32_TARGET)-ld
 OBJCOPY=$(IA-32_BINUTILS_DIR)/$(IA-32_TARGET)-objcopy
+OBJDUMP=$(IA-32_BINUTILS_DIR)/$(IA-32_TARGET)-objdump
 
 BFD_NAME=elf32-i386
 BFD_ARCH=i386
 
-DEFS:=-DARCH=$(ARCH)
+DEFS:=-DARCH=$(ARCH) -DFPU_LAZY
 
 ifdef SMP
@@ -25,4 +26,7 @@
 CFLAGS=$(CPPFLAGS) -nostdlib -fno-builtin -fomit-frame-pointer -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3
 LFLAGS=-M -no-check-sections
+
+../arch/$(ARCH)/_link.ld: ../arch/$(ARCH)/_link.ld.in
+	$(CC) $(CFLAGS) -E -x c $< | grep -v "^\#" > $@
 
 arch_sources= \
Index: arch/ia32/include/cpu.h
===================================================================
--- arch/ia32/include/cpu.h	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/ia32/include/cpu.h	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -42,7 +42,3 @@
 };
 
-
-void set_TS_flag(void);
-void reset_TS_flag(void);
-
 #endif
Index: arch/ia32/include/fpu_context.h
===================================================================
--- arch/ia32/include/fpu_context.h	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/ia32/include/fpu_context.h	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -38,4 +38,3 @@
 
 
-
 #endif
Index: arch/ia32/src/cpu/cpu.c
===================================================================
--- arch/ia32/src/cpu/cpu.c	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/ia32/src/cpu/cpu.c	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -63,8 +63,7 @@
 };
 
-void set_TS_flag(void)
+void fpu_disable(void)
 {
-	asm
-	(
+	__asm__ volatile (
 		"mov %%cr0,%%eax;"
 		"or $8,%%eax;"
@@ -76,8 +75,7 @@
 }
 
-void reset_TS_flag(void)
+void fpu_enable(void)
 {
-	asm
-	(
+	__asm__ volatile (
 		"mov %%cr0,%%eax;"
 		"and $0xffFFffF7,%%eax;"
Index: arch/ia32/src/fpu_context.c
===================================================================
--- arch/ia32/src/fpu_context.c	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/ia32/src/fpu_context.c	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -34,21 +34,4 @@
 void fpu_context_save(fpu_context_t *fctx)
 {
-}
-
-
-void fpu_context_restore(fpu_context_t *fctx)
-{
-	if (THREAD==CPU->fpu_owner) 
-		reset_TS_flag();
-	else {
-		set_TS_flag(); 
-		if (CPU->fpu_owner != NULL)
-			(CPU->fpu_owner)->fpu_context_engaged=1;
-	}
-}
-
-
-void fpu_lazy_context_save(fpu_context_t *fctx)
-{
 	__asm__ volatile (
 		"fnsave %0"
@@ -57,5 +40,6 @@
 }
 
-void fpu_lazy_context_restore(fpu_context_t *fctx)
+
+void fpu_context_restore(fpu_context_t *fctx)
 {
 	__asm__ volatile (
Index: arch/ia32/src/interrupt.c
===================================================================
--- arch/ia32/src/interrupt.c	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/ia32/src/interrupt.c	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -110,16 +110,9 @@
 void nm_fault(__u8 n, __native stack[])
 {
-	reset_TS_flag();
-	if (CPU->fpu_owner != NULL) {  
-		fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context));
-		CPU->fpu_owner->fpu_context_engaged=0; /* don't prevent migration */
-	}
-	if (THREAD->fpu_context_exists) 
-		fpu_lazy_context_restore(&(THREAD->saved_fpu_context));
-	else {
-		fpu_init();
-		THREAD->fpu_context_exists=1;
-	}
-	CPU->fpu_owner=THREAD;
+#ifdef FPU_LAZY     
+	scheduler_fpu_lazy_request();
+#else
+	panic("fpu fault");
+#endif
 }
 
Index: arch/ia64/src/dummy.s
===================================================================
--- arch/ia64/src/dummy.s	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/ia64/src/dummy.s	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -43,4 +43,7 @@
 .global frame_arch_init
 .global dummy
+.global fpu_enable
+.global fpu_disable
+.gloabl fpu_init
 
 before_thread_runs_arch:
@@ -57,4 +60,7 @@
 cpu_sleep:
 frame_arch_init:
+fpu_init:
+fpu_enable:
+fpu_disable:	
 
 dummy:
Index: arch/ia64/src/fpu_context.c
===================================================================
--- arch/ia64/src/fpu_context.c	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/ia64/src/fpu_context.c	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -39,10 +39,2 @@
 }
 
-
-void fpu_lazy_context_save(fpu_context_t *fctx)
-{
-}
-
-void fpu_lazy_context_restore(fpu_context_t *fctx)
-{
-}
Index: arch/mips/src/dummy.s
===================================================================
--- arch/mips/src/dummy.s	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/mips/src/dummy.s	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -35,4 +35,7 @@
 .global before_thread_runs_arch
 .global dummy
+.global fpu_enable
+.global fpu_disable
+.global fpu_init
 
 before_thread_runs_arch:
@@ -40,4 +43,7 @@
 calibrate_delay_loop:
 asm_delay_loop:
+fpu_enable:
+fpu_disable:
+fpu_init:	
 
 dummy:
Index: arch/mips/src/fpu_context.c
===================================================================
--- arch/mips/src/fpu_context.c	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/mips/src/fpu_context.c	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -39,10 +39,2 @@
 }
 
-
-void fpu_lazy_context_save(fpu_context_t *fctx)
-{
-}
-
-void fpu_lazy_context_restore(fpu_context_t *fctx)
-{
-}
Index: arch/ppc/src/dummy.s
===================================================================
--- arch/ppc/src/dummy.s	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/ppc/src/dummy.s	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -33,8 +33,14 @@
 .global before_thread_runs_arch
 .global dummy
+.global fpu_init
+.global fpu_enable
+.global fpu_disable
 
 before_thread_runs_arch:
 userspace:
 asm_delay_loop:
+fpu_init:
+fpu_enable:	
+fpu_disable:	
 
 dummy:
Index: arch/ppc/src/fpu_context.c
===================================================================
--- arch/ppc/src/fpu_context.c	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ arch/ppc/src/fpu_context.c	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -38,12 +38,2 @@
 {
 }
-
-
-void fpu_lazy_context_save(fpu_context_t *fctx)
-{
-}
-
-void fpu_lazy_context_restore(fpu_context_t *fctx)
-{
-
-}
Index: include/fpu_context.h
===================================================================
--- include/fpu_context.h	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ include/fpu_context.h	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -36,7 +36,7 @@
 extern void fpu_context_save(fpu_context_t *);
 extern void fpu_context_restore(fpu_context_t *);
-extern void fpu_lazy_context_save(fpu_context_t *);
-extern void fpu_lazy_context_restore(fpu_context_t *);
 extern void fpu_init(void);
+extern void fpu_enable(void);
+extern void fpu_disable(void);
 
 
Index: include/proc/scheduler.h
===================================================================
--- include/proc/scheduler.h	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ include/proc/scheduler.h	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -52,4 +52,5 @@
 extern void scheduler_init(void);
 
+extern void scheduler_fpu_lazy_request(void);
 extern void scheduler(void);
 extern void kcpulb(void *arg);
Index: src/proc/scheduler.c
===================================================================
--- src/proc/scheduler.c	(revision a5d13315f6fe7cb2335365e69268b1d5f4b7cd85)
+++ src/proc/scheduler.c	(revision b49f4ae38f84dc067e59e7ac1aaff428876a1c60)
@@ -61,8 +61,40 @@
 void before_thread_runs(void)
 {
-	before_thread_runs_arch(); 
-	fpu_context_restore(&(THREAD->saved_fpu_context));
-}
-
+	before_thread_runs_arch();
+#ifdef FPU_LAZY
+	if(THREAD==CPU->fpu_owner) 
+		fpu_enable();
+	else
+		fpu_disable(); 
+#else
+	fpu_enable();
+	if (THREAD->fpu_context_exists)
+		fpu_context_restore(&(THREAD->saved_fpu_context));
+	else {
+		fpu_init();
+		THREAD->fpu_context_exists=1;
+	}
+#endif
+}
+
+#ifdef FPU_LAZY
+void scheduler_fpu_lazy_request(void)
+{
+	fpu_enable();
+	if (CPU->fpu_owner != NULL) {  
+		fpu_context_save(&CPU->fpu_owner->saved_fpu_context);
+		/* don't prevent migration */
+		CPU->fpu_owner->fpu_context_engaged=0; 
+	}
+	if (THREAD->fpu_context_exists)
+		fpu_context_restore(&THREAD->saved_fpu_context);
+	else {
+		fpu_init();
+		THREAD->fpu_context_exists=1;
+	}
+	CPU->fpu_owner=THREAD;
+	THREAD->fpu_context_engaged = 1;
+}
+#endif
 
 /** Initialize scheduler
@@ -241,5 +273,7 @@
 	if (THREAD) {
 		spinlock_lock(&THREAD->lock);
+#ifndef FPU_LAZY
 		fpu_context_save(&(THREAD->saved_fpu_context));
+#endif
 		if (!context_save(&THREAD->saved_context)) {
 			/*