Index: kernel/arch/amd64/src/debugger.c =================================================================== --- kernel/arch/amd64/src/debugger.c (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/amd64/src/debugger.c (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -333,7 +333,10 @@ #endif /* CONFIG_KCONSOLE */ - exc_register(VECTOR_DEBUG, "debugger", debug_exception); + exc_register(VECTOR_DEBUG, "debugger", true, + debug_exception); + #ifdef CONFIG_SMP - exc_register(VECTOR_DEBUG_IPI, "debugger_smp", debug_ipi); + exc_register(VECTOR_DEBUG_IPI, "debugger_smp", true, + debug_ipi); #endif /* CONFIG_SMP */ } Index: kernel/arch/amd64/src/interrupt.c =================================================================== --- kernel/arch/amd64/src/interrupt.c (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/amd64/src/interrupt.c (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -199,24 +199,24 @@ void interrupt_init(void) { - int i; + unsigned int i; for (i = 0; i < IVT_ITEMS; i++) - exc_register(i, "null", (iroutine) null_interrupt); + exc_register(i, "null", false, (iroutine_t) null_interrupt); for (i = 0; i < IRQ_COUNT; i++) { if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1)) - exc_register(IVT_IRQBASE + i, "irq", - (iroutine) irq_interrupt); + exc_register(IVT_IRQBASE + i, "irq", true, + (iroutine_t) irq_interrupt); } - exc_register(0, "de_fault", (iroutine) de_fault); - exc_register(7, "nm_fault", (iroutine) nm_fault); - exc_register(12, "ss_fault", (iroutine) ss_fault); - exc_register(13, "gp_fault", (iroutine) gp_fault); - exc_register(14, "ident_mapper", (iroutine) ident_page_fault); + exc_register(0, "de_fault", true, (iroutine_t) de_fault); + exc_register(7, "nm_fault", true, (iroutine_t) nm_fault); + exc_register(12, "ss_fault", true, (iroutine_t) ss_fault); + exc_register(13, "gp_fault", true, (iroutine_t) gp_fault); + exc_register(14, "ident_mapper", true, (iroutine_t) ident_page_fault); #ifdef CONFIG_SMP - exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", - (iroutine) tlb_shootdown_ipi); + exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true, + (iroutine_t) tlb_shootdown_ipi); #endif } Index: kernel/arch/amd64/src/mm/page.c =================================================================== --- kernel/arch/amd64/src/mm/page.c (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/amd64/src/mm/page.c (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -116,7 +116,7 @@ page_table_unlock(AS_KERNEL, true); - exc_register(14, "page_fault", (iroutine) page_fault); + exc_register(14, "page_fault", true, (iroutine_t) page_fault); write_cr3((uintptr_t) AS_KERNEL->genarch.page_table); - } else + } else write_cr3((uintptr_t) AS_KERNEL->genarch.page_table); } Index: kernel/arch/arm32/include/ras.h =================================================================== --- kernel/arch/arm32/include/ras.h (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/arm32/include/ras.h (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -1,4 +1,4 @@ /* - * Copyright (c) 2009 Jakub Jermar + * Copyright (c) 2009 Jakub Jermar * All rights reserved. * @@ -40,11 +40,11 @@ #include -#define RAS_START 0 -#define RAS_END 1 +#define RAS_START 0 +#define RAS_END 1 extern uintptr_t *ras_page; extern void ras_init(void); -extern void ras_check(int, istate_t *); +extern void ras_check(unsigned int, istate_t *); #endif Index: kernel/arch/arm32/src/exc_handler.S =================================================================== --- kernel/arch/arm32/src/exc_handler.S (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/arm32/src/exc_handler.S (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -150,5 +150,5 @@ mov r0, #0 mov r1, r13 - bl ras_check + bl ras_check LOAD_REGS_FROM_STACK @@ -158,5 +158,5 @@ mov r0, #5 mov r1, r13 - bl ras_check + bl ras_check LOAD_REGS_FROM_STACK @@ -166,5 +166,5 @@ mov r0, #6 mov r1, r13 - bl ras_check + bl ras_check LOAD_REGS_FROM_STACK @@ -173,5 +173,5 @@ mov r0, #1 mov r1, r13 - bl ras_check + bl ras_check LOAD_REGS_FROM_STACK @@ -181,5 +181,5 @@ mov r0, #3 mov r1, r13 - bl ras_check + bl ras_check LOAD_REGS_FROM_STACK @@ -189,5 +189,5 @@ mov r0, #4 mov r1, r13 - bl ras_check + bl ras_check LOAD_REGS_FROM_STACK Index: kernel/arch/arm32/src/exception.c =================================================================== --- kernel/arch/arm32/src/exception.c (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/arm32/src/exception.c (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -165,9 +165,12 @@ install_exception_handlers(); - exc_register(EXC_IRQ, "interrupt", (iroutine) irq_exception); - exc_register(EXC_PREFETCH_ABORT, "prefetch abort", - (iroutine) prefetch_abort); - exc_register(EXC_DATA_ABORT, "data abort", (iroutine) data_abort); - exc_register(EXC_SWI, "software interrupt", (iroutine) swi_exception); + exc_register(EXC_IRQ, "interrupt", true, + (iroutine_t) irq_exception); + exc_register(EXC_PREFETCH_ABORT, "prefetch abort", true, + (iroutine_t) prefetch_abort); + exc_register(EXC_DATA_ABORT, "data abort", true, + (iroutine_t) data_abort); + exc_register(EXC_SWI, "software interrupt", true, + (iroutine_t) swi_exception); } Index: kernel/arch/arm32/src/ras.c =================================================================== --- kernel/arch/arm32/src/ras.c (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/arm32/src/ras.c (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -1,4 +1,4 @@ /* - * Copyright (c) 2009 Jakub Jermar + * Copyright (c) 2009 Jakub Jermar * All rights reserved. * @@ -66,5 +66,5 @@ } -void ras_check(int n, istate_t *istate) +void ras_check(unsigned int n, istate_t *istate) { uintptr_t rewrite_pc = istate->pc; Index: kernel/arch/ia32/src/drivers/i8259.c =================================================================== --- kernel/arch/ia32/src/drivers/i8259.c (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/ia32/src/drivers/i8259.c (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -27,5 +27,5 @@ */ -/** @addtogroup ia32 +/** @addtogroup ia32 * @{ */ @@ -76,5 +76,6 @@ * Register interrupt handler for the PIC spurious interrupt. */ - exc_register(VECTOR_PIC_SPUR, "pic_spurious", (iroutine) pic_spurious); + exc_register(VECTOR_PIC_SPUR, "pic_spurious", false, + (iroutine_t) pic_spurious); /* Index: kernel/arch/ia32/src/interrupt.c =================================================================== --- kernel/arch/ia32/src/interrupt.c (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/ia32/src/interrupt.c (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -215,22 +215,24 @@ void interrupt_init(void) { - int i; + unsigned int i; for (i = 0; i < IVT_ITEMS; i++) - exc_register(i, "null", (iroutine) null_interrupt); + exc_register(i, "null", false, (iroutine_t) null_interrupt); for (i = 0; i < IRQ_COUNT; i++) { if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1)) - exc_register(IVT_IRQBASE + i, "irq", (iroutine) irq_interrupt); + exc_register(IVT_IRQBASE + i, "irq", true, + (iroutine_t) irq_interrupt); } - exc_register(0, "de_fault", (iroutine) de_fault); - exc_register(7, "nm_fault", (iroutine) nm_fault); - exc_register(12, "ss_fault", (iroutine) ss_fault); - exc_register(13, "gp_fault", (iroutine) gp_fault); - exc_register(19, "simd_fp", (iroutine) simd_fp_exception); + exc_register(0, "de_fault", true, (iroutine_t) de_fault); + exc_register(7, "nm_fault", true, (iroutine_t) nm_fault); + exc_register(12, "ss_fault", true, (iroutine_t) ss_fault); + exc_register(13, "gp_fault", true, (iroutine_t) gp_fault); + exc_register(19, "simd_fp", true, (iroutine_t) simd_fp_exception); #ifdef CONFIG_SMP - exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", (iroutine) tlb_shootdown_ipi); + exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true, + (iroutine_t) tlb_shootdown_ipi); #endif } Index: kernel/arch/ia32/src/mm/page.c =================================================================== --- kernel/arch/ia32/src/mm/page.c (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/ia32/src/mm/page.c (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -70,5 +70,5 @@ page_table_unlock(AS_KERNEL, true); - exc_register(14, "page_fault", (iroutine) page_fault); + exc_register(14, "page_fault", true, (iroutine_t) page_fault); write_cr3((uintptr_t) AS_KERNEL->genarch.page_table); } else Index: kernel/arch/ia32/src/smp/apic.c =================================================================== --- kernel/arch/ia32/src/smp/apic.c (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/ia32/src/smp/apic.c (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -157,5 +157,6 @@ void apic_init(void) { - exc_register(VECTOR_APIC_SPUR, "apic_spurious", (iroutine) apic_spurious); + exc_register(VECTOR_APIC_SPUR, "apic_spurious", false, + (iroutine_t) apic_spurious); enable_irqs_function = io_apic_enable_irqs; Index: kernel/arch/mips32/src/exception.c =================================================================== --- kernel/arch/mips32/src/exception.c (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/mips32/src/exception.c (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -167,20 +167,31 @@ void exception_init(void) { - int i; + unsigned int i; /* Clear exception table */ for (i = 0; i < IVT_ITEMS; i++) - exc_register(i, "undef", (iroutine) unhandled_exception); + exc_register(i, "undef", false, + (iroutine_t) unhandled_exception); - exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception); - exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception); - exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception); - exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception); - exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception); - exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception); + exc_register(EXC_Bp, "bkpoint", true, + (iroutine_t) breakpoint_exception); + exc_register(EXC_RI, "resinstr", true, + (iroutine_t) reserved_instr_exception); + exc_register(EXC_Mod, "tlb_mod", true, + (iroutine_t) tlbmod_exception); + exc_register(EXC_TLBL, "tlbinvl", true, + (iroutine_t) tlbinv_exception); + exc_register(EXC_TLBS, "tlbinvl", true, + (iroutine_t) tlbinv_exception); + exc_register(EXC_Int, "interrupt", true, + (iroutine_t) interrupt_exception); + #ifdef CONFIG_FPU_LAZY - exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception); + exc_register(EXC_CpU, "cpunus", true, + (iroutine_t) cpuns_exception); #endif - exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception); + + exc_register(EXC_Sys, "syscall", true, + (iroutine_t) syscall_exception); } Index: kernel/arch/ppc32/src/interrupt.c =================================================================== --- kernel/arch/ppc32/src/interrupt.c (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/ppc32/src/interrupt.c (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -101,8 +101,12 @@ void interrupt_init(void) { - exc_register(VECTOR_DATA_STORAGE, "data_storage", pht_refill); - exc_register(VECTOR_INSTRUCTION_STORAGE, "instruction_storage", pht_refill); - exc_register(VECTOR_EXTERNAL, "external", exception_external); - exc_register(VECTOR_DECREMENTER, "timer", exception_decrementer); + exc_register(VECTOR_DATA_STORAGE, "data_storage", true, + pht_refill); + exc_register(VECTOR_INSTRUCTION_STORAGE, "instruction_storage", true, + pht_refill); + exc_register(VECTOR_EXTERNAL, "external", true, + exception_external); + exc_register(VECTOR_DECREMENTER, "timer", true, + exception_decrementer); } Index: kernel/arch/sparc64/include/sparc64.h =================================================================== --- kernel/arch/sparc64/include/sparc64.h (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/sparc64/include/sparc64.h (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -38,5 +38,5 @@ #include -extern void interrupt_register(int n, const char *name, iroutine f); +extern void interrupt_register(unsigned int, const char *, iroutine_t); #endif Index: kernel/arch/sparc64/src/trap/interrupt.c =================================================================== --- kernel/arch/sparc64/src/trap/interrupt.c (revision 8f80c776122ce206c51851f4cac39bcd4a236d9a) +++ kernel/arch/sparc64/src/trap/interrupt.c (revision b3b7e14a1e27b36c3c59ce41e9bc3060bdc881fd) @@ -51,14 +51,16 @@ /** Register Interrupt Level Handler. * - * @param n Interrupt Level (1 - 15). - * @param name Short descriptive string. - * @param f Handler. + * @param n Interrupt Level (1 - 15). + * @param name Short descriptive string. + * @param handler Handler. + * */ -void interrupt_register(int n, const char *name, iroutine f) +void interrupt_register(unsigned int n, const char *name, iroutine_t handler) { ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS); - exc_register(n - 1, name, f); + exc_register(n - IVT_FIRST, name, true, handler); } + /** @} */