Changeset b130d0e in mainline
- Timestamp:
- 2011-10-24T13:17:26Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- b7f7183
- Parents:
- 25f8e5d
- Location:
- uspace/drv/audio/sb16
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/audio/sb16/dma_controller.c
r25f8e5d rb130d0e 168 168 static dma_controller_t controller_8237 = { 169 169 .channels = { 170 /* The first chip */170 /* The first chip 8-bit */ 171 171 { (uint8_t*)0x00, (uint8_t*)0x01, (uint8_t*)0x87, 172 172 (uint8_t*)0x0a, (uint8_t*)0x0b, (uint8_t*)0x0c, }, … … 178 178 (uint8_t*)0x0a, (uint8_t*)0x0b, (uint8_t*)0x0c, }, 179 179 180 /* The second chip */180 /* The second chip 16-bit */ 181 181 { (uint8_t*)0xc0, (uint8_t*)0xc2, (uint8_t*)0x8f, 182 182 (uint8_t*)0xd4, (uint8_t*)0xd6, (uint8_t*)0xd8, }, … … 298 298 return EIO; 299 299 300 dma_channel_t dma_channel = controller_8237.channels[channel];300 const dma_channel_t dma_channel = controller_8237.channels[channel]; 301 301 302 302 /* Mask DMA request */ … … 311 311 | (auto_mode ? DMA_MODE_CHAN_AUTO_FLAG : 0) 312 312 | (mode << DMA_MODE_CHAN_MODE_SHIFT); 313 ddf_log_verbose("Setting mode: %hhx.\n", value);313 ddf_log_verbose("Setting DMA mode: %hhx.\n", value); 314 314 pio_write_8(dma_channel.mode_address, value); 315 315 -
uspace/drv/audio/sb16/mixer.c
r25f8e5d rb130d0e 34 34 #include "mixer.h" 35 35 36 #define CT_MIXER_RESET_ADDRESS 0x0037 38 36 typedef struct channel { 39 37 uint8_t address; … … 186 184 187 185 if (type != SB_MIXER_NONE) { 188 pio_write_8(®s->mixer_address, CT_MIXER_RESET_ADDRESS);186 pio_write_8(®s->mixer_address, MIXER_RESET_ADDRESS); 189 187 pio_write_8(®s->mixer_data, 1); 190 188 sb_mixer_max_master_levels(mixer); 191 189 } 190 pio_write_8(®s->mixer_address, MIXER_PNP_IRQ_ADDRESS); 191 const uint8_t irq = pio_read_8(®s->mixer_data); 192 pio_write_8(®s->mixer_address, MIXER_PNP_DMA_ADDRESS); 193 const uint8_t dma = pio_read_8(®s->mixer_data); 194 ddf_log_debug("SB16 setup with IRQ 0x%hhx and DMA 0x%hhx.\n", irq, dma); 192 195 return EOK; 193 196 } -
uspace/drv/audio/sb16/registers.h
r25f8e5d rb130d0e 44 44 ioport8_t afm_data; 45 45 ioport8_t mixer_address; 46 #define MIXER_IRQ_ADDRESS 0x82 /* The Interrupt Status register, addressed as 47 * register 82h on the Mixer register map p.27 */ 46 #define MIXER_RESET_ADDRESS 0x00 47 #define MIXER_PNP_IRQ_ADDRESS 0x80 48 #define MIXER_PNP_DMA_ADDRESS 0x81 49 #define MIXER_IRQ_STATUS_ADDRESS 0x82 /* The Interrupt Status register, 50 * addressed as register 82h on the 51 * Mixer register map p.27 */ 48 52 ioport8_t mixer_data; 49 53 ioport8_t dsp_reset; -
uspace/drv/audio/sb16/sb16.c
r25f8e5d rb130d0e 107 107 * differently */ 108 108 if (drv->dsp.version.major >= 4) { 109 pio_write_8(&drv->regs->mixer_address, MIXER_IRQ_ ADDRESS);109 pio_write_8(&drv->regs->mixer_address, MIXER_IRQ_STATUS_ADDRESS); 110 110 const uint8_t irq_mask = pio_read_8(&drv->regs->mixer_data); 111 111 ddf_log_debug("SB16 IRQ mask %hhx.\n", irq_mask);
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