Index: arch/sparc64/include/asm.h
===================================================================
--- arch/sparc64/include/asm.h	(revision b87f41860c88213bb9dc599f59adedde6615550b)
+++ arch/sparc64/include/asm.h	(revision b00fdde560b3ef069ecb5aed3e0f1e04f21fe28a)
@@ -108,4 +108,31 @@
 }
 
+/** Load __u64 from alternate space.
+ *
+ * @param asi ASI determining the alternate space.
+ * @param va Virtual address within the ASI.
+ *
+ * @return Value read from the virtual address in the specified address space.
+ */
+static inline __u64 asi_u64_read(asi_t asi, __address va)
+{
+	__u64 v;
+	
+	__asm__ volatile ("ldxa [%1] %2, %0\n" : "=r" (v) : "r" (va), "i" (asi));
+	
+	return v;
+}
+
+/** Store __u64 to alternate space.
+ *
+ * @param asi ASI determining the alternate space.
+ * @param va Virtual address within the ASI.
+ * @param v Value to be written.
+ */
+static inline void asi_u64_write(asi_t asi, __address va, __u64 v)
+{
+	__asm__ volatile ("stxa %0, [%1] %2\n" : :  "r" (v), "r" (va), "i" (asi));
+}
+
 
 void cpu_halt(void);
Index: arch/sparc64/include/barrier.h
===================================================================
--- arch/sparc64/include/barrier.h	(revision b87f41860c88213bb9dc599f59adedde6615550b)
+++ arch/sparc64/include/barrier.h	(revision b00fdde560b3ef069ecb5aed3e0f1e04f21fe28a)
@@ -40,3 +40,5 @@
 #define write_barrier()
 
+#define flush()			__asm__ volatile ("flush\n" ::: "memory")
+
 #endif
Index: arch/sparc64/include/mm/tlb.h
===================================================================
--- arch/sparc64/include/mm/tlb.h	(revision b87f41860c88213bb9dc599f59adedde6615550b)
+++ arch/sparc64/include/mm/tlb.h	(revision b00fdde560b3ef069ecb5aed3e0f1e04f21fe28a)
@@ -31,4 +31,10 @@
 
 #include <arch/mm/tte.h>
+#include <arch/asm.h>
+#include <arch/types.h>
+#include <typedefs.h>
+
+#define ITLB_ENTRY_COUNT		64
+#define DTLB_ENTRY_COUNT		64
 
 /** I-MMU ASIs. */
@@ -71,5 +77,85 @@
 typedef tte_data_t tlb_data_t;
 
-#define tlb_init_arch()
+/** I-/D-TLB Data Access Address in Alternate Space. */
+union tlb_data_access_addr {
+	__u64 value;
+	struct {
+		__u64 : 55;
+		unsigned tlb_entry : 6;
+		unsigned : 3;
+	} __attribute__ ((packed));
+};
+typedef union tlb_data_access_addr tlb_data_access_addr_t;
+typedef union tlb_data_access_addr tlb_tag_read_addr_t;
+
+/** I-/D-TLB Tag Read Register. */
+union tlb_tag_read_reg {
+	__u64 value;
+	struct {
+		__u64 va : 51;		/**< Virtual Address. */
+		unsigned context : 13;	/**< Context identifier. */
+	} __attribute__ ((packed));
+};
+typedef union tlb_tag_read_reg tlb_tag_read_reg_t;
+
+/** Read IMMU TLB Data Access Register.
+ *
+ * @param entry TLB Entry index.
+ *
+ * @return Current value of specified IMMU TLB Data Access Register.
+ */
+static inline __u64 itlb_data_access_read(index_t entry)
+{
+	tlb_data_access_addr_t reg;
+	
+	reg.value = 0;
+	reg.tlb_entry = entry;
+	return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value);
+}
+
+/** Read DMMU TLB Data Access Register.
+ *
+ * @param entry TLB Entry index.
+ *
+ * @return Current value of specified DMMU TLB Data Access Register.
+ */
+static inline __u64 dtlb_data_access_read(index_t entry)
+{
+	tlb_data_access_addr_t reg;
+	
+	reg.value = 0;
+	reg.tlb_entry = entry;
+	return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value);
+}
+
+/** Read IMMU TLB Tag Read Register.
+ *
+ * @param entry TLB Entry index.
+ *
+ * @return Current value of specified IMMU TLB Tag Read Register.
+ */
+static inline __u64 itlb_tag_read(index_t entry)
+{
+	tlb_tag_read_addr_t tag;
+
+	tag.value = 0;
+	tag.tlb_entry =	entry;
+	return asi_u64_read(ASI_ITLB_TAG_READ_REG, tag.value);
+}
+
+/** Read DMMU TLB Tag Read Register.
+ *
+ * @param entry TLB Entry index.
+ *
+ * @return Current value of specified DMMU TLB Tag Read Register.
+ */
+static inline __u64 dtlb_tag_read(index_t entry)
+{
+	tlb_tag_read_addr_t tag;
+
+	tag.value = 0;
+	tag.tlb_entry =	entry;
+	return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value);
+}
 
 #endif
Index: arch/sparc64/include/types.h
===================================================================
--- arch/sparc64/include/types.h	(revision b87f41860c88213bb9dc599f59adedde6615550b)
+++ arch/sparc64/include/types.h	(revision b00fdde560b3ef069ecb5aed3e0f1e04f21fe28a)
@@ -47,3 +47,5 @@
 typedef __u64 pte_t;
 
+typedef __u8 asi_t;
+
 #endif
