Index: HelenOS.config =================================================================== --- HelenOS.config (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ HelenOS.config (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -457,4 +457,7 @@ ! [(CONFIG_HID_IN=generic|CONFIG_HID_IN=serial)&PLATFORM=ia64&MACHINE=i460GX] CONFIG_NS16550 (y/n) +% Support for ARM926 on-chip UART +! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=arm32&MACHINE=integratorcp] CONFIG_ARM926_UART (y/n) + % Support for Samsung S3C24XX on-chip UART ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=arm32&MACHINE=gta02] CONFIG_S3C24XX_UART (y/n) @@ -482,5 +485,5 @@ % Serial line input module -! [CONFIG_DSRLNIN=y|(PLATFORM=arm32&MACHINE=gta02)|(PLATFORM=ia64&MACHINE=i460GX&CONFIG_NS16550=y)|(PLATFORM=ia64&MACHINE=ski)|(PLATFORM=sparc64&PROCESSOR=sun4v)] CONFIG_SRLN (y) +! [CONFIG_DSRLNIN=y|(PLATFORM=arm32&MACHINE=gta02)|(PLATFORM=arm32&MACHINE=integratorcp&CONFIG_ARM926_UART=y)|(PLATFORM=ia64&MACHINE=i460GX&CONFIG_NS16550=y)|(PLATFORM=ia64&MACHINE=ski)|(PLATFORM=sparc64&PROCESSOR=sun4v)] CONFIG_SRLN (y) % EGA support Index: boot/arch/arm32/include/main.h =================================================================== --- boot/arch/arm32/include/main.h (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ boot/arch/arm32/include/main.h (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -52,8 +52,8 @@ /** GXemul testarm serial console output register */ -#define TESTARM_SCONS_ADDR 0x10000000 +#define TESTARM_SCONS_ADDR 0x10000000 /** IntegratorCP serial console output register */ -#define ICP_SCONS_ADDR 0x16000000 +#define ICP_SCONS_ADDR 0x16000000 extern void bootstrap(void); Index: kernel/arch/arm32/src/mach/integratorcp/integratorcp.c =================================================================== --- kernel/arch/arm32/src/mach/integratorcp/integratorcp.c (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ kernel/arch/arm32/src/mach/integratorcp/integratorcp.c (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -38,5 +38,7 @@ #include #include +#include #include +#include #include #include @@ -53,7 +55,15 @@ #include + #define SDRAM_SIZE (sdram[((*(uint32_t *)(ICP_CMCR+ICP_SDRAMCR_OFFSET) & ICP_SDRAM_MASK) >> 2)]) -static icp_hw_map_t icp_hw_map; -static irq_t icp_timer_irq; + +static struct { + icp_hw_map_t hw_map; + irq_t timer_irq; + arm926_uart_t uart; +} icp; + + + struct arm_machine_ops icp_machine_ops = { icp_init, @@ -70,5 +80,4 @@ static bool hw_map_init_called = false; -static bool vga_init = false; uint32_t sdram[8] = { 16777216, /* 16mb */ @@ -89,12 +98,12 @@ void icp_vga_init(void) { - *(uint32_t*)((char *)(icp_hw_map.cmcr)+0x14) = 0xA05F0000; - *(uint32_t*)((char *)(icp_hw_map.cmcr)+0x1C) = 0x12C11000; - *(uint32_t*)icp_hw_map.vga = 0x3F1F3F9C; - *(uint32_t*)((char *)(icp_hw_map.vga) + 0x4) = 0x080B61DF; - *(uint32_t*)((char *)(icp_hw_map.vga) + 0x8) = 0x067F3800; - *(uint32_t*)((char *)(icp_hw_map.vga) + 0x10) = ICP_FB; - *(uint32_t *)((char *)(icp_hw_map.vga) + 0x1C) = 0x182B; - *(uint32_t*)((char *)(icp_hw_map.cmcr)+0xC) = 0x33805000; + *(uint32_t*)((char *)(icp.hw_map.cmcr)+0x14) = 0xA05F0000; + *(uint32_t*)((char *)(icp.hw_map.cmcr)+0x1C) = 0x12C11000; + *(uint32_t*)icp.hw_map.vga = 0x3F1F3F9C; + *(uint32_t*)((char *)(icp.hw_map.vga) + 0x4) = 0x080B61DF; + *(uint32_t*)((char *)(icp.hw_map.vga) + 0x8) = 0x067F3800; + *(uint32_t*)((char *)(icp.hw_map.vga) + 0x10) = ICP_FB; + *(uint32_t *)((char *)(icp.hw_map.vga) + 0x1C) = 0x182B; + *(uint32_t*)((char *)(icp.hw_map.cmcr)+0xC) = 0x33805000; } @@ -103,5 +112,5 @@ static inline uint32_t icp_irqc_get_sources(void) { - return *((uint32_t *) icp_hw_map.irqc); + return *((uint32_t *) icp.hw_map.irqc); } @@ -113,5 +122,5 @@ static inline void icp_irqc_mask(uint32_t irq) { - *((uint32_t *) icp_hw_map.irqc_mask) = (1 << irq); + *((uint32_t *) icp.hw_map.irqc_mask) = (1 << irq); } @@ -123,33 +132,33 @@ static inline void icp_irqc_unmask(uint32_t irq) { - *((uint32_t *) icp_hw_map.irqc_unmask) |= (1 << irq); -} - -/** Initializes icp_hw_map. */ + *((uint32_t *) icp.hw_map.irqc_unmask) |= (1 << irq); +} + +/** Initializes icp.hw_map. */ void icp_init(void) { - icp_hw_map.uart = km_map(ICP_UART, PAGE_SIZE, - PAGE_WRITE | PAGE_NOT_CACHEABLE); - icp_hw_map.kbd_ctrl = km_map(ICP_KBD, PAGE_SIZE, PAGE_NOT_CACHEABLE); - icp_hw_map.kbd_stat = icp_hw_map.kbd_ctrl + ICP_KBD_STAT; - icp_hw_map.kbd_data = icp_hw_map.kbd_ctrl + ICP_KBD_DATA; - icp_hw_map.kbd_intstat = icp_hw_map.kbd_ctrl + ICP_KBD_INTR_STAT; - icp_hw_map.rtc = km_map(ICP_RTC, PAGE_SIZE, - PAGE_WRITE | PAGE_NOT_CACHEABLE); - icp_hw_map.rtc1_load = icp_hw_map.rtc + ICP_RTC1_LOAD_OFFSET; - icp_hw_map.rtc1_read = icp_hw_map.rtc + ICP_RTC1_READ_OFFSET; - icp_hw_map.rtc1_ctl = icp_hw_map.rtc + ICP_RTC1_CTL_OFFSET; - icp_hw_map.rtc1_intrclr = icp_hw_map.rtc + ICP_RTC1_INTRCLR_OFFSET; - icp_hw_map.rtc1_bgload = icp_hw_map.rtc + ICP_RTC1_BGLOAD_OFFSET; - icp_hw_map.rtc1_intrstat = icp_hw_map.rtc + ICP_RTC1_INTRSTAT_OFFSET; - - icp_hw_map.irqc = km_map(ICP_IRQC, PAGE_SIZE, - PAGE_WRITE | PAGE_NOT_CACHEABLE); - icp_hw_map.irqc_mask = icp_hw_map.irqc + ICP_IRQC_MASK_OFFSET; - icp_hw_map.irqc_unmask = icp_hw_map.irqc + ICP_IRQC_UNMASK_OFFSET; - icp_hw_map.cmcr = km_map(ICP_CMCR, PAGE_SIZE, - PAGE_WRITE | PAGE_NOT_CACHEABLE); - icp_hw_map.sdramcr = icp_hw_map.cmcr + ICP_SDRAMCR_OFFSET; - icp_hw_map.vga = km_map(ICP_VGA, PAGE_SIZE, + icp.hw_map.uart = km_map(ICP_UART, PAGE_SIZE, + PAGE_WRITE | PAGE_NOT_CACHEABLE); + icp.hw_map.kbd_ctrl = km_map(ICP_KBD, PAGE_SIZE, PAGE_NOT_CACHEABLE); + icp.hw_map.kbd_stat = icp.hw_map.kbd_ctrl + ICP_KBD_STAT; + icp.hw_map.kbd_data = icp.hw_map.kbd_ctrl + ICP_KBD_DATA; + icp.hw_map.kbd_intstat = icp.hw_map.kbd_ctrl + ICP_KBD_INTR_STAT; + icp.hw_map.rtc = km_map(ICP_RTC, PAGE_SIZE, + PAGE_WRITE | PAGE_NOT_CACHEABLE); + icp.hw_map.rtc1_load = icp.hw_map.rtc + ICP_RTC1_LOAD_OFFSET; + icp.hw_map.rtc1_read = icp.hw_map.rtc + ICP_RTC1_READ_OFFSET; + icp.hw_map.rtc1_ctl = icp.hw_map.rtc + ICP_RTC1_CTL_OFFSET; + icp.hw_map.rtc1_intrclr = icp.hw_map.rtc + ICP_RTC1_INTRCLR_OFFSET; + icp.hw_map.rtc1_bgload = icp.hw_map.rtc + ICP_RTC1_BGLOAD_OFFSET; + icp.hw_map.rtc1_intrstat = icp.hw_map.rtc + ICP_RTC1_INTRSTAT_OFFSET; + + icp.hw_map.irqc = km_map(ICP_IRQC, PAGE_SIZE, + PAGE_WRITE | PAGE_NOT_CACHEABLE); + icp.hw_map.irqc_mask = icp.hw_map.irqc + ICP_IRQC_MASK_OFFSET; + icp.hw_map.irqc_unmask = icp.hw_map.irqc + ICP_IRQC_UNMASK_OFFSET; + icp.hw_map.cmcr = km_map(ICP_CMCR, PAGE_SIZE, + PAGE_WRITE | PAGE_NOT_CACHEABLE); + icp.hw_map.sdramcr = icp.hw_map.cmcr + ICP_SDRAMCR_OFFSET; + icp.hw_map.vga = km_map(ICP_VGA, PAGE_SIZE, PAGE_WRITE | PAGE_NOT_CACHEABLE); @@ -164,7 +173,7 @@ { icp_irqc_mask(ICP_TIMER_IRQ); - *((uint32_t*) icp_hw_map.rtc1_load) = frequency; - *((uint32_t*) icp_hw_map.rtc1_bgload) = frequency; - *((uint32_t*) icp_hw_map.rtc1_ctl) = ICP_RTC_CTL_VALUE; + *((uint32_t*) icp.hw_map.rtc1_load) = frequency; + *((uint32_t*) icp.hw_map.rtc1_bgload) = frequency; + *((uint32_t*) icp.hw_map.rtc1_ctl) = ICP_RTC_CTL_VALUE; icp_irqc_unmask(ICP_TIMER_IRQ); } @@ -172,6 +181,6 @@ static irq_ownership_t icp_timer_claim(irq_t *irq) { - if (icp_hw_map.rtc1_intrstat) { - *((uint32_t*) icp_hw_map.rtc1_intrclr) = 1; + if (icp.hw_map.rtc1_intrstat) { + *((uint32_t*) icp.hw_map.rtc1_intrclr) = 1; return IRQ_ACCEPT; } else @@ -200,11 +209,11 @@ static void icp_timer_irq_init(void) { - irq_initialize(&icp_timer_irq); - icp_timer_irq.devno = device_assign_devno(); - icp_timer_irq.inr = ICP_TIMER_IRQ; - icp_timer_irq.claim = icp_timer_claim; - icp_timer_irq.handler = icp_timer_irq_handler; - - irq_register(&icp_timer_irq); + irq_initialize(&icp.timer_irq); + icp.timer_irq.devno = device_assign_devno(); + icp.timer_irq.inr = ICP_TIMER_IRQ; + icp.timer_irq.claim = icp_timer_claim; + icp.timer_irq.handler = icp_timer_irq_handler; + + irq_register(&icp.timer_irq); } @@ -231,5 +240,5 @@ if (hw_map_init_called) { - *size = (sdram[((*(uint32_t *)icp_hw_map.sdramcr & + *size = (sdram[((*(uint32_t *)icp.hw_map.sdramcr & ICP_SDRAM_MASK) >> 2)]); } else { @@ -286,4 +295,5 @@ { #ifdef CONFIG_FB + static bool vga_init = false; if (!vga_init) { icp_vga_init(); @@ -304,4 +314,9 @@ stdout_wire(fbdev); #endif +#ifdef CONFIG_ARM926_UART + if (arm926_uart_init(&icp.uart, ARM926_UART0_IRQ, + ARM926_UART0_BASE_ADDRESS, sizeof(arm926_uart_regs_t))) + stdout_wire(&icp.uart.outdev); +#endif } @@ -310,7 +325,7 @@ pl050_t *pl050 = malloc(sizeof(pl050_t), FRAME_ATOMIC); - pl050->status = (ioport8_t *)icp_hw_map.kbd_stat; - pl050->data = (ioport8_t *)icp_hw_map.kbd_data; - pl050->ctrl = (ioport8_t *)icp_hw_map.kbd_ctrl; + pl050->status = (ioport8_t *)icp.hw_map.kbd_stat; + pl050->data = (ioport8_t *)icp.hw_map.kbd_data; + pl050->ctrl = (ioport8_t *)icp.hw_map.kbd_ctrl; pl050_instance_t *pl050_instance = pl050_init(pl050, ICP_KBD_IRQ); @@ -335,4 +350,13 @@ ICP_KBD); +#ifdef CONFIG_ARM926_UART + srln_instance_t *srln_instance = srln_init(); + if (srln_instance) { + indev_t *sink = stdin_wire(); + indev_t *srln = srln_wire(srln_instance, sink); + arm926_uart_input_wire(&icp.uart, srln); + icp_irqc_unmask(ARM926_UART0_IRQ); + } +#endif } Index: kernel/genarch/Makefile.inc =================================================================== --- kernel/genarch/Makefile.inc (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ kernel/genarch/Makefile.inc (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -91,4 +91,9 @@ endif +ifeq ($(CONFIG_ARM926_UART),y) + GENARCH_SOURCES += \ + genarch/src/drivers/arm926_uart/arm926_uart.c +endif + ifeq ($(CONFIG_S3C24XX_IRQC),y) GENARCH_SOURCES += \ Index: kernel/genarch/include/drivers/arm926_uart/arm926_uart.h =================================================================== --- kernel/genarch/include/drivers/arm926_uart/arm926_uart.h (revision ac310404db41765a81048fa21177f6268343d8a6) +++ kernel/genarch/include/drivers/arm926_uart/arm926_uart.h (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -0,0 +1,169 @@ +/* + * Copyright (c) 2012 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief ARM926 on-chip UART (PrimeCell UART, PL011) driver. + */ + +#ifndef KERN_S3C24XX_UART_H_ +#define KERN_S3C24XX_UART_H_ + +#include +#include +#include + + +/** ARM926 User Guide ch. 4.8.5 (p. 106 in the pdf) */ +#define ARM926_UART0_BASE_ADDRESS 0x16000000 +#define ARM926_UART1_BASE_ADDRESS 0x16000000 + +/** ARM926 User Guide ch. A.1 (p. 124 in the pdf) */ +#define ARM926_UART0_IRQ 1 +#define ARM926_UART1_IRQ 2 + +/** PrimeCell UART TRM ch. 3.3 (p. 49 in the pdf) */ +typedef struct { + /** UART data register */ + ioport32_t data; +#define ARM926_UART_DATA_DATA_MASK 0xff +#define ARM926_UART_DATA_FE_FLAG (1 << 7) +#define ARM926_UART_DATA_PE_FLAG (1 << 9) +#define ARM926_UART_DATA_BE_FLAG (1 << 10) +#define ARM926_UART_DATA_OE_FLAG (1 << 11) + + union { + /* Same values that are in upper bits of data register*/ + const ioport32_t status; +#define ARM926_UART_STATUS_FE_FLAG (1 << 0) +#define ARM926_UART_STATUS_PE_FLAG (1 << 1) +#define ARM926_UART_STATUS_BE_FLAG (1 << 2) +#define ARM926_UART_STATUS_OE_FLAG (1 << 3) + /* Writing anything clears all errors */ + ioport32_t error_clear; + }; + uint32_t padd0_[4]; + + const ioport32_t flag; +#define ARM926_UART_FLAG_CTS_FLAG (1 << 0) +#define ARM926_UART_FLAG_DSR_FLAG (1 << 1) +#define ARM926_UART_FLAG_DCD_FLAG (1 << 2) +#define ARM926_UART_FLAG_BUSY_FLAG (1 << 3) +#define ARM926_UART_FLAG_RXFE_FLAG (1 << 4) +#define ARM926_UART_FLAG_TXFF_FLAG (1 << 5) +#define ARM926_UART_FLAG_RXFF_FLAG (1 << 6) +#define ARM926_UART_FLAG_TXFE_FLAG (1 << 7) +#define ARM926_UART_FLAG_RI_FLAG (1 << 8) + uint32_t padd1_; + + ioport32_t irda_low_power; +#define ARM926_UART_IRDA_LOW_POWER_MASK 0xff + + ioport32_t int_baud_divisor; +#define ARM926_UART_INT_BAUD_DIVISOR_MASK 0xffff + + ioport32_t fract_baud_divisor; +#define ARM926_UART_FRACT_BAUD_DIVISOR_MASK 0x1f + + ioport32_t line_control_high; +#define ARM926_UART_CONTROLHI_BRK_FLAG (1 << 0) +#define ARM926_UART_CONTROLHI_PEN_FLAG (1 << 1) +#define ARM926_UART_CONTROLHI_EPS_FLAG (1 << 2) +#define ARM926_UART_CONTROLHI_STP2_FLAG (1 << 3) +#define ARM926_UART_CONTROLHI_FEN_FLAG (1 << 4) +#define ARM926_UART_CONTROLHI_WLEN_MASK 0x3 +#define ARM926_UART_CONTROLHI_WLEN_SHIFT 5 +#define ARM926_UART_CONTROLHI_SPS_FLAG (1 << 5) + + ioport32_t control; +#define ARM926_UART_CONTROL_UARTEN_FLAG (1 << 0) +#define ARM926_UART_CONTROL_SIREN_FLAG (1 << 1) +#define ARM926_UART_CONTROL_SIRLP_FLAG (1 << 2) +#define ARM926_UART_CONTROL_LBE_FLAG (1 << 7) +#define ARM926_UART_CONTROL_TXE_FLAG (1 << 8) +#define ARM926_UART_CONTROL_RXE_FLAG (1 << 9) +#define ARM926_UART_CONTROL_DTR_FLAG (1 << 10) +#define ARM926_UART_CONTROL_RTS_FLAG (1 << 11) +#define ARM926_UART_CONTROL_OUT1_FLAG (1 << 12) +#define ARM926_UART_CONTROL_OUT2_FLAG (1 << 13) +#define ARM926_UART_CONTROL_RTSE_FLAG (1 << 14) +#define ARM926_UART_CONTROL_CTSE_FLAG (1 << 15) + + ioport32_t interrupt_fifo; +#define ARM926_UART_INTERRUPTFIFO_TX_MASK 0x7 +#define ARM926_UART_INTERRUPTFIFO_TX_SHIFT 0 +#define ARM926_UART_INTERRUPTFIFO_RX_MASK 0x7 +#define ARM926_UART_INTERRUPTFIFO_RX_SHIFT 3 + + /** Interrupt mask register */ + ioport32_t interrupt_mask; + /** Pending interrupts before applying the mask */ + const ioport32_t raw_interrupt_status; + /** Pending interrupts after applying the mask */ + const ioport32_t masked_interrupt_status; + /** Write 1s to clear pending interrupts */ + ioport32_t interrupt_clear; +#define ARM926_UART_INTERRUPT_RIM_FLAG (1 << 0) +#define ARM926_UART_INTERRUPT_CTSM_FLAG (1 << 1) +#define ARM926_UART_INTERRUPT_DCDM_FLAG (1 << 2) +#define ARM926_UART_INTERRUPT_DSRM_FLAG (1 << 3) +#define ARM926_UART_INTERRUPT_RX_FLAG (1 << 4) +#define ARM926_UART_INTERRUPT_TX_FLAG (1 << 5) +#define ARM926_UART_INTERRUPT_RT_FLAG (1 << 6) +#define ARM926_UART_INTERRUPT_FE_FLAG (1 << 7) +#define ARM926_UART_INTERRUPT_PE_FLAG (1 << 8) +#define ARM926_UART_INTERRUPT_BE_FLAG (1 << 9) +#define ARM926_UART_INTERRUPT_OE_FLAG (1 << 10) +#define ARM926_UART_INTERRUPT_ALL 0x3ff + + ioport32_t dma_control; +#define ARM926_UART_DMACONTROL_RXDMAEN_FLAG (1 << 0) +#define ARM926_UART_DMACONTROL_TXDMAEN_FLAG (1 << 1) +#define ARM926_UART_DMACONTROL_DMAONERR_FLAG (1 << 2) + + // TODO There is some reserved space here followed by + // peripheral identification registers. +} arm926_uart_regs_t; + +typedef struct { + arm926_uart_regs_t *regs; + indev_t *indev; + outdev_t outdev; + irq_t irq; +} arm926_uart_t; + +bool arm926_uart_init(arm926_uart_t *, inr_t, uintptr_t, size_t); +void arm926_uart_input_wire(arm926_uart_t *, indev_t *); + +#endif +/** + * @} + */ Index: kernel/genarch/src/drivers/arm926_uart/arm926_uart.c =================================================================== --- kernel/genarch/src/drivers/arm926_uart/arm926_uart.c (revision ac310404db41765a81048fa21177f6268343d8a6) +++ kernel/genarch/src/drivers/arm926_uart/arm926_uart.c (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -0,0 +1,140 @@ +/* + * Copyright (c) 2012 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief ARM926 on-chip UART (PrimeCell UART, PL011) driver. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void arm926_uart_sendb(arm926_uart_t *uart, uint8_t byte) +{ + /* Wait for space becoming available in Tx FIFO. */ + // TODO make pio_read accept consts pointers and remove the cast + while ((pio_read_32((ioport32_t*)&uart->regs->flag) & ARM926_UART_FLAG_TXFF_FLAG) != 0) + ; + + pio_write_32(&uart->regs->data, byte); +} + +static void arm926_uart_putchar(outdev_t *dev, wchar_t ch) +{ + arm926_uart_t *uart = dev->data; + + if (!ascii_check(ch)) { + arm926_uart_sendb(uart, U_SPECIAL); + } else { + if (ch == '\n') + arm926_uart_sendb(uart, (uint8_t) '\r'); + arm926_uart_sendb(uart, (uint8_t) ch); + } +} + +static outdev_operations_t arm926_uart_ops = { + .write = arm926_uart_putchar, + .redraw = NULL, +}; + +static irq_ownership_t arm926_uart_claim(irq_t *irq) +{ + return IRQ_ACCEPT; +} + +static void arm926_uart_irq_handler(irq_t *irq) +{ + arm926_uart_t *uart = irq->instance; + + // TODO make pio_read accept consts pointers and remove the cast + while ((pio_read_32((ioport32_t*)&uart->regs->flag) & ARM926_UART_FLAG_RXFE_FLAG) == 0) { + /* We ignore all error flags here */ + const uint8_t data = pio_read_32(&uart->regs->data); + if (uart->indev) + indev_push_character(uart->indev, data); + } + /* Ack interrupts */ + pio_write_32(&uart->regs->interrupt_clear, ARM926_UART_INTERRUPT_ALL); +} + +bool arm926_uart_init( + arm926_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size) +{ + ASSERT(uart); + uart->regs = (void*)km_map(addr, size, PAGE_NOT_CACHEABLE); + + ASSERT(uart->regs); + + /* Enable hw flow control */ + uart->regs->control = 0 | + ARM926_UART_CONTROL_UARTEN_FLAG | + ARM926_UART_CONTROL_RTSE_FLAG | + ARM926_UART_CONTROL_CTSE_FLAG; + + /* Mask all interrupts */ + uart->regs->interrupt_mask = ARM926_UART_INTERRUPT_ALL; + + outdev_initialize("arm926_uart_dev", &uart->outdev, &arm926_uart_ops); + uart->outdev.data = uart; + + /* Initialize IRQ */ + irq_initialize(&uart->irq); + uart->irq.devno = device_assign_devno(); + uart->irq.inr = interrupt; + uart->irq.claim = arm926_uart_claim; + uart->irq.handler = arm926_uart_irq_handler; + uart->irq.instance = uart; + + return true; +} + +void arm926_uart_input_wire(arm926_uart_t *uart, indev_t *indev) +{ + ASSERT(uart); + ASSERT(indev); + + uart->indev = indev; + irq_register(&uart->irq); + /* Enable receive interrupt */ + uart->regs->interrupt_mask &= ~ARM926_UART_INTERRUPT_RX_FLAG; +} + +/** @} + */ + Index: uspace/lib/c/generic/tls.c =================================================================== --- uspace/lib/c/generic/tls.c (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ uspace/lib/c/generic/tls.c (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -42,4 +42,5 @@ #include #include +#include /** Create TLS (Thread Local Storage) data structures. @@ -57,4 +58,6 @@ tcb = __alloc_tls(&data, tls_size); + if (!tcb) + return NULL; /* @@ -89,5 +92,8 @@ result = malloc(sizeof(tcb_t) + size); + if (!result) + return NULL; *data = ((void *)result) + sizeof(tcb_t); + return result; } @@ -118,5 +124,6 @@ size = ALIGN_UP(size, &_tls_alignment); *data = memalign((uintptr_t) &_tls_alignment, sizeof(tcb_t) + size); - + if (!*data) + return NULL; tcb = (tcb_t *) (*data + size); tcb->self = tcb; Index: uspace/srv/fs/udf/udf_cksum.c =================================================================== --- uspace/srv/fs/udf/udf_cksum.c (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ uspace/srv/fs/udf/udf_cksum.c (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -73,17 +73,4 @@ }; -/** Calculate CRC16 - * - */ -uint16_t udf_cksum(uint8_t *buf, size_t len) -{ - uint16_t crc = 0; - - while (len-- > 0) - crc = crc_table[(crc >> 8 ^ *buf++) & 0xff] ^ (crc << 8); - - return crc; -} - /** Unicode checksum * @@ -103,24 +90,4 @@ return crc; -} - -/** EA checksum - * - * Calculate a 16-bit checksum of the Implementation Use - * Extended Attribute header or Application Use Extended Attribute - * header. The fields AttributeType through ImplementationIdentifier - * (or ApplicationIdentifier) inclusively represent the - * data covered by the checksum (48 bytes). - * - */ -uint16_t udf_ea_cksum(uint8_t *data) -{ - uint16_t checksum = 0; - size_t count; - - for (count = 0; count < 48; count++) - checksum += *data++; - - return checksum; } Index: uspace/srv/fs/udf/udf_cksum.h =================================================================== --- uspace/srv/fs/udf/udf_cksum.h (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ uspace/srv/fs/udf/udf_cksum.h (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -39,7 +39,5 @@ #define UDF_TAG_SIZE 16 -extern uint16_t udf_cksum(uint8_t *, size_t); extern uint16_t udf_unicode_cksum(uint16_t *, size_t); -extern uint16_t udf_ea_cksum(uint8_t *); extern uint8_t udf_tag_checksum(uint8_t *); Index: uspace/srv/fs/udf/udf_file.c =================================================================== --- uspace/srv/fs/udf/udf_file.c (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ uspace/srv/fs/udf/udf_file.c (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -57,5 +57,5 @@ * */ -int udf_read_extended_allocator(udf_node_t *node, uint16_t icb_flag, +static int udf_read_extended_allocator(udf_node_t *node, uint16_t icb_flag, uint32_t pos) { @@ -185,5 +185,5 @@ */ if (FLE32(long_d->length) >> 30 == 3) { - udf_read_extended_allocator (node, icb_flag, pos_long_ad); + udf_read_extended_allocator(node, icb_flag, pos_long_ad); break; } @@ -296,116 +296,4 @@ } -/** Read ICB sequence of allocators in Unallocated space entry descriptor - * - * This function read ICB sequence if free space is saved by space table. - * Not finished. - * - * @param uased Unallocated space entry descriptor - * @param icb_flag Type of allocators in sequence. - * According to ECMA 167 4/14.8.8 - * @param start_alloc Offset of the allocator - * @param len Length of sequence - * - * @return EOK on success or a negative error code. - * - */ -int udf_read_free_space(uint8_t *uased, uint16_t icb_flag, - uint32_t start_alloc, uint32_t len) -{ - switch (icb_flag) { - case UDF_SHORT_AD: - log_msg(LVL_DEBUG, - "UAICB: sequence of allocation descriptors - icbflag = short_ad_t"); - - /* Identify number of current partition */ - - size_t cnt = len / sizeof(udf_short_ad_t); - size_t n = 0; - - while (n < cnt) { - udf_short_ad_t *short_d = - (udf_short_ad_t *) (uased + start_alloc + n * sizeof(udf_short_ad_t)); - - if (short_d->length == 0) - break; - - n++; - } - - break; - - case UDF_LONG_AD: - log_msg(LVL_DEBUG, - "UAICB: sequence of allocation descriptors - icbflag = long_ad_t"); - - cnt = len / sizeof(udf_long_ad_t); - n = 0; - - while (n < cnt) { - udf_long_ad_t *long_d = - (udf_long_ad_t *) (uased + start_alloc + n * sizeof(udf_long_ad_t)); - - if (long_d->length == 0) - break; - - n++; - } - - break; - - case UDF_EXTENDED_AD: - log_msg(LVL_DEBUG, - "UAICB: sequence of allocation descriptors - icbflag = extended_ad_t"); - break; - - case UDF_DATA_AD: - log_msg(LVL_DEBUG, - "UAICB: sequence of allocation descriptors - icbflag = 3, node contains data itself"); - break; - } - - return EOK; -} - -/** Read Unallocated space entry descriptor - * - * Read ICB sequence if free space is saved by space table. - * Not finished. - * - */ -int udf_read_unallocated_space_entry(udf_instance_t * instance, uint64_t pos, - uint32_t len) -{ - block_t *block = NULL; - int rc = block_get(&block, instance->service_id, pos, BLOCK_FLAGS_NONE); - if (rc != EOK) - return rc; - - udf_descriptor_tag_t *desc = (udf_descriptor_tag_t *) block->data; - if (desc->checksum != udf_tag_checksum((uint8_t *) desc)) { - block_put(block); - return EINVAL; - } - - if (FLE16(desc->id) != UDF_UASPACE_ENTRY) { - // FIXME: Memory leak - return EINVAL; - } - - udf_unallocated_space_entry_descriptor_t *uased = - (udf_unallocated_space_entry_descriptor_t *) block->data; - if (uased->icbtag.file_type != UDF_ICBTYPE_UASE) { - // FIXME: Memory leak - return EINVAL; - } - - uint16_t icb_flag = uased->icbtag.flags & UDF_ICBFLAG_MASK; - - rc = udf_read_free_space((uint8_t *) uased, icb_flag, - UDF_UASE_OFFSET, uased->ad_lenght); - - return block_put(block); -} - /** Read data from disk - filling UDF node by allocators * @@ -419,23 +307,4 @@ node->link_cnt = 1; return udf_read_icb(node); -} - -/** Read directory entry - * - * @param fid Returned value - * @param block Returned value - * @param node UDF node - * @param pos Number of FID which we need to find - * - * @return EOK on success or a negative error code. - * - */ -int udf_get_fid(udf_file_identifier_descriptor_t **fid, block_t **block, - udf_node_t *node, aoff64_t pos) -{ - if (node->data == NULL) - return udf_get_fid_in_allocator(fid, block, node, pos); - - return udf_get_fid_in_data(fid, node, pos); } @@ -449,5 +318,5 @@ * */ -int udf_get_fid_in_data(udf_file_identifier_descriptor_t **fid, +static int udf_get_fid_in_data(udf_file_identifier_descriptor_t **fid, udf_node_t *node, aoff64_t pos) { @@ -488,4 +357,23 @@ return ENOENT; +} + +/** Read directory entry + * + * @param fid Returned value + * @param block Returned value + * @param node UDF node + * @param pos Number of FID which we need to find + * + * @return EOK on success or a negative error code. + * + */ +int udf_get_fid(udf_file_identifier_descriptor_t **fid, block_t **block, + udf_node_t *node, aoff64_t pos) +{ + if (node->data == NULL) + return udf_get_fid_in_allocator(fid, block, node, pos); + + return udf_get_fid_in_data(fid, node, pos); } Index: uspace/srv/fs/udf/udf_file.h =================================================================== --- uspace/srv/fs/udf/udf_file.h (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ uspace/srv/fs/udf/udf_file.h (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -197,10 +197,7 @@ extern int udf_read_allocation_sequence(udf_node_t *, uint8_t *, uint16_t, uint32_t, uint32_t); -extern int udf_read_extended_allocator(udf_node_t *, uint16_t, uint32_t); extern int udf_read_file(size_t *, ipc_callid_t, udf_node_t *, aoff64_t, size_t); extern int udf_get_fid(udf_file_identifier_descriptor_t **, block_t **, - udf_node_t *, aoff64_t); -extern int udf_get_fid_in_data(udf_file_identifier_descriptor_t **, udf_node_t *, aoff64_t); extern int udf_get_fid_in_allocator(udf_file_identifier_descriptor_t **, @@ -208,7 +205,4 @@ extern int udf_get_fid_in_sector(udf_file_identifier_descriptor_t **, block_t **, udf_node_t *, aoff64_t, size_t *, void **, size_t *); -extern int udf_read_free_space(uint8_t *, uint16_t, uint32_t, uint32_t); -extern int udf_read_unallocated_space_entry(udf_instance_t *, uint64_t, - uint32_t); #endif /* UDF_FILE_H_ */ Index: uspace/srv/fs/udf/udf_osta.c =================================================================== --- uspace/srv/fs/udf/udf_osta.c (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ uspace/srv/fs/udf/udf_osta.c (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -96,6 +96,6 @@ * */ -size_t udf_uncompress_unicode(size_t number_of_bytes, uint8_t *udf_compressed, - uint16_t *unicode, size_t unicode_max_len) +static size_t udf_uncompress_unicode(size_t number_of_bytes, + uint8_t *udf_compressed, uint16_t *unicode, size_t unicode_max_len) { /* Use udf_compressed to store current byte being read. */ @@ -129,54 +129,4 @@ return unicode_idx; -} - -/** Convert Unicode wide characters to OSTA CS0 compressed Unicode string. - * - * The Unicode MUST be in the byte order of the compiler in order - * to obtain correct results. Returns an error if the compression ID - * is invalid. - * - * NOTE: This routine assumes the implementation already knows, - * by the local environment, how many bits are appropriate and therefore - * does no checking to test if the input characters fit into that number - * of bits or not. - * - * @param[in] number_of_chars Number of unicode characters. - * @param[in] comp_id Compression ID to be used. - * @param[in] unicode Unicode characters to compress. - * @param[out] udf_compressed Compressed string, as bytes. - * - * @return The total number of bytes in the compressed OSTA CS0 string, - * including the compression ID. - * - */ -size_t udf_compress_unicode(size_t number_of_chars, uint8_t comp_id, - uint16_t *unicode, uint8_t *udf_compressed) -{ - if ((comp_id != 8) && (comp_id != 16)) - return 0; - - /* Place compression code in first byte. */ - udf_compressed[0] = comp_id; - - size_t byte_idx = 1; - size_t unicode_idx = 0; - - while (unicode_idx < number_of_chars) { - if (comp_id == 16) { - /* - * First, place the high bits of the char - * into the byte stream. - */ - udf_compressed[byte_idx++] = - (unicode[unicode_idx] & 0xFF00) >> 8; - } - - /* Then place the low bits into the stream. */ - udf_compressed[byte_idx++] = unicode[unicode_idx] & 0x00FF; - unicode_idx++; - } - - return byte_idx; } Index: uspace/srv/fs/udf/udf_osta.h =================================================================== --- uspace/srv/fs/udf/udf_osta.h (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ uspace/srv/fs/udf/udf_osta.h (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -52,6 +52,4 @@ #define PERIOD 0x002E -extern size_t udf_uncompress_unicode(size_t, uint8_t *, uint16_t *, size_t); -extern size_t udf_compress_unicode(size_t, uint8_t, uint16_t *, uint8_t *); extern size_t udf_translate_name(uint16_t *, uint16_t *, size_t); extern void udf_to_unix_name(char *, size_t, char *, size_t, udf_charspec_t *); Index: uspace/srv/fs/udf/udf_types.h =================================================================== --- uspace/srv/fs/udf/udf_types.h (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ uspace/srv/fs/udf/udf_types.h (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -142,6 +142,4 @@ } __attribute__((packed)) udf_unallocated_space_descriptor_t; -extern void udf_prepare_tag(udf_descriptor_tag_t *); - #endif Index: uspace/srv/fs/udf/udf_volume.c =================================================================== --- uspace/srv/fs/udf/udf_volume.c (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ uspace/srv/fs/udf/udf_volume.c (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -151,5 +151,5 @@ * */ -void udf_prepare_tag(udf_descriptor_tag_t *tag) +static void udf_prepare_tag(udf_descriptor_tag_t *tag) { GET_LE16(tag->id); @@ -159,4 +159,39 @@ GET_LE16(tag->descriptor_crc_length); GET_LE32(tag->location); +} + +/** Read AVD by using one of default sector size from array + * + * @param service_id + * @param avd Returned value - Anchor Volume Descriptor + * @param sector_size Expected sector size + * + * @return EOK on success or a negative error code. + * + */ +static int udf_get_anchor_volume_descriptor_by_ssize(service_id_t service_id, + udf_anchor_volume_descriptor_t *avd, uint32_t sector_size) +{ + int rc = block_read_bytes_direct(service_id, + UDF_AVDP_SECTOR * sector_size, + sizeof(udf_anchor_volume_descriptor_t), avd); + if (rc != EOK) + return rc; + + if (avd->tag.checksum != udf_tag_checksum((uint8_t *) &avd->tag)) + return EINVAL; + + // TODO: Should be tested in big-endian mode + udf_prepare_tag(&avd->tag); + + if (avd->tag.id != UDF_TAG_AVDP) + return EINVAL; + + GET_LE32(avd->main_extent.length); + GET_LE32(avd->main_extent.location); + GET_LE32(avd->reserve_extent.length); + GET_LE32(avd->reserve_extent.location); + + return EOK; } @@ -200,39 +235,4 @@ return EINVAL; -} - -/** Read AVD by using one of default sector size from array - * - * @param service_id - * @param avd Returned value - Anchor Volume Descriptor - * @param sector_size Expected sector size - * - * @return EOK on success or a negative error code. - * - */ -int udf_get_anchor_volume_descriptor_by_ssize(service_id_t service_id, - udf_anchor_volume_descriptor_t *avd, uint32_t sector_size) -{ - int rc = block_read_bytes_direct(service_id, - UDF_AVDP_SECTOR * sector_size, - sizeof(udf_anchor_volume_descriptor_t), avd); - if (rc != EOK) - return rc; - - if (avd->tag.checksum != udf_tag_checksum((uint8_t *) &avd->tag)) - return EINVAL; - - // TODO: Should be tested in BegEndian mode - udf_prepare_tag(&avd->tag); - - if (avd->tag.id != UDF_TAG_AVDP) - return EINVAL; - - GET_LE32(avd->main_extent.length); - GET_LE32(avd->main_extent.location); - GET_LE32(avd->reserve_extent.length); - GET_LE32(avd->reserve_extent.location); - - return EOK; } Index: uspace/srv/fs/udf/udf_volume.h =================================================================== --- uspace/srv/fs/udf/udf_volume.h (revision 85f7369aa7a378fe5b780d408f8290b7f07f2afe) +++ uspace/srv/fs/udf/udf_volume.h (revision ac310404db41765a81048fa21177f6268343d8a6) @@ -215,6 +215,4 @@ extern int udf_get_anchor_volume_descriptor(service_id_t, udf_anchor_volume_descriptor_t *); -extern int udf_get_anchor_volume_descriptor_by_ssize(service_id_t, - udf_anchor_volume_descriptor_t *, uint32_t); extern int udf_read_volume_descriptor_sequence(service_id_t, udf_extent_t); extern fs_index_t udf_long_ad_to_pos(udf_instance_t *, udf_long_ad_t *);