- Timestamp:
- 2013-08-19T17:23:31Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 4da8fdb
- Parents:
- 2921602 (diff), 4a9728ec (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Location:
- uspace
- Files:
-
- 58 added
- 23 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/Makefile
r2921602 rab92305 49 49 app/klog \ 50 50 app/loc \ 51 app/mixerctl \ 51 52 app/logset \ 52 53 app/mkfat \ … … 75 76 app/sysinfo \ 76 77 app/mkbd \ 78 app/wavplay \ 77 79 app/date \ 78 80 app/websrv \ 81 srv/audio/hound \ 79 82 app/vdemo \ 80 83 app/vlaunch \ … … 116 119 srv/hid/remcons \ 117 120 srv/hw/char/s3c24xx_uart \ 121 drv/audio/sb16 \ 118 122 drv/infrastructure/root \ 119 123 drv/infrastructure/rootvirt \ … … 215 219 lib/softfloat \ 216 220 lib/drv \ 221 lib/hound \ 217 222 lib/graph \ 218 223 lib/gui \ … … 227 232 lib/usbhid \ 228 233 lib/usbvirt \ 234 lib/pcm \ 229 235 lib/bithenge \ 230 236 lib/posix -
uspace/Makefile.common
r2921602 rab92305 131 131 132 132 LIBDRV_PREFIX = $(LIB_PREFIX)/drv 133 LIBHOUND_PREFIX = $(LIB_PREFIX)/hound 134 LIBPCM_PREFIX = $(LIB_PREFIX)/pcm 133 135 LIBNET_PREFIX = $(LIB_PREFIX)/net 134 136 LIBNIC_PREFIX = $(LIB_PREFIX)/nic -
uspace/app/init/init.c
r2921602 rab92305 392 392 rc = console(HID_INPUT, HID_OUTPUT); 393 393 if (rc == EOK) { 394 getterm("term/vc0", "/app/bdsh", true); 395 getterm("term/vc1", "/app/bdsh", false); 396 getterm("term/vc2", "/app/bdsh", false); 397 getterm("term/vc3", "/app/bdsh", false); 398 getterm("term/vc4", "/app/bdsh", false); 399 getterm("term/vc5", "/app/bdsh", false); 394 #ifndef CONFIG_VC_COUNT 395 #define CONFIG_VC_COUNT 6 396 #endif 397 switch((unsigned)CONFIG_VC_COUNT) { 398 default: 399 case 6: getterm("term/vc5", "/app/bdsh", false); 400 case 5: getterm("term/vc4", "/app/bdsh", false); 401 case 4: getterm("term/vc3", "/app/bdsh", false); 402 case 3: getterm("term/vc2", "/app/bdsh", false); 403 case 2: getterm("term/vc1", "/app/bdsh", false); 404 case 1: getterm("term/vc0", "/app/bdsh", true); 405 } 406 #ifdef CONFIG_KERNEL_LOG_VC_6 400 407 getterm("term/vc6", "/app/klog", false); 408 #endif 401 409 } 402 410 } 411 srv_start("/srv/hound"); 403 412 404 413 return 0; -
uspace/drv/bus/isa/i8237.c
r2921602 rab92305 38 38 #include <stdbool.h> 39 39 #include <errno.h> 40 #include <ddi.h> 41 #include <ddf/log.h> 40 42 #include <fibril_synch.h> 41 43 #include <ddi.h> … … 198 200 .channels = { 199 201 /* The first chip 8-bit */ 200 { 201 (uint8_t *) 0x00,202 (uint8_t *) 0x01,203 (uint8_t *) 0x87,204 (uint8_t *) 0x0a,205 (uint8_t *) 0x0b,206 (uint8_t *) 0x0c,207 }, 208 { 209 (uint8_t *) 0x02,210 (uint8_t *) 0x03,211 (uint8_t *) 0x83,212 (uint8_t *) 0x0a,213 (uint8_t *) 0x0b,214 (uint8_t *) 0x0c,215 }, 216 { 217 (uint8_t *) 0x04,218 (uint8_t *) 0x05,219 (uint8_t *) 0x81,220 (uint8_t *) 0x0a,221 (uint8_t *) 0x0b,222 (uint8_t *) 0x0c,223 }, 224 { 225 (uint8_t *) 0x06,226 (uint8_t *) 0x07,227 (uint8_t *) 0x82,228 (uint8_t *) 0x0a,229 (uint8_t *) 0x0b,230 (uint8_t *) 0x0c,202 { /* Channel 0 - Unusable*/ 203 .offset_reg_address = (uint8_t *) 0x00, 204 .size_reg_address = (uint8_t *) 0x01, 205 .page_reg_address = (uint8_t *) 0x87, 206 .single_mask_address = (uint8_t *) 0x0a, 207 .mode_address = (uint8_t *) 0x0b, 208 .flip_flop_address = (uint8_t *) 0x0c, 209 }, 210 { /* Channel 1 */ 211 .offset_reg_address = (uint8_t *) 0x02, 212 .size_reg_address = (uint8_t *) 0x03, 213 .page_reg_address = (uint8_t *) 0x83, 214 .single_mask_address = (uint8_t *) 0x0a, 215 .mode_address = (uint8_t *) 0x0b, 216 .flip_flop_address = (uint8_t *) 0x0c, 217 }, 218 { /* Channel 2 */ 219 .offset_reg_address = (uint8_t *) 0x04, 220 .size_reg_address = (uint8_t *) 0x05, 221 .page_reg_address = (uint8_t *) 0x81, 222 .single_mask_address = (uint8_t *) 0x0a, 223 .mode_address = (uint8_t *) 0x0b, 224 .flip_flop_address = (uint8_t *) 0x0c, 225 }, 226 { /* Channel 3 */ 227 .offset_reg_address = (uint8_t *) 0x06, 228 .size_reg_address = (uint8_t *) 0x07, 229 .page_reg_address = (uint8_t *) 0x82, 230 .single_mask_address = (uint8_t *) 0x0a, 231 .mode_address = (uint8_t *) 0x0b, 232 .flip_flop_address = (uint8_t *) 0x0c, 231 233 }, 232 234 233 235 /* The second chip 16-bit */ 234 { 235 (uint8_t *) 0xc0,236 (uint8_t *) 0xc2,237 (uint8_t *) 0x8f,238 (uint8_t *) 0xd4,239 (uint8_t *) 0xd6,240 (uint8_t *) 0xd8,241 }, 242 { 243 (uint8_t *) 0xc4,244 (uint8_t *) 0xc6,245 (uint8_t *) 0x8b,246 (uint8_t *) 0xd4,247 (uint8_t *) 0xd6,248 (uint8_t *) 0xd8,249 }, 250 { 251 (uint8_t *) 0xc8,252 (uint8_t *) 0xca,253 (uint8_t *) 0x89,254 (uint8_t *) 0xd4,255 (uint8_t *) 0xd6,256 (uint8_t *) 0xd8,257 }, 258 { 259 (uint8_t *) 0xcc,260 (uint8_t *) 0xce,261 (uint8_t *) 0x8a,262 (uint8_t *) 0xd4,263 (uint8_t *) 0xd6,264 (uint8_t *) 0xd8,236 { /* Channel 4 - Unusable */ 237 .offset_reg_address = (uint8_t *) 0xc0, 238 .size_reg_address = (uint8_t *) 0xc2, 239 .page_reg_address = (uint8_t *) 0x8f, 240 .single_mask_address = (uint8_t *) 0xd4, 241 .mode_address = (uint8_t *) 0xd6, 242 .flip_flop_address = (uint8_t *) 0xd8, 243 }, 244 { /* Channel 5 */ 245 .offset_reg_address = (uint8_t *) 0xc4, 246 .size_reg_address = (uint8_t *) 0xc6, 247 .page_reg_address = (uint8_t *) 0x8b, 248 .single_mask_address = (uint8_t *) 0xd4, 249 .mode_address = (uint8_t *) 0xd6, 250 .flip_flop_address = (uint8_t *) 0xd8, 251 }, 252 { /* Channel 6 */ 253 .offset_reg_address = (uint8_t *) 0xc8, 254 .size_reg_address = (uint8_t *) 0xca, 255 .page_reg_address = (uint8_t *) 0x89, 256 .single_mask_address = (uint8_t *) 0xd4, 257 .mode_address = (uint8_t *) 0xd6, 258 .flip_flop_address = (uint8_t *) 0xd8, 259 }, 260 { /* Channel 7 */ 261 .offset_reg_address = (uint8_t *) 0xcc, 262 .size_reg_address = (uint8_t *) 0xce, 263 .page_reg_address = (uint8_t *) 0x8a, 264 .single_mask_address = (uint8_t *) 0xd4, 265 .mode_address = (uint8_t *) 0xd6, 266 .flip_flop_address = (uint8_t *) 0xd8, 265 267 }, 266 268 }, … … 272 274 }; 273 275 274 /* Initialize I/O access to DMA controller I/O ports.276 /** Initialize I/O access to DMA controller I/O ports. 275 277 * 276 278 * @param controller DMA Controller structure to initialize. 277 279 * 278 280 * @return Error code. 279 *280 281 */ 281 282 static inline int dma_controller_init(dma_controller_t *controller) … … 304 305 305 306 return EOK; 307 } 308 309 /** Helper function. Channels 4,5,6, and 7 are 8 bit DMA. 310 * @pram channel DMA channel. 311 * @reutrn True, if channel is 4,5,6, or 7, false otherwise. 312 */ 313 static inline bool is_dma16(unsigned channel) 314 { 315 return (channel >= 4) && (channel < 8); 316 } 317 318 /** Helper function. Channels 0,1,2, and 3 are 8 bit DMA. 319 * @pram channel DMA channel. 320 * @reutrn True, if channel is 0,1,2, or 3, false otherwise. 321 */ 322 static inline bool is_dma8(unsigned channel) 323 { 324 return (channel < 4); 306 325 } 307 326 … … 320 339 * 321 340 * @return Error code. 322 * 323 */ 324 int dma_setup_channel(unsigned int channel, uint32_t pa, uint16_t size, 341 */ 342 int dma_channel_setup(unsigned int channel, uint32_t pa, uint32_t size, 325 343 uint8_t mode) 326 344 { 345 if (!is_dma8(channel) && !is_dma16(channel)) 346 return ENOENT; 347 327 348 if ((channel == 0) || (channel == 4)) 328 349 return ENOTSUP; 329 330 if (channel > 7)331 return ENOENT;332 350 333 351 /* DMA is limited to 24bit addresses. */ … … 336 354 337 355 /* 8 bit channels use only 4 bits from the page register. */ 338 if ((channel > 0) && (channel < 4) && (pa >= (1 << 20))) 356 if (is_dma8(channel) && (pa >= (1 << 20))) 357 return EINVAL; 358 359 /* Buffers cannot cross 64K page boundaries */ 360 if ((pa & 0xffff0000) != ((pa + size - 1) & 0xffff0000)) 339 361 return EINVAL; 340 362 … … 352 374 ddf_msg(LVL_DEBUG, "Unspoiled address %#" PRIx32 " (size %" PRIu16 ")", 353 375 pa, size); 354 if ( channel > 4) {376 if (is_dma16(channel)) { 355 377 /* Size must be aligned to 16 bits */ 356 378 if ((size & 1) != 0) { … … 358 380 return EINVAL; 359 381 } 360 382 /* Size is in 2byte words */ 361 383 size >>= 1; 362 363 384 /* Address is fun: lower 16 bits need to be shifted by 1 */ 364 385 pa = ((pa & 0xffff) >> 1) | (pa & 0xff0000); … … 426 447 } 427 448 449 /** Query remaining buffer size. 450 * 451 * @param channel DMA Channel 1, 2, 3 for 8 bit transfers, 452 * 5, 6, 7 for 16 bit. 453 * @param size Place to store number of bytes pending in the assigned buffer. 454 * 455 * @return Error code. 456 */ 457 int dma_channel_remain(unsigned channel, size_t *size) 458 { 459 assert(size); 460 if (!is_dma8(channel) && !is_dma16(channel)) 461 return ENOENT; 462 463 if ((channel == 0) || (channel == 4)) 464 return ENOTSUP; 465 466 fibril_mutex_lock(&guard); 467 if (!controller_8237.initialized) { 468 fibril_mutex_unlock(&guard); 469 return EIO; 470 } 471 472 const dma_channel_t dma_channel = controller_8237.channels[channel]; 473 /* Get size - reset flip-flop */ 474 pio_write_8(dma_channel.flip_flop_address, 0); 475 476 /* Low byte */ 477 const uint8_t value_low = pio_read_8(dma_channel.size_reg_address); 478 ddf_msg(LVL_DEBUG2, "Read size low byte: %p:%x.", 479 dma_channel.size_reg_address, value_low); 480 481 /* High byte */ 482 const uint8_t value_high = pio_read_8(dma_channel.size_reg_address); 483 ddf_msg(LVL_DEBUG2, "Read size high byte: %p:%x.", 484 dma_channel.size_reg_address, value_high); 485 fibril_mutex_unlock(&guard); 486 487 uint16_t remain = (value_high << 8 | value_low) ; 488 /* 16 bit DMA size is in words, 489 * the upper bits are bogus for 16bit transfers so we need to get 490 * rid of them. Using limited type works well.*/ 491 if (is_dma16(channel)) 492 remain <<= 1; 493 *size = is_dma16(channel) ? remain + 2: remain + 1; 494 return EOK; 495 } 428 496 /** 429 497 * @} -
uspace/drv/bus/isa/i8237.h
r2921602 rab92305 38 38 #define DRV_BUS_ISA_I8237_H 39 39 40 extern int dma_setup_channel(unsigned int, uint32_t, uint16_t, uint8_t); 40 extern int dma_channel_setup(unsigned, uint32_t, uint32_t, uint8_t); 41 extern int dma_channel_remain(unsigned, size_t *); 41 42 42 43 #endif -
uspace/drv/bus/isa/isa.c
r2921602 rab92305 85 85 fibril_mutex_t mutex; 86 86 ddf_fun_t *fnode; 87 hw_resource_t resources[ISA_MAX_HW_RES]; 87 88 hw_resource_list_t hw_resources; 88 89 link_t bus_link; … … 103 104 static hw_resource_list_t *isa_get_fun_resources(ddf_fun_t *fnode) 104 105 { 105 isa_fun_t * fun= isa_fun(fnode);106 assert( fun != NULL);107 108 return & fun->hw_resources;109 } 110 111 static bool isa_ enable_fun_interrupt(ddf_fun_t *fnode)106 isa_fun_t *isa = isa_fun(fnode); 107 assert(isa); 108 109 return &isa->hw_resources; 110 } 111 112 static bool isa_fun_enable_interrupt(ddf_fun_t *fnode) 112 113 { 113 114 /* This is an old ugly way, copied from pci driver */ 114 115 assert(fnode); 115 isa_fun_t *fun = isa_fun(fnode); 116 isa_fun_t *isa = isa_fun(fnode); 117 assert(isa); 116 118 117 119 sysarg_t apic; … … 129 131 return false; 130 132 131 const hw_resource_list_t *res = & fun->hw_resources;133 const hw_resource_list_t *res = &isa->hw_resources; 132 134 assert(res); 133 135 for (size_t i = 0; i < res->count; ++i) { … … 151 153 } 152 154 153 static int isa_ dma_channel_fun_setup(ddf_fun_t *fnode,154 unsigned int channel, uint32_t pa, uint 16_t size, uint8_t mode)155 static int isa_fun_setup_dma(ddf_fun_t *fnode, 156 unsigned int channel, uint32_t pa, uint32_t size, uint8_t mode) 155 157 { 156 158 assert(fnode); 157 isa_fun_t *fun = isa_fun(fnode); 158 const hw_resource_list_t *res = &fun->hw_resources; 159 isa_fun_t *isa = isa_fun(fnode); 160 assert(isa); 161 const hw_resource_list_t *res = &isa->hw_resources; 159 162 assert(res); 160 161 const unsigned int ch = channel; 163 162 164 for (size_t i = 0; i < res->count; ++i) { 165 /* Check for assigned channel */ 163 166 if (((res->resources[i].type == DMA_CHANNEL_16) && 164 (res->resources[i].res.dma_channel.dma16 == ch )) ||167 (res->resources[i].res.dma_channel.dma16 == channel)) || 165 168 ((res->resources[i].type == DMA_CHANNEL_8) && 166 (res->resources[i].res.dma_channel.dma8 == ch))) { 167 return dma_setup_channel(channel, pa, size, mode); 168 } 169 } 170 169 (res->resources[i].res.dma_channel.dma8 == channel))) { 170 return dma_channel_setup(channel, pa, size, mode); 171 } 172 } 173 174 return EINVAL; 175 } 176 177 static int isa_fun_remain_dma(ddf_fun_t *fnode, 178 unsigned channel, size_t *size) 179 { 180 assert(size); 181 assert(fnode); 182 isa_fun_t *isa = isa_fun(fnode); 183 assert(isa); 184 const hw_resource_list_t *res = &isa->hw_resources; 185 assert(res); 186 187 for (size_t i = 0; i < res->count; ++i) { 188 /* Check for assigned channel */ 189 if (((res->resources[i].type == DMA_CHANNEL_16) && 190 (res->resources[i].res.dma_channel.dma16 == channel)) || 191 ((res->resources[i].type == DMA_CHANNEL_8) && 192 (res->resources[i].res.dma_channel.dma8 == channel))) { 193 return dma_channel_remain(channel, size); 194 } 195 } 196 171 197 return EINVAL; 172 198 } … … 174 200 static hw_res_ops_t isa_fun_hw_res_ops = { 175 201 .get_resource_list = isa_get_fun_resources, 176 .enable_interrupt = isa_enable_fun_interrupt, 177 .dma_channel_setup = isa_dma_channel_fun_setup, 202 .enable_interrupt = isa_fun_enable_interrupt, 203 .dma_channel_setup = isa_fun_setup_dma, 204 .dma_channel_remain = isa_fun_remain_dma, 178 205 }; 179 206 180 static ddf_dev_ops_t isa_fun_ops; 207 static ddf_dev_ops_t isa_fun_ops= { 208 .interfaces[HW_RES_DEV_IFACE] = &isa_fun_hw_res_ops, 209 }; 181 210 182 211 static int isa_dev_add(ddf_dev_t *dev); … … 212 241 213 242 fibril_mutex_initialize(&fun->mutex); 243 fun->hw_resources.resources = fun->resources; 244 214 245 fun->fnode = fnode; 215 246 return fun; … … 270 301 { 271 302 char *line = str; 303 *next = NULL; 272 304 273 305 if (str == NULL) { 274 *next = NULL;275 306 return NULL; 276 307 } … … 282 313 if (*str != '\0') { 283 314 *next = str + 1; 284 } else {285 *next = NULL;286 315 } 287 316 … … 310 339 /* Get the name part of the rest of the line. */ 311 340 strtok(line, ":"); 312 313 /* Allocate output buffer. */ 314 size_t size = str_size(line) + 1; 315 char *name = malloc(size); 316 317 if (name != NULL) { 318 /* Copy the result to the output buffer. */ 319 str_cpy(name, size, line); 320 } 321 322 return name; 323 } 324 325 static inline char *skip_spaces(char *line) 341 return line; 342 } 343 344 static inline const char *skip_spaces(const char *line) 326 345 { 327 346 /* Skip leading spaces. */ … … 332 351 } 333 352 334 static void isa_fun_ set_irq(isa_fun_t *fun, int irq)353 static void isa_fun_add_irq(isa_fun_t *fun, int irq) 335 354 { 336 355 size_t count = fun->hw_resources.count; … … 348 367 } 349 368 350 static void isa_fun_ set_dma(isa_fun_t *fun, int dma)369 static void isa_fun_add_dma(isa_fun_t *fun, int dma) 351 370 { 352 371 size_t count = fun->hw_resources.count; … … 381 400 } 382 401 383 static void isa_fun_ set_io_range(isa_fun_t *fun, size_t addr, size_t len)402 static void isa_fun_add_io_range(isa_fun_t *fun, size_t addr, size_t len) 384 403 { 385 404 size_t count = fun->hw_resources.count; … … 400 419 } 401 420 402 static void fun_parse_irq(isa_fun_t *fun, c har *val)421 static void fun_parse_irq(isa_fun_t *fun, const char *val) 403 422 { 404 423 int irq = 0; … … 409 428 410 429 if (val != end) 411 isa_fun_set_irq(fun, irq); 412 } 413 414 static void fun_parse_dma(isa_fun_t *fun, char *val) 415 { 416 unsigned int dma = 0; 430 isa_fun_add_irq(fun, irq); 431 } 432 433 static void fun_parse_dma(isa_fun_t *fun, const char *val) 434 { 417 435 char *end = NULL; 418 436 419 437 val = skip_spaces(val); 420 dma = (unsigned int)strtol(val, &end, 10);438 const int dma = strtol(val, &end, 10); 421 439 422 440 if (val != end) 423 isa_fun_ set_dma(fun, dma);424 } 425 426 static void fun_parse_io_range(isa_fun_t *fun, c har *val)441 isa_fun_add_dma(fun, dma); 442 } 443 444 static void fun_parse_io_range(isa_fun_t *fun, const char *val) 427 445 { 428 446 size_t addr, len; … … 441 459 return; 442 460 443 isa_fun_ set_io_range(fun, addr, len);444 } 445 446 static void get_match_id(char **id, c har *val)447 { 448 c har *end = val;461 isa_fun_add_io_range(fun, addr, len); 462 } 463 464 static void get_match_id(char **id, const char *val) 465 { 466 const char *end = val; 449 467 450 468 while (!isspace(*end)) … … 456 474 } 457 475 458 static void fun_parse_match_id(isa_fun_t *fun, c har *val)476 static void fun_parse_match_id(isa_fun_t *fun, const char *val) 459 477 { 460 478 char *id = NULL; 461 int score = 0;462 479 char *end = NULL; 463 int rc;464 480 465 481 val = skip_spaces(val); 466 482 467 score = (int)strtol(val, &end, 10);483 int score = (int)strtol(val, &end, 10); 468 484 if (val == end) { 469 485 ddf_msg(LVL_ERROR, "Cannot read match score for function " … … 483 499 "function %s", id, score, ddf_fun_get_name(fun->fnode)); 484 500 485 rc = ddf_fun_add_match_id(fun->fnode, id, score);501 int rc = ddf_fun_add_match_id(fun->fnode, id, score); 486 502 if (rc != EOK) { 487 503 ddf_msg(LVL_ERROR, "Failed adding match ID: %s", … … 492 508 } 493 509 494 static bool prop_parse(isa_fun_t *fun, c har *line, const char *prop,495 void (*read_fn)(isa_fun_t *, c har *))510 static bool prop_parse(isa_fun_t *fun, const char *line, const char *prop, 511 void (*read_fn)(isa_fun_t *, const char *)) 496 512 { 497 513 size_t proplen = str_size(prop); … … 508 524 } 509 525 510 static void fun_prop_parse(isa_fun_t *fun, c har *line)526 static void fun_prop_parse(isa_fun_t *fun, const char *line) 511 527 { 512 528 /* Skip leading spaces. */ … … 523 539 } 524 540 525 static void fun_hw_res_alloc(isa_fun_t *fun)526 {527 fun->hw_resources.resources =528 (hw_resource_t *) malloc(sizeof(hw_resource_t) * ISA_MAX_HW_RES);529 }530 531 static void fun_hw_res_free(isa_fun_t *fun)532 {533 free(fun->hw_resources.resources);534 fun->hw_resources.resources = NULL;535 }536 537 541 static char *isa_fun_read_info(char *fun_conf, isa_bus_t *isa) 538 542 { 539 543 char *line; 540 char *fun_name = NULL;541 544 542 545 /* Skip empty lines. */ 543 while (true){546 do { 544 547 line = str_get_line(fun_conf, &fun_conf); 545 548 … … 549 552 } 550 553 551 if (!line_empty(line)) 552 break; 553 } 554 } while (line_empty(line)); 554 555 555 556 /* Get device name. */ 556 fun_name = get_device_name(line);557 const char *fun_name = get_device_name(line); 557 558 if (fun_name == NULL) 558 559 return NULL; 559 560 560 561 isa_fun_t *fun = isa_fun_create(isa, fun_name); 561 free(fun_name);562 562 if (fun == NULL) { 563 563 return NULL; 564 564 } 565 566 /* Allocate buffer for the list of hardware resources of the device. */567 fun_hw_res_alloc(fun);568 565 569 566 /* Get properties of the device (match ids, irq and io range). */ … … 596 593 } 597 594 598 static void fun_conf_parse(char *conf, isa_bus_t *isa) 599 { 595 static void isa_functions_add(isa_bus_t *isa) 596 { 597 char *conf = fun_conf_read(CHILD_FUN_CONF_PATH); 600 598 while (conf != NULL && *conf != '\0') { 601 599 conf = isa_fun_read_info(conf, isa); 602 600 } 603 } 604 605 static void isa_functions_add(isa_bus_t *isa) 606 { 607 char *fun_conf; 608 609 fun_conf = fun_conf_read(CHILD_FUN_CONF_PATH); 610 if (fun_conf != NULL) { 611 fun_conf_parse(fun_conf, isa); 612 free(fun_conf); 613 } 601 free(conf); 614 602 } 615 603 616 604 static int isa_dev_add(ddf_dev_t *dev) 617 605 { 618 isa_bus_t *isa;619 620 606 ddf_msg(LVL_DEBUG, "isa_dev_add, device handle = %d", 621 607 (int) ddf_dev_get_handle(dev)); 622 608 623 isa = ddf_dev_data_alloc(dev, sizeof(isa_bus_t));609 isa_bus_t *isa = ddf_dev_data_alloc(dev, sizeof(isa_bus_t)); 624 610 if (isa == NULL) 625 611 return ENOMEM; … … 658 644 { 659 645 isa_bus_t *isa = isa_bus(dev); 660 int rc;661 646 662 647 fibril_mutex_lock(&isa->mutex); … … 666 651 isa_fun_t, bus_link); 667 652 668 rc = ddf_fun_offline(fun->fnode);653 int rc = ddf_fun_offline(fun->fnode); 669 654 if (rc != EOK) { 670 655 fibril_mutex_unlock(&isa->mutex); … … 682 667 list_remove(&fun->bus_link); 683 668 684 fun_hw_res_free(fun);685 669 ddf_fun_destroy(fun->fnode); 686 670 } … … 709 693 } 710 694 711 712 static void isa_init() 713 { 695 int main(int argc, char *argv[]) 696 { 697 printf(NAME ": HelenOS ISA bus driver\n"); 714 698 ddf_log_init(NAME); 715 isa_fun_ops.interfaces[HW_RES_DEV_IFACE] = &isa_fun_hw_res_ops;716 }717 718 int main(int argc, char *argv[])719 {720 printf(NAME ": HelenOS ISA bus driver\n");721 isa_init();722 699 return ddf_driver_main(&isa_driver); 723 700 } -
uspace/drv/infrastructure/root/root.c
r2921602 rab92305 208 208 /* 209 209 * Register virtual devices root. 210 * We ignoreerror occurrence because virtual devices shall not be210 * We warn on error occurrence because virtual devices shall not be 211 211 * vital for the system. 212 212 */ 213 (void) add_virtual_root_fun(dev); 213 int res = add_virtual_root_fun(dev); 214 if (res != EOK) 215 ddf_msg(LVL_WARN, "Failed to add virtual child."); 214 216 215 217 /* Register root device's children. */ 216 intres = add_platform_fun(dev);218 res = add_platform_fun(dev); 217 219 if (EOK != res) 218 220 ddf_msg(LVL_ERROR, "Failed adding child device for platform."); -
uspace/drv/nic/e1k/e1k.c
r2921602 rab92305 59 59 #define E1000_DEFAULT_INTERRUPT_INTERVAL_USEC 250 60 60 61 /* Must be power of 8 */ 62 #define E1000_RX_FRAME_COUNT 12863 #define E1000_TX_FRAME_COUNT 12861 /* Must be power of 8 */ //TODO power or multiple? previous value was 128 62 #define E1000_RX_FRAME_COUNT 8 63 #define E1000_TX_FRAME_COUNT 8 64 64 65 65 #define E1000_RECEIVE_ADDRESS 16 -
uspace/lib/c/generic/async.c
r2921602 rab92305 2281 2281 bool async_data_read_receive(ipc_callid_t *callid, size_t *size) 2282 2282 { 2283 ipc_call_t data; 2284 return async_data_read_receive_call(callid, &data, size); 2285 } 2286 2287 /** Wrapper for receiving the IPC_M_DATA_READ calls using the async framework. 2288 * 2289 * This wrapper only makes it more comfortable to receive IPC_M_DATA_READ 2290 * calls so that the user doesn't have to remember the meaning of each IPC 2291 * argument. 2292 * 2293 * So far, this wrapper is to be used from within a connection fibril. 2294 * 2295 * @param callid Storage for the hash of the IPC_M_DATA_READ. 2296 * @param size Storage for the maximum size. Can be NULL. 2297 * 2298 * @return True on success, false on failure. 2299 * 2300 */ 2301 bool async_data_read_receive_call(ipc_callid_t *callid, ipc_call_t *data, 2302 size_t *size) 2303 { 2283 2304 assert(callid); 2284 2285 ipc_call_t data;2286 *callid = async_get_call( &data);2287 2288 if (IPC_GET_IMETHOD( data) != IPC_M_DATA_READ)2305 assert(data); 2306 2307 *callid = async_get_call(data); 2308 2309 if (IPC_GET_IMETHOD(*data) != IPC_M_DATA_READ) 2289 2310 return false; 2290 2311 2291 2312 if (size) 2292 *size = (size_t) IPC_GET_ARG2( data);2313 *size = (size_t) IPC_GET_ARG2(*data); 2293 2314 2294 2315 return true; … … 2385 2406 bool async_data_write_receive(ipc_callid_t *callid, size_t *size) 2386 2407 { 2408 ipc_call_t data; 2409 return async_data_write_receive_call(callid, &data, size); 2410 } 2411 2412 /** Wrapper for receiving the IPC_M_DATA_WRITE calls using the async framework. 2413 * 2414 * This wrapper only makes it more comfortable to receive IPC_M_DATA_WRITE 2415 * calls so that the user doesn't have to remember the meaning of each IPC 2416 * argument. 2417 * 2418 * So far, this wrapper is to be used from within a connection fibril. 2419 * 2420 * @param callid Storage for the hash of the IPC_M_DATA_WRITE. 2421 * @param data Storage for the ipc call data. 2422 * @param size Storage for the suggested size. May be NULL. 2423 * 2424 * @return True on success, false on failure. 2425 * 2426 */ 2427 bool async_data_write_receive_call(ipc_callid_t *callid, ipc_call_t *data, 2428 size_t *size) 2429 { 2387 2430 assert(callid); 2388 2389 ipc_call_t data;2390 *callid = async_get_call( &data);2391 2392 if (IPC_GET_IMETHOD( data) != IPC_M_DATA_WRITE)2431 assert(data); 2432 2433 *callid = async_get_call(data); 2434 2435 if (IPC_GET_IMETHOD(*data) != IPC_M_DATA_WRITE) 2393 2436 return false; 2394 2437 2395 2438 if (size) 2396 *size = (size_t) IPC_GET_ARG2( data);2439 *size = (size_t) IPC_GET_ARG2(*data); 2397 2440 2398 2441 return true; -
uspace/lib/c/generic/device/hw_res.c
r2921602 rab92305 42 42 { 43 43 sysarg_t count = 0; 44 44 45 45 async_exch_t *exch = async_exchange_begin(sess); 46 if (exch == NULL) 47 return ENOMEM; 46 48 int rc = async_req_1_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE), 47 49 HW_RES_GET_RESOURCE_LIST, &count); 48 50 49 51 if (rc != EOK) { 50 52 async_exchange_end(exch); 51 53 return rc; 52 54 } 53 55 54 56 size_t size = count * sizeof(hw_resource_t); 55 57 hw_resource_t *resources = (hw_resource_t *) malloc(size); … … 59 61 return ENOMEM; 60 62 } 61 63 62 64 rc = async_data_read_start(exch, resources, size); 63 65 async_exchange_end(exch); 64 66 65 67 if (rc != EOK) { 66 68 free(resources); 67 69 return rc; 68 70 } 69 71 70 72 hw_resources->resources = resources; 71 73 hw_resources->count = count; 72 74 73 75 return EOK; 74 76 } … … 77 79 { 78 80 async_exch_t *exch = async_exchange_begin(sess); 81 if (exch == NULL) 82 return false; 79 83 int rc = async_req_1_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE), 80 84 HW_RES_ENABLE_INTERRUPT); 81 85 async_exchange_end(exch); 82 86 83 87 return (rc == EOK); 88 } 89 90 /** 91 * Setup DMA channel to specified place and mode. 92 * @param channel DMA Channel 1,2,3 for 8 bit transfers, 5,6,7 for 16 bit. 93 * @param pa Physical address of the buffer. Must be < 16MB for 16 bit and < 1MB 94 * for 8 bit transfers. 95 * @param size DMA buffer size, limited to 64K. 96 * @param mode Mode of the DMA channel: 97 * - Read or Write 98 * - Allow automatic reset 99 * - Use address decrement instead of increment 100 * - Use SINGLE/BLOCK/ON DEMAND transfer mode 101 * @return Error code. 102 */ 103 int hw_res_dma_channel_setup(async_sess_t *sess, 104 unsigned channel, uint32_t pa, uint32_t size, uint8_t mode) 105 { 106 async_exch_t *exch = async_exchange_begin(sess); 107 if (exch == NULL) 108 return ENOMEM; 109 const uint32_t packed = (channel & 0xffff) | (mode << 16); 110 const int ret = async_req_4_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE), 111 HW_RES_DMA_CHANNEL_SETUP, packed, pa, size); 112 async_exchange_end(exch); 113 114 return ret; 115 } 116 117 /** 118 * Query remaining bytes in the buffer. 119 * @param channel DMA Channel 1,2,3 for 8 bit transfers, 5,6,7 for 16 bit. 120 * @return Number of bytes remaining in the buffer(>=0) or error code(<0). 121 */ 122 int hw_res_dma_channel_remain(async_sess_t *sess, unsigned channel) 123 { 124 async_exch_t *exch = async_exchange_begin(sess); 125 if (exch == NULL) 126 return ENOMEM; 127 sysarg_t remain; 128 const int ret = async_req_2_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE), 129 HW_RES_DMA_CHANNEL_REMAIN, channel, &remain); 130 async_exchange_end(exch); 131 if (ret == EOK) 132 return remain; 133 return ret; 84 134 } 85 135 -
uspace/lib/c/generic/device/hw_res_parsed.c
r2921602 rab92305 38 38 #include <errno.h> 39 39 40 static void hw_res_parse_add_irq(hw_res_list_parsed_t *out, hw_resource_t *res, 41 int flags) 40 static void hw_res_parse_add_dma_channel(hw_res_list_parsed_t *out, 41 const hw_resource_t *res, int flags) 42 { 43 assert(res); 44 assert((res->type == DMA_CHANNEL_8) || (res->type == DMA_CHANNEL_16)); 45 46 const unsigned channel = (res->type == DMA_CHANNEL_8) ? 47 res->res.dma_channel.dma8 : res->res.dma_channel.dma16; 48 const size_t count = out->dma_channels.count; 49 const int keep_duplicit = flags & HW_RES_KEEP_DUPLICIT; 50 51 if (!keep_duplicit) { 52 for (size_t i = 0; i < count; ++i) { 53 if (out->dma_channels.channels[i] == channel) 54 return; 55 } 56 } 57 58 out->dma_channels.channels[count] = channel; 59 ++out->dma_channels.count; 60 } 61 62 static void hw_res_parse_add_irq(hw_res_list_parsed_t *out, 63 const hw_resource_t *res, int flags) 42 64 { 43 65 assert(res && (res->type == INTERRUPT)); … … 59 81 60 82 static void hw_res_parse_add_io_range(hw_res_list_parsed_t *out, 61 hw_resource_t *res, int flags)83 const hw_resource_t *res, int flags) 62 84 { 63 85 assert(res && (res->type == IO_RANGE)); … … 90 112 91 113 static void hw_res_parse_add_mem_range(hw_res_list_parsed_t *out, 92 hw_resource_t *res, int flags)114 const hw_resource_t *res, int flags) 93 115 { 94 116 assert(res && (res->type == MEM_RANGE)); … … 132 154 * 133 155 */ 134 int hw_res_list_parse( hw_resource_list_t *hw_resources,156 int hw_res_list_parse(const hw_resource_list_t *hw_resources, 135 157 hw_res_list_parsed_t *out, int flags) 136 158 { … … 141 163 hw_res_list_parsed_clean(out); 142 164 143 out->irqs.irqs = malloc(res_count * sizeof(int)); 144 out->io_ranges.ranges = malloc(res_count * sizeof(io_range_t)); 145 out->mem_ranges.ranges = malloc(res_count * sizeof(mem_range_t)); 165 out->irqs.irqs = calloc(res_count, sizeof(int)); 166 out->dma_channels.channels = calloc(res_count, sizeof(int)); 167 out->io_ranges.ranges = calloc(res_count, sizeof(io_range_t)); 168 out->mem_ranges.ranges = calloc(res_count, sizeof(mem_range_t)); 169 if (!out->irqs.irqs || !out->dma_channels.channels || 170 !out->io_ranges.ranges || !out->mem_ranges.ranges) { 171 hw_res_list_parsed_clean(out); 172 return ENOMEM; 173 } 146 174 147 175 for (size_t i = 0; i < res_count; ++i) { 148 hw_resource_t *resource = &(hw_resources->resources[i]);149 176 const hw_resource_t *resource = &(hw_resources->resources[i]); 177 150 178 switch (resource->type) { 151 179 case INTERRUPT: … … 158 186 hw_res_parse_add_mem_range(out, resource, flags); 159 187 break; 188 case DMA_CHANNEL_8: 189 case DMA_CHANNEL_16: 190 hw_res_parse_add_dma_channel(out, resource, flags); 191 break; 160 192 default: 193 hw_res_list_parsed_clean(out); 161 194 return EINVAL; 162 195 } 163 196 } 164 197 165 198 return EOK; 166 199 }; -
uspace/lib/c/include/async.h
r2921602 rab92305 399 399 extern int async_data_read_start(async_exch_t *, void *, size_t); 400 400 extern bool async_data_read_receive(ipc_callid_t *, size_t *); 401 extern bool async_data_read_receive_call(ipc_callid_t *, ipc_call_t *, size_t *); 401 402 extern int async_data_read_finalize(ipc_callid_t, const void *, size_t); 402 403 … … 437 438 extern int async_data_write_start(async_exch_t *, const void *, size_t); 438 439 extern bool async_data_write_receive(ipc_callid_t *, size_t *); 440 extern bool async_data_write_receive_call(ipc_callid_t *, ipc_call_t *, size_t *); 439 441 extern int async_data_write_finalize(ipc_callid_t, void *, size_t); 440 442 -
uspace/lib/c/include/device/hw_res.h
r2921602 rab92305 53 53 HW_RES_ENABLE_INTERRUPT, 54 54 HW_RES_DMA_CHANNEL_SETUP, 55 HW_RES_DMA_CHANNEL_REMAIN, 55 56 } hw_res_method_t; 56 57 … … 115 116 116 117 extern int hw_res_dma_channel_setup(async_sess_t *, unsigned int, uint32_t, 117 uint16_t, uint8_t); 118 uint32_t, uint8_t); 119 extern int hw_res_dma_channel_remain(async_sess_t *, unsigned); 118 120 119 121 #endif -
uspace/lib/c/include/device/hw_res_parsed.h
r2921602 rab92305 139 139 } 140 140 141 extern int hw_res_list_parse(hw_resource_list_t *, hw_res_list_parsed_t *, int); 141 extern int hw_res_list_parse( 142 const hw_resource_list_t *, hw_res_list_parsed_t *, int); 142 143 extern int hw_res_get_list_parsed(async_sess_t *, hw_res_list_parsed_t *, int); 143 144 -
uspace/lib/c/include/ipc/dev_iface.h
r2921602 rab92305 36 36 typedef enum { 37 37 HW_RES_DEV_IFACE = 0, 38 39 /** Audio device mixer interface */ 40 AUDIO_MIXER_IFACE, 41 /** Audio device pcm buffer interface */ 42 AUDIO_PCM_BUFFER_IFACE, 43 38 44 /** Character device interface */ 39 45 CHAR_DEV_IFACE, -
uspace/lib/drv/Makefile
r2921602 rab92305 29 29 30 30 USPACE_PREFIX = ../.. 31 EXTRA_CFLAGS = -Iinclude -I$(LIBUSB_PREFIX)/include 31 EXTRA_CFLAGS = -Iinclude -I$(LIBUSB_PREFIX)/include -I$(LIBPCM_PREFIX)/include 32 32 LIBRARY = libdrv 33 33 … … 38 38 generic/log.c \ 39 39 generic/logbuf.c \ 40 generic/remote_audio_mixer.c \ 41 generic/remote_audio_pcm.c \ 40 42 generic/remote_hw_res.c \ 41 43 generic/remote_char_dev.c \ -
uspace/lib/drv/generic/dev_iface.c
r2921602 rab92305 49 49 #include "remote_usbhid.h" 50 50 #include "remote_pci.h" 51 #include "remote_audio_mixer.h" 52 #include "remote_audio_pcm.h" 51 53 #include "remote_ahci.h" 52 54 53 static iface_dipatch_table_t remote_ifaces = {55 static const iface_dipatch_table_t remote_ifaces = { 54 56 .ifaces = { 55 &remote_hw_res_iface, 56 &remote_char_dev_iface, 57 &remote_graph_dev_iface, 58 &remote_nic_iface, 59 &remote_pci_iface, 60 &remote_usb_iface, 61 &remote_usbhc_iface, 62 &remote_usbhid_iface, 63 &remote_clock_dev_iface, 64 &remote_battery_dev_iface, 65 &remote_ahci_iface 57 [AUDIO_MIXER_IFACE] = &remote_audio_mixer_iface, 58 [AUDIO_PCM_BUFFER_IFACE] = &remote_audio_pcm_iface, 59 [HW_RES_DEV_IFACE] = &remote_hw_res_iface, 60 [CHAR_DEV_IFACE] = &remote_char_dev_iface, 61 [GRAPH_DEV_IFACE] = &remote_graph_dev_iface, 62 [NIC_DEV_IFACE] = &remote_nic_iface, 63 [PCI_DEV_IFACE] = &remote_pci_iface, 64 [USB_DEV_IFACE] = &remote_usb_iface, 65 [USBHC_DEV_IFACE] = &remote_usbhc_iface, 66 [USBHID_DEV_IFACE] = &remote_usbhid_iface, 67 [CLOCK_DEV_IFACE] = &remote_clock_dev_iface, 68 [BATTERY_DEV_IFACE] = &remote_battery_dev_iface, 69 [AHCI_DEV_IFACE] = &remote_ahci_iface, 66 70 } 67 71 }; -
uspace/lib/drv/generic/remote_hw_res.c
r2921602 rab92305 1 1 /* 2 2 * Copyright (c) 2010 Lenka Trochtova 3 * Copyright (c) 2011 Jan Vesely 3 4 * All rights reserved. 4 5 * … … 43 44 static void remote_hw_res_enable_interrupt(ddf_fun_t *, void *, ipc_callid_t, 44 45 ipc_call_t *); 46 static void remote_hw_res_dma_channel_setup(ddf_fun_t *, void *, ipc_callid_t, 47 ipc_call_t *); 48 static void remote_hw_res_dma_channel_remain(ddf_fun_t *, void *, ipc_callid_t, 49 ipc_call_t *); 45 50 46 51 static remote_iface_func_ptr_t remote_hw_res_iface_ops [] = { 47 &remote_hw_res_get_resource_list, 48 &remote_hw_res_enable_interrupt 52 [HW_RES_GET_RESOURCE_LIST] = &remote_hw_res_get_resource_list, 53 [HW_RES_ENABLE_INTERRUPT] = &remote_hw_res_enable_interrupt, 54 [HW_RES_DMA_CHANNEL_SETUP] = &remote_hw_res_dma_channel_setup, 55 [HW_RES_DMA_CHANNEL_REMAIN] = &remote_hw_res_dma_channel_remain, 49 56 }; 50 57 … … 94 101 } 95 102 103 static void remote_hw_res_dma_channel_setup(ddf_fun_t *fun, void *ops, 104 ipc_callid_t callid, ipc_call_t *call) 105 { 106 hw_res_ops_t *hw_res_ops = ops; 107 108 if (hw_res_ops->dma_channel_setup == NULL) { 109 async_answer_0(callid, ENOTSUP); 110 return; 111 } 112 const unsigned channel = DEV_IPC_GET_ARG1(*call) & 0xffff; 113 const uint8_t mode = DEV_IPC_GET_ARG1(*call) >> 16; 114 const uint32_t address = DEV_IPC_GET_ARG2(*call); 115 const uint32_t size = DEV_IPC_GET_ARG3(*call); 116 117 const int ret = hw_res_ops->dma_channel_setup( 118 fun, channel, address, size, mode); 119 async_answer_0(callid, ret); 120 } 121 122 static void remote_hw_res_dma_channel_remain(ddf_fun_t *fun, void *ops, 123 ipc_callid_t callid, ipc_call_t *call) 124 { 125 hw_res_ops_t *hw_res_ops = ops; 126 127 if (hw_res_ops->dma_channel_setup == NULL) { 128 async_answer_0(callid, ENOTSUP); 129 return; 130 } 131 const unsigned channel = DEV_IPC_GET_ARG1(*call); 132 size_t remain = 0; 133 const int ret = hw_res_ops->dma_channel_remain(fun, channel, &remain); 134 async_answer_1(callid, ret, remain); 135 } 96 136 /** 97 137 * @} -
uspace/lib/drv/include/ops/hw_res.h
r2921602 rab92305 44 44 hw_resource_list_t *(*get_resource_list)(ddf_fun_t *); 45 45 bool (*enable_interrupt)(ddf_fun_t *); 46 int (*dma_channel_setup)(ddf_fun_t *, unsigned, uint32_t, uint16_t, uint8_t); 46 int (*dma_channel_setup)(ddf_fun_t *, unsigned, uint32_t, uint32_t, uint8_t); 47 int (*dma_channel_remain)(ddf_fun_t *, unsigned, size_t *); 47 48 } hw_res_ops_t; 48 49 -
uspace/lib/softfloat/softfloat.c
r2921602 rab92305 1265 1265 } 1266 1266 1267 1268 float __aeabi_i2f(int i) 1269 { 1270 return __floatsisf(i); 1271 } 1272 1273 float __aeabi_ui2f(int i) 1274 { 1275 return __floatunsisf(i); 1276 } 1277 1267 1278 double __aeabi_i2d(int i) 1268 1279 { … … 1280 1291 } 1281 1292 1293 int __aeabi_f2uiz(float a) 1294 { 1295 return __fixunssfsi(a); 1296 } 1297 1282 1298 int __aeabi_d2iz(double a) 1283 1299 { … … 1288 1304 { 1289 1305 return __fixunsdfsi(a); 1306 } 1307 1308 int __aeabi_fcmpge(float a, float b) 1309 { 1310 return __gesf2(a, b); 1311 } 1312 1313 int __aeabi_fcmpgt(float a, float b) 1314 { 1315 return __gtsf2(a, b); 1316 } 1317 1318 int __aeabi_fcmplt(float a, float b) 1319 { 1320 return __ltsf2(a, b); 1321 } 1322 1323 int __aeabi_fcmpeq(float a, float b) 1324 { 1325 return __eqsf2(a, b); 1290 1326 } 1291 1327 -
uspace/lib/softfloat/softfloat.h
r2921602 rab92305 204 204 205 205 /* ARM EABI */ 206 extern float __aeabi_i2f(int); 207 extern float __aeabi_ui2f(int); 206 208 extern double __aeabi_i2d(int); 207 209 extern double __aeabi_ui2d(unsigned int); … … 209 211 210 212 extern int __aeabi_f2iz(float); 213 extern int __aeabi_f2uiz(float); 211 214 extern int __aeabi_d2iz(double); 215 216 extern int __aeabi_fcmpge(float, float); 217 extern int __aeabi_fcmpgt(float, float); 218 extern int __aeabi_fcmplt(float, float); 219 extern int __aeabi_fcmpeq(float, float); 212 220 213 221 extern int __aeabi_dcmpge(double, double); -
uspace/srv/hid/compositor/compositor.c
r2921602 rab92305 2172 2172 /* Establish input bidirectional connection. */ 2173 2173 rc = input_connect(input_svc); 2174 if (rc != EOK) 2174 if (rc != EOK) { 2175 printf("%s: Failed to connect to input service.\n", NAME); 2175 2176 return rc; 2177 } 2176 2178 2177 2179 /* Create viewports and connect them to visualizers. */ … … 2179 2181 rc = loc_category_get_id("visualizer", &cat_id, IPC_FLAG_BLOCKING); 2180 2182 if (rc != EOK) { 2183 printf("%s: Failed to get visualizer category.\n", NAME); 2181 2184 input_disconnect(); 2182 2185 return -1; … … 2187 2190 rc = loc_category_get_svcs(cat_id, &svcs, &svcs_cnt); 2188 2191 if (rc != EOK || svcs_cnt == 0) { 2192 printf("%s: Failed to get visualizer category services.\n", NAME); 2189 2193 input_disconnect(); 2190 2194 return -1; … … 2203 2207 2204 2208 if (list_empty(&viewport_list)) { 2209 printf("%s: Failed to get view ports.\n", NAME); 2205 2210 input_disconnect(); 2206 2211 return -1; -
uspace/srv/locsrv/locsrv.c
r2921602 rab92305 1377 1377 categ_dir_add_cat(&cdir, cat); 1378 1378 1379 cat = category_new("audio-pcm"); 1380 categ_dir_add_cat(&cdir, cat); 1381 1379 1382 return true; 1380 1383 }
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