Index: kernel/arch/sparc64/src/trap/trap_table.S
===================================================================
--- kernel/arch/sparc64/src/trap/trap_table.S	(revision 253f35a1d714bef0e93e4a79768b7342ccc84123)
+++ kernel/arch/sparc64/src/trap/trap_table.S	(revision ab1ae2d9f7221f74f7542354c35540bbba78eb6a)
@@ -586,5 +586,5 @@
 	be 1f
 	nop
-0:	ba 0b					! this for debugging, if we ever get here
+0:	ba 0b					! this is for debugging, if we ever get here
 	nop					! it will be easy to find
 
@@ -592,7 +592,20 @@
 .if NOT(\is_syscall)
 	rdpr %tstate, %g3
+	
+	/*
+	 * One of the ways this handler can be invoked is after a nested MMU trap from
+	 * either spill_1_normal or fill_1_normal traps. Both of these traps manipulate
+	 * the CWP register. We deal with the situation by simulating the MMU trap
+	 * on TL=1 and restart the respective SAVE or RESTORE instruction once the MMU
+	 * trap is resolved. However, because we are in the wrong window from the
+	 * perspective of the MMU trap, we need to synchronize CWP with CWP from TL=0.
+	 */ 
+	and %g3, TSTATE_CWP_MASK, %g4
+	wrpr %g4, 0, %cwp			! resynchronize CWP
+
 	andcc %g3, TSTATE_PRIV_BIT, %g0		! if this trap came from the privileged mode...
 	bnz 0f					! ...skip setting of kernel stack and primary context
 	nop
+	
 .endif
 	/*
@@ -886,5 +899,5 @@
 	 *	OTHERWIN	= 0
 	 *
-	 * The RESTORE isntruction is therfore to be skipped.
+	 * The RESTORE instruction is therfore to be skipped.
 	 */
 2: