Changes in kernel/arch/arm32/src/mach/gta02/gta02.c [24697c3:a9b5b5f] in mainline
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kernel/arch/arm32/src/mach/gta02/gta02.c
r24697c3 ra9b5b5f 43 43 #include <genarch/drivers/s3c24xx_irqc/s3c24xx_irqc.h> 44 44 #include <genarch/drivers/s3c24xx_timer/s3c24xx_timer.h> 45 #include <genarch/srln/srln.h> 46 #include <sysinfo/sysinfo.h> 45 47 #include <interrupt.h> 46 48 #include <ddi/ddi.h> … … 68 70 static void gta02_output_init(void); 69 71 static void gta02_input_init(void); 72 static size_t gta02_get_irq_count(void); 70 73 71 74 static void gta02_timer_irq_init(void); … … 74 77 static void gta02_timer_irq_handler(irq_t *irq); 75 78 76 static void *gta02_scons_out;77 static s3c24xx_irqc_t *gta02_irqc;79 static outdev_t *gta02_scons_dev; 80 static s3c24xx_irqc_t gta02_irqc; 78 81 static s3c24xx_timer_t *gta02_timer; 79 82 … … 88 91 gta02_frame_init, 89 92 gta02_output_init, 90 gta02_input_init 93 gta02_input_init, 94 gta02_get_irq_count 91 95 }; 92 96 93 97 static void gta02_init(void) 94 98 { 95 gta02_scons_out = (void *) hw_map(GTA02_SCONS_BASE, PAGE_SIZE);96 gta02_irqc = (void *) hw_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE); 99 s3c24xx_irqc_regs_t *irqc_regs; 100 97 101 gta02_timer = (void *) hw_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE); 98 99 /* Make all interrupt sources use IRQ mode (not FIQ). */ 100 pio_write_32(>a02_irqc->intmod, 0x00000000); 101 102 /* Disable all interrupt sources. */ 103 pio_write_32(>a02_irqc->intmsk, 0xffffffff); 104 105 /* Disable interrupts from all sub-sources. */ 106 pio_write_32(>a02_irqc->intsubmsk, 0xffffffff); 102 irqc_regs = (void *) hw_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE); 103 104 /* Initialize interrupt controller. */ 105 s3c24xx_irqc_init(>a02_irqc, irqc_regs); 107 106 } 108 107 … … 132 131 uint32_t inum; 133 132 134 inum = pio_read_32(>a02_irqc->intoffset); 133 /* Determine IRQ number. */ 134 inum = s3c24xx_irqc_inum_get(>a02_irqc); 135 136 /* Clear interrupt condition in the interrupt controller. */ 137 s3c24xx_irqc_clear(>a02_irqc, inum); 135 138 136 139 irq_t *irq = irq_dispatch_and_lock(inum); … … 144 147 CPU->id, inum); 145 148 } 146 147 /* Clear interrupt condition in the interrupt controller. */148 pio_write_32(>a02_irqc->srcpnd, S3C24XX_INT_BIT(inum));149 pio_write_32(>a02_irqc->intpnd, S3C24XX_INT_BIT(inum));150 149 } 151 150 … … 176 175 } 177 176 #endif 178 outdev_t *scons_dev; 179 180 scons_dev = s3c24xx_uart_init((ioport8_t *) gta02_scons_out); 181 if (scons_dev) 182 stdout_wire(scons_dev); 177 178 /* Initialize serial port of the debugging console. */ 179 s3c24xx_uart_io_t *scons_io; 180 181 scons_io = (void *) hw_map(GTA02_SCONS_BASE, PAGE_SIZE); 182 gta02_scons_dev = s3c24xx_uart_init(scons_io, S3C24XX_INT_UART2); 183 184 if (gta02_scons_dev) { 185 /* Create output device. */ 186 stdout_wire(gta02_scons_dev); 187 } 188 189 /* 190 * This is the necessary evil until the userspace driver is entirely 191 * self-sufficient. 192 */ 193 sysinfo_set_item_val("s3c24xx_uart", NULL, true); 194 sysinfo_set_item_val("s3c24xx_uart.inr", NULL, S3C24XX_INT_UART2); 195 sysinfo_set_item_val("s3c24xx_uart.address.physical", NULL, 196 (uintptr_t) GTA02_SCONS_BASE); 197 183 198 } 184 199 185 200 static void gta02_input_init(void) 186 201 { 202 s3c24xx_uart_t *scons_inst; 203 204 if (gta02_scons_dev) { 205 /* Create input device. */ 206 scons_inst = (void *) gta02_scons_dev->data; 207 208 srln_instance_t *srln_instance = srln_init(); 209 if (srln_instance) { 210 indev_t *sink = stdin_wire(); 211 indev_t *srln = srln_wire(srln_instance, sink); 212 s3c24xx_uart_input_wire(scons_inst, srln); 213 214 /* Enable interrupts from UART2 */ 215 s3c24xx_irqc_src_enable(>a02_irqc, 216 S3C24XX_INT_UART2); 217 218 /* Enable interrupts from UART2 RXD */ 219 s3c24xx_irqc_subsrc_enable(>a02_irqc, 220 S3C24XX_SUBINT_RXD2); 221 } 222 } 223 } 224 225 size_t gta02_get_irq_count(void) 226 { 227 return GTA02_IRQ_COUNT; 187 228 } 188 229 … … 248 289 249 290 /* Enable interrupts from timer0 */ 250 pio_write_32(>a02_irqc->intmsk, pio_read_32(>a02_irqc->intmsk) & 251 ~S3C24XX_INT_BIT(S3C24XX_INT_TIMER0)); 291 s3c24xx_irqc_src_enable(>a02_irqc, S3C24XX_INT_TIMER0); 252 292 253 293 /* Load data from tcntb0/tcmpb0 into tcnt0/tcmp0. */
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