Index: kernel/genarch/src/drivers/i8259/i8259.c
===================================================================
--- kernel/genarch/src/drivers/i8259/i8259.c	(revision d1cbad5d70ff4d3f6defcd8aa18099c29887260b)
+++ kernel/genarch/src/drivers/i8259/i8259.c	(revision a773b8b018e3509e70f093d1ff08a0946b7dfe40)
@@ -38,8 +38,6 @@
 
 #include <genarch/drivers/i8259/i8259.h>
-#include <cpu.h>
+#include <typedefs.h>
 #include <stdint.h>
-#include <arch/asm.h>
-#include <arch.h>
 #include <log.h>
 #include <interrupt.h>
@@ -51,5 +49,6 @@
 static i8259_t *saved_pic1;
 
-void i8259_init(i8259_t *pic0, i8259_t *pic1)
+void i8259_init(i8259_t *pic0, i8259_t *pic1, inr_t pic1_irq,
+    unsigned int irq0_int, unsigned int irq8_int)
 {
 	saved_pic0 = pic0;
@@ -59,9 +58,9 @@
 	pio_write_8(&pic0->port1, PIC_ICW1 | PIC_ICW1_NEEDICW4);
 
-	/* ICW2: IRQ 0 maps to INT IRQBASE */
-	pio_write_8(&pic0->port2, IVT_IRQBASE);
+	/* ICW2: IRQ 0 maps to INT irq0_int */
+	pio_write_8(&pic0->port2, irq0_int);
 
 	/* ICW3: pic1 using IRQ IRQ_PIC1 */
-	pio_write_8(&pic0->port2, 1 << IRQ_PIC1);
+	pio_write_8(&pic0->port2, 1 << pic1_irq);
 
 	/* ICW4: i8086 mode */
@@ -71,9 +70,9 @@
 	pio_write_8(&pic1->port1, PIC_ICW1 | PIC_ICW1_NEEDICW4);
 
-	/* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
-	pio_write_8(&pic1->port2, IVT_IRQBASE + 8);
+	/* ICW2: IRQ 8 maps to INT irq8_int */
+	pio_write_8(&pic1->port2, irq8_int);
 
 	/* ICW3: pic1 is known as IRQ_PIC1 */
-	pio_write_8(&pic1->port2, IRQ_PIC1);
+	pio_write_8(&pic1->port2, pic1_irq);
 
 	/* ICW4: i8086 mode */
@@ -96,5 +95,5 @@
 
 	pic_disable_irqs(0xffff);		/* disable all irq's */
-	pic_enable_irqs(1 << IRQ_PIC1);		/* but enable pic1 */
+	pic_enable_irqs(1 << pic1_irq);		/* but enable pic1_irq */
 }