Index: kernel/arch/mips32/include/cp0.h
===================================================================
--- kernel/arch/mips32/include/cp0.h	(revision 598f90e95d4285118ba60723e23a04384ddcfc5e)
+++ kernel/arch/mips32/include/cp0.h	(revision a6dffb87dcaf2a7ccc2024825b36ea3c06c77e48)
@@ -70,5 +70,5 @@
   { \
       uint32_t retval; \
-      asm("mfc0 %0, $" #reg : "=r"(retval)); \
+      asm volatile ("mfc0 %0, $" #reg : "=r"(retval)); \
       return retval; \
   }
@@ -76,5 +76,5 @@
 #define GEN_WRITE_CP0(nm,reg) static inline void cp0_ ##nm##_write(uint32_t val) \
  { \
-    asm("mtc0 %0, $" #reg : : "r"(val) ); \
+    asm volatile ("mtc0 %0, $" #reg : : "r"(val) ); \
  }