Changeset a6d4ceb in mainline for arch/amd64


Ignore:
Timestamp:
2006-04-13T14:27:30Z (20 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
963074b3
Parents:
1ace9ea
Message:

Move arch/thread.h to arch/proc/thread.h on all architectures.
Replace ARCH_THREAD_DATA with new thread_arch_t arch on all architectures.
Similarily, add task_arch_t arch on all architectures.
On amd64 and ia32, grow the TSS segment by 64K + 1B to support IO port
permission bitmap. For the same reason, define per task IO port permission bitmaps
on ia32 and amd64.

Location:
arch/amd64
Files:
1 added
4 edited
1 moved

Legend:

Unmodified
Added
Removed
  • arch/amd64/include/pm.h

    r1ace9ea ra6d4ceb  
    139139        __u64 reserve3;
    140140        __u16 reserve4;
    141         __u16 iomap;
     141        __u16 iomap_base;
     142        __u8 iomap[0x10000 + 1];        /* 64K + 1 terminating byte */
    142143} __attribute__ ((packed));
    143144
  • arch/amd64/include/proc/thread.h

    r1ace9ea ra6d4ceb  
    3030#define __amd64_THREAD_H__
    3131
    32 #define ARCH_THREAD_DATA __native tls;
     32#include <arch/types.h>
     33
     34typedef struct {
     35        __native tls;
     36} thread_arch_t;
    3337
    3438#endif
  • arch/amd64/src/amd64.c

    r1ace9ea ra6d4ceb  
    174174__native sys_tls_set(__native addr)
    175175{
    176         THREAD->tls = addr;
     176        THREAD->arch.tls = addr;
    177177        write_msr(AMD_MSR_FS, addr);
    178178        return 0;
  • arch/amd64/src/proc/scheduler.c

    r1ace9ea ra6d4ceb  
    4848
    4949        /* TLS support - set FS to thread local storage */
    50         write_msr(AMD_MSR_FS, THREAD->tls);
     50        write_msr(AMD_MSR_FS, THREAD->arch.tls);
    5151
    5252#ifdef CONFIG_DEBUG_AS_WATCHPOINT
  • arch/amd64/src/proc/thread.c

    r1ace9ea ra6d4ceb  
    3535void thread_create_arch(thread_t *t)
    3636{
    37         t->tls = 0;
     37        t->arch.tls = 0;
    3838}
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