Index: kernel/arch/arm32/src/fpu_context.c
===================================================================
--- kernel/arch/arm32/src/fpu_context.c	(revision 7c3fb9bd77e4d2f6c10517a052e567f176fa91ee)
+++ kernel/arch/arm32/src/fpu_context.c	(revision a57fa325b051d5e952ced94f3f203b231c8f259a)
@@ -117,12 +117,14 @@
 static int fpu_have_coprocessor_access(void)
 {
-/*
- * The register containing the information (CPACR) is not available on armv6-
- * rely on user decision to use CONFIG_FPU.
- */
+	/*
+	 * The register containing the information (CPACR) is not available
+	 * on armv6-. Rely on user decision to use CONFIG_FPU.
+	 */
 #ifdef PROCESSOR_ARCH_armv7_a
 	const uint32_t cpacr = CPACR_read();
-	/* FPU needs access to coprocessor 10 and 11.
-	 * Moreover they need to have same access enabled */
+	/*
+	 * FPU needs access to coprocessor 10 and 11.
+	 * Moreover, they need to have same access enabled
+	 */
 	if (((cpacr & CPACR_CP_MASK(10)) != CPACR_CP_FULL_ACCESS(10)) &&
 	    ((cpacr & CPACR_CP_MASK(11)) != CPACR_CP_FULL_ACCESS(11))) {
@@ -131,4 +133,5 @@
 	}
 #endif
+
 	return 1;
 }
@@ -147,13 +150,15 @@
 static void fpu_enable_coprocessor_access(void)
 {
-/*
- * The register containing the information (CPACR) is not available on armv6-
- * rely on user decision to use CONFIG_FPU.
- */
+	/*
+	 * The register containing the information (CPACR) is not available
+	 * on armv6-. Rely on user decision to use CONFIG_FPU.
+	 */
 #ifdef PROCESSOR_ARCH_armv7_a
 	/* Allow coprocessor access */
 	uint32_t cpacr = CPACR_read();
-	/* FPU needs access to coprocessor 10 and 11.
-	 * Moreover, they need to have same access enabled */
+	/*
+	 * FPU needs access to coprocessor 10 and 11.
+	 * Moreover, they need to have same access enabled
+	 */
 	cpacr &= ~(CPACR_CP_MASK(10) | CPACR_CP_MASK(11));
 	cpacr |= (CPACR_CP_FULL_ACCESS(10) | CPACR_CP_FULL_ACCESS(11));
@@ -172,5 +177,6 @@
 	fpexc_write(0);
 	fpu_enable();
-	/* Mask all exception traps,
+	/*
+	 * Mask all exception traps,
 	 * The bits are RAZ/WI on archs that don't support fpu exc traps.
 	 */