Changeset a52e2f4 in mainline for kernel/arch/sparc64/src/trap
- Timestamp:
- 2016-04-23T20:27:28Z (10 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 0407636
- Parents:
- 27f67f5
- Location:
- kernel/arch/sparc64/src/trap
- Files:
-
- 3 edited
-
sun4u/trap_table.S (modified) (47 diffs)
-
sun4v/mmu.S (modified) (2 diffs)
-
sun4v/trap_table.S (modified) (61 diffs)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/trap/sun4u/trap_table.S
r27f67f5 ra52e2f4 37 37 .text 38 38 39 #include <abi/asmtool.h> 39 40 #include <arch/trap/trap_table.h> 40 41 #include <arch/trap/regwin.h> … … 55 56 */ 56 57 .align TABLE_SIZE 57 .global trap_table 58 trap_table: 58 SYMBOL(trap_table) 59 59 60 60 /* TT = 0x08, TL = 0, instruction_access_exception */ 61 61 .org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE 62 .global instruction_access_exception_tl0 63 instruction_access_exception_tl0: 62 SYMBOL(instruction_access_exception_tl0) 64 63 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate 65 64 mov TT_INSTRUCTION_ACCESS_EXCEPTION, %g2 … … 69 68 /* TT = 0x0a, TL = 0, instruction_access_error */ 70 69 .org trap_table + TT_INSTRUCTION_ACCESS_ERROR*ENTRY_SIZE 71 .global instruction_access_error_tl0 72 instruction_access_error_tl0: 70 SYMBOL(instruction_access_error_tl0) 73 71 mov TT_INSTRUCTION_ACCESS_ERROR, %g2 74 72 clr %g5 … … 77 75 /* TT = 0x10, TL = 0, illegal_instruction */ 78 76 .org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE 79 .global illegal_instruction_tl0 80 illegal_instruction_tl0: 77 SYMBOL(illegal_instruction_tl0) 81 78 mov TT_ILLEGAL_INSTRUCTION, %g2 82 79 clr %g5 … … 85 82 /* TT = 0x11, TL = 0, privileged_opcode */ 86 83 .org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE 87 .global privileged_opcode_tl0 88 privileged_opcode_tl0: 84 SYMBOL(privileged_opcode_tl0) 89 85 mov TT_PRIVILEGED_OPCODE, %g2 90 86 clr %g5 … … 93 89 /* TT = 0x12, TL = 0, unimplemented_LDD */ 94 90 .org trap_table + TT_UNIMPLEMENTED_LDD*ENTRY_SIZE 95 .global unimplemented_LDD_tl0 96 unimplemented_LDD_tl0: 91 SYMBOL(unimplemented_LDD_tl0) 97 92 mov TT_UNIMPLEMENTED_LDD, %g2 98 93 clr %g5 … … 101 96 /* TT = 0x13, TL = 0, unimplemented_STD */ 102 97 .org trap_table + TT_UNIMPLEMENTED_STD*ENTRY_SIZE 103 .global unimplemented_STD_tl0 104 unimplemented_STD_tl0: 98 SYMBOL(unimplemented_STD_tl0) 105 99 mov TT_UNIMPLEMENTED_STD, %g2 106 100 clr %g5 … … 109 103 /* TT = 0x20, TL = 0, fb_disabled handler */ 110 104 .org trap_table + TT_FP_DISABLED*ENTRY_SIZE 111 .global fb_disabled_tl0 112 fp_disabled_tl0: 105 SYMBOL(fp_disabled_tl0) 113 106 mov TT_FP_DISABLED, %g2 114 107 clr %g5 … … 117 110 /* TT = 0x21, TL = 0, fb_exception_ieee_754 handler */ 118 111 .org trap_table + TT_FP_EXCEPTION_IEEE_754*ENTRY_SIZE 119 .global fb_exception_ieee_754_tl0 120 fp_exception_ieee_754_tl0: 112 SYMBOL(fp_exception_ieee_754_tl0) 121 113 mov TT_FP_EXCEPTION_IEEE_754, %g2 122 114 clr %g5 … … 125 117 /* TT = 0x22, TL = 0, fb_exception_other handler */ 126 118 .org trap_table + TT_FP_EXCEPTION_OTHER*ENTRY_SIZE 127 .global fb_exception_other_tl0 128 fp_exception_other_tl0: 119 SYMBOL(fp_exception_other_tl0) 129 120 mov TT_FP_EXCEPTION_OTHER, %g2 130 121 clr %g5 … … 133 124 /* TT = 0x23, TL = 0, tag_overflow */ 134 125 .org trap_table + TT_TAG_OVERFLOW*ENTRY_SIZE 135 .global tag_overflow_tl0 136 tag_overflow_tl0: 126 SYMBOL(tag_overflow_tl0) 137 127 mov TT_TAG_OVERFLOW, %g2 138 128 clr %g5 … … 141 131 /* TT = 0x24, TL = 0, clean_window handler */ 142 132 .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE 143 .global clean_window_tl0 144 clean_window_tl0: 133 SYMBOL(clean_window_tl0) 145 134 CLEAN_WINDOW_HANDLER 146 135 147 136 /* TT = 0x28, TL = 0, division_by_zero */ 148 137 .org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE 149 .global division_by_zero_tl0 150 division_by_zero_tl0: 138 SYMBOL(division_by_zero_tl0) 151 139 mov TT_DIVISION_BY_ZERO, %g2 152 140 clr %g5 … … 155 143 /* TT = 0x30, TL = 0, data_access_exception */ 156 144 .org trap_table + TT_DATA_ACCESS_EXCEPTION*ENTRY_SIZE 157 .global data_access_exception_tl0 158 data_access_exception_tl0: 145 SYMBOL(data_access_exception_tl0) 159 146 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate 160 147 mov TT_DATA_ACCESS_EXCEPTION, %g2 … … 164 151 /* TT = 0x32, TL = 0, data_access_error */ 165 152 .org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE 166 .global data_access_error_tl0 167 data_access_error_tl0: 153 SYMBOL(data_access_error_tl0) 168 154 mov TT_DATA_ACCESS_ERROR, %g2 169 155 clr %g5 … … 172 158 /* TT = 0x34, TL = 0, mem_address_not_aligned */ 173 159 .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE 174 .global mem_address_not_aligned_tl0 175 mem_address_not_aligned_tl0: 160 SYMBOL(mem_address_not_aligned_tl0) 176 161 mov TT_MEM_ADDRESS_NOT_ALIGNED, %g2 177 162 clr %g5 … … 180 165 /* TT = 0x35, TL = 0, LDDF_mem_address_not_aligned */ 181 166 .org trap_table + TT_LDDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE 182 .global LDDF_mem_address_not_aligned_tl0 183 LDDF_mem_address_not_aligned_tl0: 167 SYMBOL(LDDF_mem_address_not_aligned_tl0) 184 168 mov TT_LDDF_MEM_ADDRESS_NOT_ALIGNED, %g2 185 169 clr %g5 … … 188 172 /* TT = 0x36, TL = 0, STDF_mem_address_not_aligned */ 189 173 .org trap_table + TT_STDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE 190 .global STDF_mem_address_not_aligned_tl0 191 STDF_mem_address_not_aligned_tl0: 174 SYMBOL(STDF_mem_address_not_aligned_tl0) 192 175 mov TT_STDF_MEM_ADDRESS_NOT_ALIGNED, %g2 193 176 clr %g5 … … 196 179 /* TT = 0x37, TL = 0, privileged_action */ 197 180 .org trap_table + TT_PRIVILEGED_ACTION*ENTRY_SIZE 198 .global privileged_action_tl0 199 privileged_action_tl0: 181 SYMBOL(privileged_action_tl0) 200 182 mov TT_PRIVILEGED_ACTION, %g2 201 183 clr %g5 … … 204 186 /* TT = 0x38, TL = 0, LDQF_mem_address_not_aligned */ 205 187 .org trap_table + TT_LDQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE 206 .global LDQF_mem_address_not_aligned_tl0 207 LDQF_mem_address_not_aligned_tl0: 188 SYMBOL(LDQF_mem_address_not_aligned_tl0) 208 189 mov TT_LDQF_MEM_ADDRESS_NOT_ALIGNED, %g2 209 190 clr %g5 … … 212 193 /* TT = 0x39, TL = 0, STQF_mem_address_not_aligned */ 213 194 .org trap_table + TT_STQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE 214 .global STQF_mem_address_not_aligned_tl0 215 STQF_mem_address_not_aligned_tl0: 195 SYMBOL(STQF_mem_address_not_aligned_tl0) 216 196 mov TT_STQF_MEM_ADDRESS_NOT_ALIGNED, %g2 217 197 clr %g5 … … 220 200 /* TT = 0x41, TL = 0, interrupt_level_1 handler */ 221 201 .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE 222 .global interrupt_level_1_handler_tl0 223 interrupt_level_1_handler_tl0: 202 SYMBOL(interrupt_level_1_handler_tl0) 224 203 mov TT_INTERRUPT_LEVEL_1, %g2 225 204 clr %g5 … … 228 207 /* TT = 0x42, TL = 0, interrupt_level_2 handler */ 229 208 .org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE 230 .global interrupt_level_2_handler_tl0 231 interrupt_level_2_handler_tl0: 209 SYMBOL(interrupt_level_2_handler_tl0) 232 210 mov TT_INTERRUPT_LEVEL_2, %g2 233 211 clr %g5 … … 236 214 /* TT = 0x43, TL = 0, interrupt_level_3 handler */ 237 215 .org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE 238 .global interrupt_level_3_handler_tl0 239 interrupt_level_3_handler_tl0: 216 SYMBOL(interrupt_level_3_handler_tl0) 240 217 mov TT_INTERRUPT_LEVEL_3, %g2 241 218 clr %g5 … … 244 221 /* TT = 0x44, TL = 0, interrupt_level_4 handler */ 245 222 .org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE 246 .global interrupt_level_4_handler_tl0 247 interrupt_level_4_handler_tl0: 223 SYMBOL(interrupt_level_4_handler_tl0) 248 224 mov TT_INTERRUPT_LEVEL_4, %g2 249 225 clr %g5 … … 252 228 /* TT = 0x45, TL = 0, interrupt_level_5 handler */ 253 229 .org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE 254 .global interrupt_level_5_handler_tl0 255 interrupt_level_5_handler_tl0: 230 SYMBOL(interrupt_level_5_handler_tl0) 256 231 mov TT_INTERRUPT_LEVEL_5, %g2 257 232 clr %g5 … … 260 235 /* TT = 0x46, TL = 0, interrupt_level_6 handler */ 261 236 .org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE 262 .global interrupt_level_6_handler_tl0 263 interrupt_level_6_handler_tl0: 237 SYMBOL(interrupt_level_6_handler_tl0) 264 238 mov TT_INTERRUPT_LEVEL_6, %g2 265 239 clr %g5 … … 268 242 /* TT = 0x47, TL = 0, interrupt_level_7 handler */ 269 243 .org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE 270 .global interrupt_level_7_handler_tl0 271 interrupt_level_7_handler_tl0: 244 SYMBOL(interrupt_level_7_handler_tl0) 272 245 mov TT_INTERRUPT_LEVEL_7, %g2 273 246 clr %g5 … … 276 249 /* TT = 0x48, TL = 0, interrupt_level_8 handler */ 277 250 .org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE 278 .global interrupt_level_8_handler_tl0 279 interrupt_level_8_handler_tl0: 251 SYMBOL(interrupt_level_8_handler_tl0) 280 252 mov TT_INTERRUPT_LEVEL_8, %g2 281 253 clr %g5 … … 284 256 /* TT = 0x49, TL = 0, interrupt_level_9 handler */ 285 257 .org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE 286 .global interrupt_level_9_handler_tl0 287 interrupt_level_9_handler_tl0: 258 SYMBOL(interrupt_level_9_handler_tl0) 288 259 mov TT_INTERRUPT_LEVEL_9, %g2 289 260 clr %g5 … … 292 263 /* TT = 0x4a, TL = 0, interrupt_level_10 handler */ 293 264 .org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE 294 .global interrupt_level_10_handler_tl0 295 interrupt_level_10_handler_tl0: 265 SYMBOL(interrupt_level_10_handler_tl0) 296 266 mov TT_INTERRUPT_LEVEL_10, %g2 297 267 clr %g5 … … 300 270 /* TT = 0x4b, TL = 0, interrupt_level_11 handler */ 301 271 .org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE 302 .global interrupt_level_11_handler_tl0 303 interrupt_level_11_handler_tl0: 272 SYMBOL(interrupt_level_11_handler_tl0) 304 273 mov TT_INTERRUPT_LEVEL_11, %g2 305 274 clr %g5 … … 308 277 /* TT = 0x4c, TL = 0, interrupt_level_12 handler */ 309 278 .org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE 310 .global interrupt_level_12_handler_tl0 311 interrupt_level_12_handler_tl0: 279 SYMBOL(interrupt_level_12_handler_tl0) 312 280 mov TT_INTERRUPT_LEVEL_12, %g2 313 281 clr %g5 … … 316 284 /* TT = 0x4d, TL = 0, interrupt_level_13 handler */ 317 285 .org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE 318 .global interrupt_level_13_handler_tl0 319 interrupt_level_13_handler_tl0: 286 SYMBOL(interrupt_level_13_handler_tl0) 320 287 mov TT_INTERRUPT_LEVEL_13, %g2 321 288 clr %g5 … … 324 291 /* TT = 0x4e, TL = 0, interrupt_level_14 handler */ 325 292 .org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE 326 .global interrupt_level_14_handler_tl0 327 interrupt_level_14_handler_tl0: 293 SYMBOL(interrupt_level_14_handler_tl0) 328 294 mov TT_INTERRUPT_LEVEL_14, %g2 329 295 clr %g5 … … 332 298 /* TT = 0x4f, TL = 0, interrupt_level_15 handler */ 333 299 .org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE 334 .global interrupt_level_15_handler_tl0 335 interrupt_level_15_handler_tl0: 300 SYMBOL(interrupt_level_15_handler_tl0) 336 301 mov TT_INTERRUPT_LEVEL_15, %g2 337 302 clr %g5 … … 340 305 /* TT = 0x60, TL = 0, interrupt_vector_trap handler */ 341 306 .org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE 342 .global interrupt_vector_trap_handler_tl0 343 interrupt_vector_trap_handler_tl0: 307 SYMBOL(interrupt_vector_trap_handler_tl0) 344 308 mov TT_INTERRUPT_VECTOR_TRAP, %g2 345 309 clr %g5 … … 348 312 /* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ 349 313 .org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE 350 .global fast_instruction_access_mmu_miss_handler_tl0 351 fast_instruction_access_mmu_miss_handler_tl0: 314 SYMBOL(fast_instruction_access_mmu_miss_handler_tl0) 352 315 FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER 353 316 354 317 /* TT = 0x68, TL = 0, fast_data_access_MMU_miss */ 355 318 .org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE 356 .global fast_data_access_mmu_miss_handler_tl0 357 fast_data_access_mmu_miss_handler_tl0: 319 SYMBOL(fast_data_access_mmu_miss_handler_tl0) 358 320 FAST_DATA_ACCESS_MMU_MISS_HANDLER 0 359 321 360 322 /* TT = 0x6c, TL = 0, fast_data_access_protection */ 361 323 .org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE 362 .global fast_data_access_protection_handler_tl0 363 fast_data_access_protection_handler_tl0: 324 SYMBOL(fast_data_access_protection_handler_tl0) 364 325 FAST_DATA_ACCESS_PROTECTION_HANDLER 0 365 326 366 327 /* TT = 0x80, TL = 0, spill_0_normal handler */ 367 328 .org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE 368 .global spill_0_normal_tl0 369 spill_0_normal_tl0: 329 SYMBOL(spill_0_normal_tl0) 370 330 SPILL_NORMAL_HANDLER_KERNEL 371 331 372 332 /* TT = 0x84, TL = 0, spill_1_normal handler */ 373 333 .org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE 374 .global spill_1_normal_tl0 375 spill_1_normal_tl0: 334 SYMBOL(spill_1_normal_tl0) 376 335 SPILL_NORMAL_HANDLER_USERSPACE 377 336 378 337 /* TT = 0x88, TL = 0, spill_2_normal handler */ 379 338 .org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE 380 .global spill_2_normal_tl0 381 spill_2_normal_tl0: 339 SYMBOL(spill_2_normal_tl0) 382 340 SPILL_TO_USPACE_WINDOW_BUFFER 383 341 384 342 /* TT = 0xa0, TL = 0, spill_0_other handler */ 385 343 .org trap_table + TT_SPILL_0_OTHER*ENTRY_SIZE 386 .global spill_0_other_tl0 387 spill_0_other_tl0: 344 SYMBOL(spill_0_other_tl0) 388 345 SPILL_TO_USPACE_WINDOW_BUFFER 389 346 390 347 /* TT = 0xc0, TL = 0, fill_0_normal handler */ 391 348 .org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE 392 .global fill_0_normal_tl0 393 fill_0_normal_tl0: 349 SYMBOL(fill_0_normal_tl0) 394 350 FILL_NORMAL_HANDLER_KERNEL 395 351 396 352 /* TT = 0xc4, TL = 0, fill_1_normal handler */ 397 353 .org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE 398 .global fill_1_normal_tl0 399 fill_1_normal_tl0: 354 SYMBOL(fill_1_normal_tl0) 400 355 FILL_NORMAL_HANDLER_USERSPACE 401 356 … … 410 365 127 411 366 .org trap_table + (TT_TRAP_INSTRUCTION_0+\cur)*ENTRY_SIZE 412 .global trap_instruction_\cur\()_tl0 413 trap_instruction_\cur\()_tl0: 367 SYMBOL(trap_instruction_\cur\()_tl0) 414 368 mov \cur, %g2 415 369 ba %xcc, trap_instruction_handler … … 423 377 /* TT = 0x08, TL > 0, instruction_access_exception */ 424 378 .org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE 425 .global instruction_access_exception_tl1 426 instruction_access_exception_tl1: 379 SYMBOL(instruction_access_exception_tl1) 427 380 wrpr %g0, 1, %tl 428 381 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate … … 433 386 /* TT = 0x0a, TL > 0, instruction_access_error */ 434 387 .org trap_table + (TT_INSTRUCTION_ACCESS_ERROR+512)*ENTRY_SIZE 435 .global instruction_access_error_tl1 436 instruction_access_error_tl1: 388 SYMBOL(instruction_access_error_tl1) 437 389 wrpr %g0, 1, %tl 438 390 mov TT_INSTRUCTION_ACCESS_ERROR, %g2 … … 442 394 /* TT = 0x10, TL > 0, illegal_instruction */ 443 395 .org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE 444 .global illegal_instruction_tl1 445 illegal_instruction_tl1: 396 SYMBOL(illegal_instruction_tl1) 446 397 wrpr %g0, 1, %tl 447 398 mov TT_ILLEGAL_INSTRUCTION, %g2 … … 451 402 /* TT = 0x24, TL > 0, clean_window handler */ 452 403 .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE 453 .global clean_window_tl1 454 clean_window_tl1: 404 SYMBOL(clean_window_tl1) 455 405 CLEAN_WINDOW_HANDLER 456 406 457 407 /* TT = 0x28, TL > 0, division_by_zero */ 458 408 .org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE 459 .global division_by_zero_tl1 460 division_by_zero_tl1: 409 SYMBOL(division_by_zero_tl1) 461 410 wrpr %g0, 1, %tl 462 411 mov TT_DIVISION_BY_ZERO, %g2 … … 466 415 /* TT = 0x30, TL > 0, data_access_exception */ 467 416 .org trap_table + (TT_DATA_ACCESS_EXCEPTION+512)*ENTRY_SIZE 468 .global data_access_exception_tl1 469 data_access_exception_tl1: 417 SYMBOL(data_access_exception_tl1) 470 418 wrpr %g0, 1, %tl 471 419 wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate … … 476 424 /* TT = 0x32, TL > 0, data_access_error */ 477 425 .org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE 478 .global data_access_error_tl1 479 data_access_error_tl1: 426 SYMBOL(data_access_error_tl1) 480 427 wrpr %g0, 1, %tl 481 428 mov TT_DATA_ACCESS_ERROR, %g2 … … 485 432 /* TT = 0x34, TL > 0, mem_address_not_aligned */ 486 433 .org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE 487 .global mem_address_not_aligned_tl1 488 mem_address_not_aligned_tl1: 434 SYMBOL(mem_address_not_aligned_tl1) 489 435 wrpr %g0, 1, %tl 490 436 mov TT_MEM_ADDRESS_NOT_ALIGNED, %g2 … … 494 440 /* TT = 0x68, TL > 0, fast_data_access_MMU_miss */ 495 441 .org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE 496 .global fast_data_access_mmu_miss_handler_tl1 497 fast_data_access_mmu_miss_handler_tl1: 442 SYMBOL(fast_data_access_mmu_miss_handler_tl1) 498 443 FAST_DATA_ACCESS_MMU_MISS_HANDLER 1 499 444 500 445 /* TT = 0x6c, TL > 0, fast_data_access_protection */ 501 446 .org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE 502 .global fast_data_access_protection_handler_tl1 503 fast_data_access_protection_handler_tl1: 447 SYMBOL(fast_data_access_protection_handler_tl1) 504 448 FAST_DATA_ACCESS_PROTECTION_HANDLER 1 505 449 506 450 /* TT = 0x80, TL > 0, spill_0_normal handler */ 507 451 .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE 508 .global spill_0_normal_tl1 509 spill_0_normal_tl1: 452 SYMBOL(spill_0_normal_tl1) 510 453 SPILL_NORMAL_HANDLER_KERNEL 511 454 512 455 /* TT = 0x88, TL > 0, spill_2_normal handler */ 513 456 .org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE 514 .global spill_2_normal_tl1 515 spill_2_normal_tl1: 457 SYMBOL(spill_2_normal_tl1) 516 458 SPILL_TO_USPACE_WINDOW_BUFFER 517 459 518 460 /* TT = 0xa0, TL > 0, spill_0_other handler */ 519 461 .org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE 520 .global spill_0_other_tl1 521 spill_0_other_tl1: 462 SYMBOL(spill_0_other_tl1) 522 463 SPILL_TO_USPACE_WINDOW_BUFFER 523 464 524 465 /* TT = 0xc0, TL > 0, fill_0_normal handler */ 525 466 .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE 526 .global fill_0_normal_tl1 527 fill_0_normal_tl1: 467 SYMBOL(fill_0_normal_tl1) 528 468 FILL_NORMAL_HANDLER_KERNEL 529 469 … … 914 854 .endm 915 855 916 .global preemptible_handler 917 preemptible_handler: 856 SYMBOL(preemptible_handler) 918 857 PREEMPTIBLE_HANDLER_TEMPLATE 0 919 858 920 .global trap_instruction_handler 921 trap_instruction_handler: 859 SYMBOL(trap_instruction_handler) 922 860 PREEMPTIBLE_HANDLER_TEMPLATE 1 -
kernel/arch/sparc64/src/trap/sun4v/mmu.S
r27f67f5 ra52e2f4 37 37 .text 38 38 39 #include <abi/asmtool.h> 39 40 #include <arch/trap/sun4v/mmu.h> 40 41 #include <arch/trap/trap_table.h> … … 48 49 * %g1 virtual address that has caused the miss 49 50 */ 50 .global install_identity_mapping 51 install_identity_mapping: 52 51 SYMBOL(install_identity_mapping) 53 52 /* output registers mustn't be clobbered during the hypercall, SAVE is too risky */ 54 53 mov %o0, %g3 -
kernel/arch/sparc64/src/trap/sun4v/trap_table.S
r27f67f5 ra52e2f4 38 38 .text 39 39 40 #include <abi/asmtool.h> 40 41 #include <arch/trap/trap_table.h> 41 42 #include <arch/trap/regwin.h> … … 58 59 */ 59 60 .align TABLE_SIZE 60 .global trap_table 61 trap_table: 61 SYMBOL(trap_table) 62 62 63 63 /* TT = 0x08, TL = 0, instruction_access_exception */ 64 64 /* TT = 0x08, TL = 0, IAE_privilege_violation on UltraSPARC T2 */ 65 65 .org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE 66 .global instruction_access_exception_tl0 67 instruction_access_exception_tl0: 66 SYMBOL(instruction_access_exception_tl0) 68 67 mov TT_INSTRUCTION_ACCESS_EXCEPTION, %g2 69 68 clr %g5 … … 72 71 /* TT = 0x09, TL = 0, instruction_access_mmu_miss */ 73 72 .org trap_table + TT_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE 74 .global instruction_access_mmu_miss_handler_tl0 73 SYMBOL(instruction_access_mmu_miss_handler_tl0) 75 74 ba,a %xcc, fast_instruction_access_mmu_miss_handler_tl0 76 75 77 76 /* TT = 0x0a, TL = 0, instruction_access_error */ 78 77 .org trap_table + TT_INSTRUCTION_ACCESS_ERROR*ENTRY_SIZE 79 .global instruction_access_error_tl0 80 instruction_access_error_tl0: 78 SYMBOL(instruction_access_error_tl0) 81 79 mov TT_INSTRUCTION_ACCESS_ERROR, %g2 82 80 clr %g5 … … 85 83 /* TT = 0x0b, TL = 0, IAE_unauth_access */ 86 84 .org trap_table + TT_IAE_UNAUTH_ACCESS*ENTRY_SIZE 87 .global iae_unauth_access_tl0 88 iae_unauth_access_tl0: 85 SYMBOL(iae_unauth_access_tl0) 89 86 mov TT_IAE_UNAUTH_ACCESS, %g2 90 87 clr %g5 … … 93 90 /* TT = 0x0c, TL = 0, IAE_nfo_page */ 94 91 .org trap_table + TT_IAE_NFO_PAGE*ENTRY_SIZE 95 .global iae_nfo_page_tl0 96 iae_nfo_page_tl0: 92 SYMBOL(iae_nfo_page_tl0) 97 93 mov TT_IAE_NFO_PAGE, %g2 98 94 clr %g5 … … 101 97 /* TT = 0x10, TL = 0, illegal_instruction */ 102 98 .org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE 103 .global illegal_instruction_tl0 104 illegal_instruction_tl0: 99 SYMBOL(illegal_instruction_tl0) 105 100 mov TT_ILLEGAL_INSTRUCTION, %g2 106 101 clr %g5 … … 109 104 /* TT = 0x11, TL = 0, privileged_opcode */ 110 105 .org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE 111 .global privileged_opcode_tl0 112 privileged_opcode_tl0: 106 SYMBOL(privileged_opcode_tl0) 113 107 mov TT_PRIVILEGED_OPCODE, %g2 114 108 clr %g5 … … 117 111 /* TT = 0x12, TL = 0, unimplemented_LDD */ 118 112 .org trap_table + TT_UNIMPLEMENTED_LDD*ENTRY_SIZE 119 .global unimplemented_LDD_tl0 120 unimplemented_LDD_tl0: 113 SYMBOL(unimplemented_LDD_tl0) 121 114 mov TT_UNIMPLEMENTED_LDD, %g2 122 115 clr %g5 … … 125 118 /* TT = 0x13, TL = 0, unimplemented_STD */ 126 119 .org trap_table + TT_UNIMPLEMENTED_STD*ENTRY_SIZE 127 .global unimplemented_STD_tl0 128 unimplemented_STD_tl0: 120 SYMBOL(unimplemented_STD_tl0) 129 121 mov TT_UNIMPLEMENTED_STD, %g2 130 122 clr %g5 … … 133 125 /* TT = 0x14, TL = 0, DAE_invalid_asi */ 134 126 .org trap_table + TT_DAE_INVALID_ASI*ENTRY_SIZE 135 .global dae_invalid_asi_tl0 136 dae_invalid_asi_tl0: 127 SYMBOL(dae_invalid_asi_tl0) 137 128 mov TT_DAE_INVALID_ASI, %g2 138 129 clr %g5 … … 141 132 /* TT = 0x15, TL = 0, DAE_privilege_violation */ 142 133 .org trap_table + TT_DAE_PRIVILEGE_VIOLATION*ENTRY_SIZE 143 .global dae_privilege_violation_tl0 144 dae_privilege_violation_tl0: 134 SYMBOL(dae_privilege_violation_tl0) 145 135 mov TT_DAE_PRIVILEGE_VIOLATION, %g2 146 136 clr %g5 … … 149 139 /* TT = 0x16, TL = 0, DAE_nc_page */ 150 140 .org trap_table + TT_DAE_NC_PAGE*ENTRY_SIZE 151 .global dae_nc_page_tl0 152 dae_nc_page_tl0: 141 SYMBOL(dae_nc_page_tl0) 153 142 mov TT_DAE_NC_PAGE, %g2 154 143 clr %g5 … … 157 146 /* TT = 0x17, TL = 0, DAE_nfo_page */ 158 147 .org trap_table + TT_DAE_NFO_PAGE*ENTRY_SIZE 159 .global dae_nfo_page_tl0 160 dae_nfo_page_tl0: 148 SYMBOL(dae_nfo_page_tl0) 161 149 mov TT_DAE_NFO_PAGE, %g2 162 150 clr %g5 … … 165 153 /* TT = 0x20, TL = 0, fb_disabled handler */ 166 154 .org trap_table + TT_FP_DISABLED*ENTRY_SIZE 167 .global fb_disabled_tl0 168 fp_disabled_tl0: 155 SYMBOL(fp_disabled_tl0) 169 156 mov TT_FP_DISABLED, %g2 170 157 clr %g5 … … 173 160 /* TT = 0x21, TL = 0, fb_exception_ieee_754 handler */ 174 161 .org trap_table + TT_FP_EXCEPTION_IEEE_754*ENTRY_SIZE 175 .global fb_exception_ieee_754_tl0 176 fp_exception_ieee_754_tl0: 162 SYMBOL(fp_exception_ieee_754_tl0) 177 163 mov TT_FP_EXCEPTION_IEEE_754, %g2 178 164 clr %g5 … … 181 167 /* TT = 0x22, TL = 0, fb_exception_other handler */ 182 168 .org trap_table + TT_FP_EXCEPTION_OTHER*ENTRY_SIZE 183 .global fb_exception_other_tl0 184 fp_exception_other_tl0: 169 SYMBOL(fp_exception_other_tl) 185 170 mov TT_FP_EXCEPTION_OTHER, %g2 186 171 clr %g5 … … 189 174 /* TT = 0x23, TL = 0, tag_overflow */ 190 175 .org trap_table + TT_TAG_OVERFLOW*ENTRY_SIZE 191 .global tag_overflow_tl0 192 tag_overflow_tl0: 176 SYMBOL(tag_overflow_tl0) 193 177 mov TT_TAG_OVERFLOW, %g2 194 178 clr %g5 … … 197 181 /* TT = 0x24, TL = 0, clean_window handler */ 198 182 .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE 199 .global clean_window_tl0 200 clean_window_tl0: 183 SYMBOL(clean_window_tl0) 201 184 CLEAN_WINDOW_HANDLER 202 185 203 186 /* TT = 0x28, TL = 0, division_by_zero */ 204 187 .org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE 205 .global division_by_zero_tl0 206 division_by_zero_tl0: 188 SYMBOL(division_by_zero_tl0) 207 189 mov TT_DIVISION_BY_ZERO, %g2 208 190 clr %g5 … … 212 194 /* TT = 0x30, TL = 0, DAE_side_effect_page for UltraPSARC T2 */ 213 195 .org trap_table + TT_DATA_ACCESS_EXCEPTION*ENTRY_SIZE 214 .global data_access_exception_tl0 215 data_access_exception_tl0: 196 SYMBOL(data_access_exception_tl0) 216 197 mov TT_DATA_ACCESS_EXCEPTION, %g2 217 198 clr %g5 … … 220 201 /* TT = 0x31, TL = 0, data_access_mmu_miss */ 221 202 .org trap_table + TT_DATA_ACCESS_MMU_MISS*ENTRY_SIZE 222 .global data_access_mmu_miss_tl0 223 data_access_mmu_miss_tl0: 203 SYMBOL(data_access_mmu_miss_tl0) 224 204 ba,a %xcc, fast_data_access_mmu_miss_handler_tl0 225 205 226 206 /* TT = 0x32, TL = 0, data_access_error */ 227 207 .org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE 228 .global data_access_error_tl0 229 data_access_error_tl0: 208 SYMBOL(data_access_error_tl0) 230 209 mov TT_DATA_ACCESS_ERROR, %g2 231 210 clr %g5 … … 234 213 /* TT = 0x34, TL = 0, mem_address_not_aligned */ 235 214 .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE 236 .global mem_address_not_aligned_tl0 237 mem_address_not_aligned_tl0: 215 SYMBOL(mem_address_not_aligned_tl0) 238 216 mov TT_MEM_ADDRESS_NOT_ALIGNED, %g2 239 217 clr %g5 … … 242 220 /* TT = 0x35, TL = 0, LDDF_mem_address_not_aligned */ 243 221 .org trap_table + TT_LDDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE 244 .global LDDF_mem_address_not_aligned_tl0 245 LDDF_mem_address_not_aligned_tl0: 222 SYMBOL(LDDF_mem_address_not_aligned_tl0) 246 223 mov TT_LDDF_MEM_ADDRESS_NOT_ALIGNED, %g2 247 224 clr %g5 … … 250 227 /* TT = 0x36, TL = 0, STDF_mem_address_not_aligned */ 251 228 .org trap_table + TT_STDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE 252 .global STDF_mem_address_not_aligned_tl0 253 STDF_mem_address_not_aligned_tl0: 229 SYMBOL(STDF_mem_address_not_aligned_tl0) 254 230 mov TT_STDF_MEM_ADDRESS_NOT_ALIGNED, %g2 255 231 clr %g5 … … 258 234 /* TT = 0x37, TL = 0, privileged_action */ 259 235 .org trap_table + TT_PRIVILEGED_ACTION*ENTRY_SIZE 260 .global privileged_action_tl0 261 privileged_action_tl0: 236 SYMBOL(privileged_action_tl0) 262 237 mov TT_PRIVILEGED_ACTION, %g2 263 238 clr %g5 … … 266 241 /* TT = 0x38, TL = 0, LDQF_mem_address_not_aligned */ 267 242 .org trap_table + TT_LDQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE 268 .global LDQF_mem_address_not_aligned_tl0 269 LDQF_mem_address_not_aligned_tl0: 243 SYMBOL(LDQF_mem_address_not_aligned_tl0) 270 244 mov TT_LDQF_MEM_ADDRESS_NOT_ALIGNED, %g2 271 245 clr %g5 … … 274 248 /* TT = 0x39, TL = 0, STQF_mem_address_not_aligned */ 275 249 .org trap_table + TT_STQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE 276 .global STQF_mem_address_not_aligned_tl0 277 STQF_mem_address_not_aligned_tl0: 250 SYMBOL(STQF_mem_address_not_aligned_tl0) 278 251 mov TT_STQF_MEM_ADDRESS_NOT_ALIGNED, %g2 279 252 clr %g5 … … 282 255 /* TT = 0x41, TL = 0, interrupt_level_1 handler */ 283 256 .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE 284 .global interrupt_level_1_handler_tl0 285 interrupt_level_1_handler_tl0: 257 SYMBOL(interrupt_level_1_handler_tl0) 286 258 mov TT_INTERRUPT_LEVEL_1, %g2 287 259 clr %g5 … … 290 262 /* TT = 0x42, TL = 0, interrupt_level_2 handler */ 291 263 .org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE 292 .global interrupt_level_2_handler_tl0 293 interrupt_level_2_handler_tl0: 264 SYMBOL(interrupt_level_2_handler_tl0) 294 265 mov TT_INTERRUPT_LEVEL_2, %g2 295 266 clr %g5 … … 298 269 /* TT = 0x43, TL = 0, interrupt_level_3 handler */ 299 270 .org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE 300 .global interrupt_level_3_handler_tl0 301 interrupt_level_3_handler_tl0: 271 SYMBOL(interrupt_level_3_handler_tl0) 302 272 mov TT_INTERRUPT_LEVEL_3, %g2 303 273 clr %g5 … … 306 276 /* TT = 0x44, TL = 0, interrupt_level_4 handler */ 307 277 .org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE 308 .global interrupt_level_4_handler_tl0 309 interrupt_level_4_handler_tl0: 278 SYMBOL(interrupt_level_4_handler_tl0) 310 279 mov TT_INTERRUPT_LEVEL_4, %g2 311 280 clr %g5 … … 314 283 /* TT = 0x45, TL = 0, interrupt_level_5 handler */ 315 284 .org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE 316 .global interrupt_level_5_handler_tl0 317 interrupt_level_5_handler_tl0: 285 SYMBOL(interrupt_level_5_handler_tl0) 318 286 mov TT_INTERRUPT_LEVEL_5, %g2 319 287 clr %g5 … … 322 290 /* TT = 0x46, TL = 0, interrupt_level_6 handler */ 323 291 .org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE 324 .global interrupt_level_6_handler_tl0 325 interrupt_level_6_handler_tl0: 292 SYMBOL(interrupt_level_6_handler_tl0) 326 293 mov TT_INTERRUPT_LEVEL_6, %g2 327 294 clr %g5 … … 330 297 /* TT = 0x47, TL = 0, interrupt_level_7 handler */ 331 298 .org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE 332 .global interrupt_level_7_handler_tl0 333 interrupt_level_7_handler_tl0: 299 SYMBOL(interrupt_level_7_handler_tl0) 334 300 mov TT_INTERRUPT_LEVEL_7, %g2 335 301 clr %g5 … … 338 304 /* TT = 0x48, TL = 0, interrupt_level_8 handler */ 339 305 .org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE 340 .global interrupt_level_8_handler_tl0 341 interrupt_level_8_handler_tl0: 306 SYMBOL(interrupt_level_8_handler_tl0) 342 307 mov TT_INTERRUPT_LEVEL_8, %g2 343 308 clr %g5 … … 346 311 /* TT = 0x49, TL = 0, interrupt_level_9 handler */ 347 312 .org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE 348 .global interrupt_level_9_handler_tl0 349 interrupt_level_9_handler_tl0: 313 SYMBOL(interrupt_level_9_handler_tl0) 350 314 mov TT_INTERRUPT_LEVEL_9, %g2 351 315 clr %g5 … … 354 318 /* TT = 0x4a, TL = 0, interrupt_level_10 handler */ 355 319 .org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE 356 .global interrupt_level_10_handler_tl0 357 interrupt_level_10_handler_tl0: 320 SYMBOL(interrupt_level_10_handler_tl0) 358 321 mov TT_INTERRUPT_LEVEL_10, %g2 359 322 clr %g5 … … 362 325 /* TT = 0x4b, TL = 0, interrupt_level_11 handler */ 363 326 .org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE 364 .global interrupt_level_11_handler_tl0 365 interrupt_level_11_handler_tl0: 327 SYMBOL(interrupt_level_11_handler_tl0) 366 328 mov TT_INTERRUPT_LEVEL_11, %g2 367 329 clr %g5 … … 370 332 /* TT = 0x4c, TL = 0, interrupt_level_12 handler */ 371 333 .org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE 372 .global interrupt_level_12_handler_tl0 373 interrupt_level_12_handler_tl0: 334 SYMBOL(interrupt_level_12_handler_tl0) 374 335 mov TT_INTERRUPT_LEVEL_12, %g2 375 336 clr %g5 … … 378 339 /* TT = 0x4d, TL = 0, interrupt_level_13 handler */ 379 340 .org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE 380 .global interrupt_level_13_handler_tl0 381 interrupt_level_13_handler_tl0: 341 SYMBOL(interrupt_level_13_handler_tl0) 382 342 mov TT_INTERRUPT_LEVEL_13, %g2 383 343 clr %g5 … … 386 346 /* TT = 0x4e, TL = 0, interrupt_level_14 handler */ 387 347 .org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE 388 .global interrupt_level_14_handler_tl0 389 interrupt_level_14_handler_tl0: 348 SYMBOL(interrupt_level_14_handler_tl0) 390 349 mov TT_INTERRUPT_LEVEL_14, %g2 391 350 clr %g5 … … 394 353 /* TT = 0x4f, TL = 0, interrupt_level_15 handler */ 395 354 .org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE 396 .global interrupt_level_15_handler_tl0 397 interrupt_level_15_handler_tl0: 355 SYMBOL(interrupt_level_15_handler_tl0) 398 356 mov TT_INTERRUPT_LEVEL_15, %g2 399 357 clr %g5 … … 402 360 /* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ 403 361 .org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE 404 .global fast_instruction_access_mmu_miss_handler_tl0 405 fast_instruction_access_mmu_miss_handler_tl0: 362 SYMBOL(fast_instruction_access_mmu_miss_handler_tl0) 406 363 FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER 407 364 408 365 /* TT = 0x68, TL = 0, fast_data_access_MMU_miss */ 409 366 .org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE 410 .global fast_data_access_mmu_miss_handler_tl0 411 fast_data_access_mmu_miss_handler_tl0: 367 SYMBOL(fast_data_access_mmu_miss_handler_tl0) 412 368 FAST_DATA_ACCESS_MMU_MISS_HANDLER 0 413 369 414 370 /* TT = 0x6c, TL = 0, fast_data_access_protection */ 415 371 .org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE 416 .global fast_data_access_protection_handler_tl0 417 fast_data_access_protection_handler_tl0: 372 SYMBOL(fast_data_access_protection_handler_tl0) 418 373 FAST_DATA_ACCESS_PROTECTION_HANDLER 0 419 374 420 375 /* TT = 0x7c, TL = 0, cpu_mondo */ 421 376 .org trap_table + TT_CPU_MONDO*ENTRY_SIZE 422 .global cpu_mondo_handler_tl0 423 cpu_mondo_handler_tl0: 377 SYMBOL(cpu_mondo_handler_tl0) 424 378 mov TT_CPU_MONDO, %g2 425 379 clr %g5 … … 428 382 /* TT = 0x80, TL = 0, spill_0_normal handler */ 429 383 .org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE 430 .global spill_0_normal_tl0 431 spill_0_normal_tl0: 384 SYMBOL(spill_0_normal_tl0) 432 385 SPILL_NORMAL_HANDLER_KERNEL 433 386 434 387 /* TT = 0x84, TL = 0, spill_1_normal handler */ 435 388 .org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE 436 .global spill_1_normal_tl0 437 spill_1_normal_tl0: 389 SYMBOL(spill_1_normal_tl0) 438 390 SPILL_NORMAL_HANDLER_USERSPACE 439 391 440 392 /* TT = 0x88, TL = 0, spill_2_normal handler */ 441 393 .org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE 442 .global spill_2_normal_tl0 443 spill_2_normal_tl0: 394 SYMBOL(spill_2_normal_tl0) 444 395 SPILL_TO_USPACE_WINDOW_BUFFER 445 396 446 397 /* TT = 0xa0, TL = 0, spill_0_other handler */ 447 398 .org trap_table + TT_SPILL_0_OTHER*ENTRY_SIZE 448 .global spill_0_other_tl0 449 spill_0_other_tl0: 399 SYMBOL(spill_0_other_tl0) 450 400 SPILL_TO_USPACE_WINDOW_BUFFER 451 401 452 402 /* TT = 0xc0, TL = 0, fill_0_normal handler */ 453 403 .org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE 454 .global fill_0_normal_tl0 455 fill_0_normal_tl0: 404 SYMBOL(fill_0_normal_tl0) 456 405 FILL_NORMAL_HANDLER_KERNEL 457 406 458 407 /* TT = 0xc4, TL = 0, fill_1_normal handler */ 459 408 .org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE 460 .global fill_1_normal_tl0 461 fill_1_normal_tl0: 409 SYMBOL(fill_1_normal_tl0) 462 410 FILL_NORMAL_HANDLER_USERSPACE 463 411 … … 472 420 127 473 421 .org trap_table + (TT_TRAP_INSTRUCTION_0+\cur)*ENTRY_SIZE 474 .global trap_instruction_\cur\()_tl0 475 trap_instruction_\cur\()_tl0: 422 SYMBOL(trap_instruction_\cur\()_tl0) 476 423 mov \cur, %g2 477 424 ba %xcc, trap_instruction_handler … … 486 433 /* TT = 0x08, TL > 0, IAE_privilege_violation on UltraSPARC T2 */ 487 434 .org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE 488 .global instruction_access_exception_tl1 489 instruction_access_exception_tl1: 435 SYMBOL(instruction_access_exception_tl1) 490 436 wrpr %g0, 1, %tl 491 437 mov TT_INSTRUCTION_ACCESS_EXCEPTION, %g2 … … 495 441 /* TT = 0x09, TL > 0, instruction_access_mmu_miss */ 496 442 .org trap_table + (TT_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE 497 .global instruction_access_mmu_miss_handler_tl1 443 SYMBOL(instruction_access_mmu_miss_handler_tl1) 498 444 wrpr %g0, 1, %tl 499 445 ba,a %xcc, fast_instruction_access_mmu_miss_handler_tl0 … … 501 447 /* TT = 0x0a, TL > 0, instruction_access_error */ 502 448 .org trap_table + (TT_INSTRUCTION_ACCESS_ERROR+512)*ENTRY_SIZE 503 .global instruction_access_error_tl1 504 instruction_access_error_tl1: 449 SYMBOL(instruction_access_error_tl1) 505 450 wrpr %g0, 1, %tl 506 451 mov TT_INSTRUCTION_ACCESS_ERROR, %g2 … … 510 455 /* TT = 0x0b, TL > 0, IAE_unauth_access */ 511 456 .org trap_table + (TT_IAE_UNAUTH_ACCESS+512)*ENTRY_SIZE 512 .global iae_unauth_access_tl1 513 iae_unauth_access_tl1: 457 SYMBOL(iae_unauth_access_tl1) 514 458 wrpr %g0, 1, %tl 515 459 mov TT_IAE_UNAUTH_ACCESS, %g2 … … 519 463 /* TT = 0x0c, TL > 0, IAE_nfo_page */ 520 464 .org trap_table + (TT_IAE_NFO_PAGE+512)*ENTRY_SIZE 521 .global iae_nfo_page_tl1 522 iae_nfo_page_tl1: 465 SYMBOL(iae_nfo_page_tl1) 523 466 wrpr %g0, 1, %tl 524 467 mov TT_IAE_NFO_PAGE, %g2 … … 528 471 /* TT = 0x10, TL > 0, illegal_instruction */ 529 472 .org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE 530 .global illegal_instruction_tl1 531 illegal_instruction_tl1: 473 SYMBOL(illegal_instruction_tl1) 532 474 wrpr %g0, 1, %tl 533 475 mov TT_ILLEGAL_INSTRUCTION, %g2 … … 537 479 /* TT = 0x14, TL > 0, DAE_invalid_asi */ 538 480 .org trap_table + (TT_DAE_INVALID_ASI+512)*ENTRY_SIZE 539 .global dae_invalid_asi_tl1 540 dae_invalid_asi_tl1: 481 SYMBOL(dae_invalid_asi_tl1) 541 482 wrpr %g0, 1, %tl 542 483 mov TT_DAE_INVALID_ASI, %g2 … … 546 487 /* TT = 0x15, TL > 0, DAE_privilege_violation */ 547 488 .org trap_table + (TT_DAE_PRIVILEGE_VIOLATION+512)*ENTRY_SIZE 548 .global dae_privilege_violation_tl1 549 dae_privilege_violation_tl1: 489 SYMBOL(dae_privilege_violation_tl1) 550 490 wrpr %g0, 1, %tl 551 491 mov TT_DAE_PRIVILEGE_VIOLATION, %g2 … … 555 495 /* TT = 0x16, TL > 0, DAE_nc_page */ 556 496 .org trap_table + (TT_DAE_NC_PAGE+512)*ENTRY_SIZE 557 .global dae_nc_page_tl1 558 dae_nc_page_tl1: 497 SYMBOL(dae_nc_page_tl1) 559 498 wrpr %g0, 1, %tl 560 499 mov TT_DAE_NC_PAGE, %g2 … … 564 503 /* TT = 0x17, TL > 0, DAE_nfo_page */ 565 504 .org trap_table + (TT_DAE_NFO_PAGE+512)*ENTRY_SIZE 566 .global dae_nfo_page_tl1 567 dae_nfo_page_tl1: 505 SYMBOL(dae_nfo_page_tl1) 568 506 wrpr %g0, 1, %tl 569 507 mov TT_DAE_NFO_PAGE, %g2 … … 573 511 /* TT = 0x24, TL > 0, clean_window handler */ 574 512 .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE 575 .global clean_window_tl1 576 clean_window_tl1: 513 SYMBOL(clean_window_tl1) 577 514 CLEAN_WINDOW_HANDLER 578 515 579 516 /* TT = 0x28, TL > 0, division_by_zero */ 580 517 .org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE 581 .global division_by_zero_tl1 582 division_by_zero_tl1: 518 SYMBOL(division_by_zero_tl1) 583 519 wrpr %g0, 1, %tl 584 520 mov TT_DIVISION_BY_ZERO, %g2 … … 588 524 /* TT = 0x30, TL > 0, data_access_exception */ 589 525 .org trap_table + (TT_DATA_ACCESS_EXCEPTION+512)*ENTRY_SIZE 590 .global data_access_exception_tl1 591 data_access_exception_tl1: 526 SYMBOL(data_access_exception_tl1) 592 527 wrpr %g0, 1, %tl 593 528 mov TT_DATA_ACCESS_EXCEPTION, %g2 … … 597 532 /* TT = 0x31, TL > 0, data_access_mmu_miss */ 598 533 .org trap_table + (TT_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE 599 .global data_access_mmu_miss_tl1 600 data_access_mmu_miss_tl1: 534 SYMBOL(data_access_mmu_miss_tl1) 601 535 ba,a %xcc, fast_data_access_mmu_miss_handler_tl1 602 536 603 537 /* TT = 0x32, TL > 0, data_access_error */ 604 538 .org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE 605 .global data_access_error_tl1 606 data_access_error_tl1: 539 SYMBOL(data_access_error_tl1) 607 540 wrpr %g0, 1, %tl 608 541 mov TT_DATA_ACCESS_ERROR, %g2 … … 612 545 /* TT = 0x34, TL > 0, mem_address_not_aligned */ 613 546 .org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE 614 .global mem_address_not_aligned_tl1 615 mem_address_not_aligned_tl1: 547 SYMBOL(mem_address_not_aligned_tl1) 616 548 wrpr %g0, 1, %tl 617 549 mov TT_MEM_ADDRESS_NOT_ALIGNED, %g2 … … 621 553 /* TT = 0x68, TL > 0, fast_data_access_MMU_miss */ 622 554 .org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE 623 .global fast_data_access_mmu_miss_handler_tl1 624 fast_data_access_mmu_miss_handler_tl1: 555 SYMBOL(fast_data_access_mmu_miss_handler_tl1) 625 556 FAST_DATA_ACCESS_MMU_MISS_HANDLER 1 626 557 627 558 /* TT = 0x6c, TL > 0, fast_data_access_protection */ 628 559 .org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE 629 .global fast_data_access_protection_handler_tl1 630 fast_data_access_protection_handler_tl1: 560 SYMBOL(fast_data_access_protection_handler_tl1) 631 561 FAST_DATA_ACCESS_PROTECTION_HANDLER 1 632 562 633 563 /* TT = 0x7c, TL > 0, cpu_mondo */ 634 564 .org trap_table + (TT_CPU_MONDO+512)*ENTRY_SIZE 635 .global cpu_mondo_handler_tl1 636 cpu_mondo_handler_tl1: 565 SYMBOL(cpu_mondo_handler_tl1) 637 566 wrpr %g0, %tl 638 567 mov TT_CPU_MONDO, %g2 … … 642 571 /* TT = 0x80, TL > 0, spill_0_normal handler */ 643 572 .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE 644 .global spill_0_normal_tl1 645 spill_0_normal_tl1: 573 SYMBOL(spill_0_normal_tl1) 646 574 SPILL_NORMAL_HANDLER_KERNEL 647 575 648 576 /* TT = 0x88, TL > 0, spill_2_normal handler */ 649 577 .org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE 650 .global spill_2_normal_tl1 651 spill_2_normal_tl1: 578 SYMBOL(spill_2_normal_tl1) 652 579 SPILL_TO_USPACE_WINDOW_BUFFER 653 580 654 581 /* TT = 0xa0, TL > 0, spill_0_other handler */ 655 582 .org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE 656 .global spill_0_other_tl1 657 spill_0_other_tl1: 583 SYMBOL(spill_0_other_tl1) 658 584 SPILL_TO_USPACE_WINDOW_BUFFER 659 585 660 586 /* TT = 0xc0, TL > 0, fill_0_normal handler */ 661 587 .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE 662 .global fill_0_normal_tl1 663 fill_0_normal_tl1: 588 SYMBOL(fill_0_normal_tl1) 664 589 FILL_NORMAL_HANDLER_KERNEL 665 590 … … 1178 1103 .endm 1179 1104 1180 .global preemptible_handler 1181 preemptible_handler: 1105 SYMBOL(preemptible_handler) 1182 1106 PREEMPTIBLE_HANDLER_TEMPLATE 0 1183 1107 1184 .global trap_instruction_handler 1185 trap_instruction_handler: 1108 SYMBOL(trap_instruction_handler) 1186 1109 PREEMPTIBLE_HANDLER_TEMPLATE 1
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