Index: kernel/arch/ia64/src/ia64.c =================================================================== --- kernel/arch/ia64/src/ia64.c (revision 3da166f05b0e0513fe18f82b34f75ef99bef955a) +++ kernel/arch/ia64/src/ia64.c (revision a420203e10bd60efe9f0855ec6ec46a9bf0fac5f) @@ -37,4 +37,5 @@ #include #include +#include #include #include @@ -85,4 +86,6 @@ void arch_pre_mm_init(void) { + if (config.cpu_active == 1) + exception_init(); } Index: kernel/arch/ia64/src/interrupt.c =================================================================== --- kernel/arch/ia64/src/interrupt.c (revision 3da166f05b0e0513fe18f82b34f75ef99bef955a) +++ kernel/arch/ia64/src/interrupt.c (revision a420203e10bd60efe9f0855ec6ec46a9bf0fac5f) @@ -54,4 +54,5 @@ #include #include +#include #include #include @@ -59,9 +60,7 @@ #define VECTORS_64_BUNDLE 20 #define VECTORS_16_BUNDLE 48 -#define VECTORS_16_BUNDLE_START 0x5000 - -#define VECTOR_MAX 0x7f00 - -#define BUNDLE_SIZE 16 +#define VECTORS_16_BUNDLE_START 0x50 + +#define VECTOR_MAX 0x7f static const char *vector_names_64_bundle[VECTORS_64_BUNDLE] = { @@ -122,13 +121,12 @@ }; -static const char *vector_to_string(uint16_t vector) -{ - ASSERT(vector <= VECTOR_MAX); - - if (vector >= VECTORS_16_BUNDLE_START) - return vector_names_16_bundle[(vector - - VECTORS_16_BUNDLE_START) / (16 * BUNDLE_SIZE)]; +static const char *vector_to_string(unsigned int n) +{ + ASSERT(n <= VECTOR_MAX); + + if (n >= VECTORS_16_BUNDLE_START) + return vector_names_16_bundle[n - VECTORS_16_BUNDLE_START]; else - return vector_names_64_bundle[vector / (64 * BUNDLE_SIZE)]; + return vector_names_64_bundle[n / 4]; } @@ -153,5 +151,5 @@ } -void general_exception(uint64_t vector, istate_t *istate) +void general_exception(unsigned int n, istate_t *istate) { const char *desc; @@ -182,8 +180,8 @@ fault_if_from_uspace(istate, "General Exception (%s).", desc); - panic_badtrap(istate, vector, "General Exception (%s).", desc); -} - -void disabled_fp_register(uint64_t vector, istate_t *istate) + panic_badtrap(istate, n, "General Exception (%s).", desc); +} + +void disabled_fp_register(unsigned int n, istate_t *istate) { #ifdef CONFIG_FPU_LAZY @@ -191,17 +189,15 @@ #else fault_if_from_uspace(istate, "Interruption: %#hx (%s).", - (uint16_t) vector, vector_to_string(vector)); + (uint16_t) n, vector_to_string(n)); panic_badtrap(istate, vector, "Interruption: %#hx (%s).", - (uint16_t) vector, vector_to_string(vector)); + (uint16_t) n, vector_to_string(n)); #endif } -void nop_handler(uint64_t vector, istate_t *istate) -{ -} - /** Handle syscall. */ -int break_instruction(uint64_t vector, istate_t *istate) -{ +sysarg_t break_instruction(unsigned int n, istate_t *istate) +{ + sysarg_t ret; + /* * Move to next instruction after BREAK. @@ -214,14 +210,18 @@ } - return syscall_handler(istate->in0, istate->in1, istate->in2, + interrupts_enable(); + ret = syscall_handler(istate->in0, istate->in1, istate->in2, istate->in3, istate->in4, istate->in5, istate->in6); -} - -void universal_handler(uint64_t vector, istate_t *istate) + interrupts_disable(); + + return ret; +} + +void universal_handler(unsigned int n, istate_t *istate) { fault_if_from_uspace(istate, "Interruption: %#hx (%s).", - (uint16_t) vector, vector_to_string(vector)); - panic_badtrap(istate, vector, "Interruption: %#hx (%s).", - (uint16_t) vector, vector_to_string(vector)); + n, vector_to_string(n)); + panic_badtrap(istate, n, "Interruption: %#hx (%s).", + n, vector_to_string(n)); } @@ -229,9 +229,9 @@ { asm volatile ( - "mov cr.eoi=r0;;" + "mov cr.eoi = r0 ;;" ); } -void external_interrupt(uint64_t vector, istate_t *istate) +void external_interrupt(unsigned int n, istate_t *istate) { cr_ivr_t ivr; @@ -298,4 +298,47 @@ } +void exception_init(void) +{ + unsigned int i; + + for (i = 0; i < IVT_ITEMS; i++) + exc_register(i, "universal_handler", false, universal_handler); + + exc_register(EXC_ALT_ITLB_FAULT, + vector_to_string(EXC_ALT_ITLB_FAULT), true, + alternate_instruction_tlb_fault); + exc_register(EXC_ALT_DTLB_FAULT, + vector_to_string(EXC_ALT_DTLB_FAULT), true, + alternate_data_tlb_fault); + exc_register(EXC_NESTED_TLB_FAULT, + vector_to_string(EXC_NESTED_TLB_FAULT), false, + data_nested_tlb_fault); + exc_register(EXC_DATA_D_BIT_FAULT, + vector_to_string(EXC_DATA_D_BIT_FAULT), true, + data_dirty_bit_fault); + exc_register(EXC_INST_A_BIT_FAULT, + vector_to_string(EXC_INST_A_BIT_FAULT), true, + instruction_access_bit_fault); + exc_register(EXC_DATA_A_BIT_FAULT, + vector_to_string(EXC_DATA_A_BIT_FAULT), true, + data_access_bit_fault); + exc_register(EXC_EXT_INTERRUPT, + vector_to_string(EXC_EXT_INTERRUPT), true, + external_interrupt); + + exc_register(EXC_PAGE_NOT_PRESENT, + vector_to_string(EXC_PAGE_NOT_PRESENT), true, + page_not_present); + exc_register(EXC_DATA_AR_FAULT, + vector_to_string(EXC_DATA_AR_FAULT), true, + data_access_rights_fault); + exc_register(EXC_GENERAL_EXCEPTION, + vector_to_string(EXC_GENERAL_EXCEPTION), false, + general_exception); + exc_register(EXC_DISABLED_FP_REG, + vector_to_string(EXC_DISABLED_FP_REG), true, + disabled_fp_register); +} + /** @} */ Index: kernel/arch/ia64/src/ivt.S =================================================================== --- kernel/arch/ia64/src/ivt.S (revision 3da166f05b0e0513fe18f82b34f75ef99bef955a) +++ kernel/arch/ia64/src/ivt.S (revision a420203e10bd60efe9f0855ec6ec46a9bf0fac5f) @@ -31,4 +31,5 @@ #include #include +#include #include #include @@ -39,14 +40,13 @@ /** Partitioning of bank 0 registers. */ -#define R_OFFS r16 +#define R_VECTOR r16 #define R_HANDLER r17 #define R_RET r18 -#define R_TMP r19 #define R_KSTACK_BSP r22 /* keep in sync with before_thread_runs_arch() */ #define R_KSTACK r23 /* keep in sync with before_thread_runs_arch() */ /* Speculation vector handler */ -.macro SPECULATION_VECTOR_HANDLER offs - .org ivt + \offs +.macro SPECULATION_VECTOR_HANDLER vector + .org ivt + \vector * 0x100 /* 1. Save predicates, IIM, IIP, IPSR and ISR CR's in bank 0 registers. */ @@ -94,7 +94,7 @@ * @param handler Interrupt handler address. */ -.macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler - .org ivt + \offs - mov R_OFFS = \offs +.macro HEAVYWEIGHT_HANDLER vector, handler=exc_dispatch + .org ivt + \vector * 0x100 + mov R_VECTOR = \vector movl R_HANDLER = \handler ;; br heavyweight_handler @@ -165,6 +165,5 @@ * copy input parameters to stack. */ - mov R_TMP = 0x2c00 ;; - cmp.eq p6, p5 = R_OFFS, R_TMP ;; + cmp.eq p6, p5 = EXC_BREAK_INSTRUCTION, R_VECTOR ;; /* @@ -309,5 +308,5 @@ mov loc1 = R_RET /* b0 belonging to interrupted context */ mov loc2 = R_HANDLER - mov out0 = R_OFFS + mov out0 = R_VECTOR add out1 = STACK_SCRATCH_AREA_SIZE, r12 @@ -543,73 +542,73 @@ .align 32768 ivt: - HEAVYWEIGHT_HANDLER 0x0000 - HEAVYWEIGHT_HANDLER 0x0400 - HEAVYWEIGHT_HANDLER 0x0800 - HEAVYWEIGHT_HANDLER 0x0c00 alternate_instruction_tlb_fault - HEAVYWEIGHT_HANDLER 0x1000 alternate_data_tlb_fault - HEAVYWEIGHT_HANDLER 0x1400 data_nested_tlb_fault - HEAVYWEIGHT_HANDLER 0x1800 - HEAVYWEIGHT_HANDLER 0x1c00 - HEAVYWEIGHT_HANDLER 0x2000 data_dirty_bit_fault - HEAVYWEIGHT_HANDLER 0x2400 instruction_access_bit_fault - HEAVYWEIGHT_HANDLER 0x2800 data_access_bit_fault - HEAVYWEIGHT_HANDLER 0x2c00 break_instruction - HEAVYWEIGHT_HANDLER 0x3000 external_interrupt /* For external interrupt, heavyweight handler is used. */ - HEAVYWEIGHT_HANDLER 0x3400 - HEAVYWEIGHT_HANDLER 0x3800 - HEAVYWEIGHT_HANDLER 0x3c00 - HEAVYWEIGHT_HANDLER 0x4000 - HEAVYWEIGHT_HANDLER 0x4400 - HEAVYWEIGHT_HANDLER 0x4800 - HEAVYWEIGHT_HANDLER 0x4c00 - - HEAVYWEIGHT_HANDLER 0x5000 page_not_present - HEAVYWEIGHT_HANDLER 0x5100 - HEAVYWEIGHT_HANDLER 0x5200 - HEAVYWEIGHT_HANDLER 0x5300 data_access_rights_fault - HEAVYWEIGHT_HANDLER 0x5400 general_exception - HEAVYWEIGHT_HANDLER 0x5500 disabled_fp_register - HEAVYWEIGHT_HANDLER 0x5600 - SPECULATION_VECTOR_HANDLER 0x5700 - HEAVYWEIGHT_HANDLER 0x5800 - HEAVYWEIGHT_HANDLER 0x5900 - HEAVYWEIGHT_HANDLER 0x5a00 - HEAVYWEIGHT_HANDLER 0x5b00 - HEAVYWEIGHT_HANDLER 0x5c00 - HEAVYWEIGHT_HANDLER 0x5d00 - HEAVYWEIGHT_HANDLER 0x5e00 - HEAVYWEIGHT_HANDLER 0x5f00 - - HEAVYWEIGHT_HANDLER 0x6000 - HEAVYWEIGHT_HANDLER 0x6100 - HEAVYWEIGHT_HANDLER 0x6200 - HEAVYWEIGHT_HANDLER 0x6300 - HEAVYWEIGHT_HANDLER 0x6400 - HEAVYWEIGHT_HANDLER 0x6500 - HEAVYWEIGHT_HANDLER 0x6600 - HEAVYWEIGHT_HANDLER 0x6700 - HEAVYWEIGHT_HANDLER 0x6800 - HEAVYWEIGHT_HANDLER 0x6900 - HEAVYWEIGHT_HANDLER 0x6a00 - HEAVYWEIGHT_HANDLER 0x6b00 - HEAVYWEIGHT_HANDLER 0x6c00 - HEAVYWEIGHT_HANDLER 0x6d00 - HEAVYWEIGHT_HANDLER 0x6e00 - HEAVYWEIGHT_HANDLER 0x6f00 - - HEAVYWEIGHT_HANDLER 0x7000 - HEAVYWEIGHT_HANDLER 0x7100 - HEAVYWEIGHT_HANDLER 0x7200 - HEAVYWEIGHT_HANDLER 0x7300 - HEAVYWEIGHT_HANDLER 0x7400 - HEAVYWEIGHT_HANDLER 0x7500 - HEAVYWEIGHT_HANDLER 0x7600 - HEAVYWEIGHT_HANDLER 0x7700 - HEAVYWEIGHT_HANDLER 0x7800 - HEAVYWEIGHT_HANDLER 0x7900 - HEAVYWEIGHT_HANDLER 0x7a00 - HEAVYWEIGHT_HANDLER 0x7b00 - HEAVYWEIGHT_HANDLER 0x7c00 - HEAVYWEIGHT_HANDLER 0x7d00 - HEAVYWEIGHT_HANDLER 0x7e00 - HEAVYWEIGHT_HANDLER 0x7f00 + HEAVYWEIGHT_HANDLER 0x00 + HEAVYWEIGHT_HANDLER 0x04 + HEAVYWEIGHT_HANDLER 0x08 + HEAVYWEIGHT_HANDLER 0x0c + HEAVYWEIGHT_HANDLER 0x10 + HEAVYWEIGHT_HANDLER 0x14 + HEAVYWEIGHT_HANDLER 0x18 + HEAVYWEIGHT_HANDLER 0x1c + HEAVYWEIGHT_HANDLER 0x20 + HEAVYWEIGHT_HANDLER 0x24 + HEAVYWEIGHT_HANDLER 0x28 + HEAVYWEIGHT_HANDLER 0x2c break_instruction + HEAVYWEIGHT_HANDLER 0x30 + HEAVYWEIGHT_HANDLER 0x34 + HEAVYWEIGHT_HANDLER 0x38 + HEAVYWEIGHT_HANDLER 0x3c + HEAVYWEIGHT_HANDLER 0x40 + HEAVYWEIGHT_HANDLER 0x44 + HEAVYWEIGHT_HANDLER 0x48 + HEAVYWEIGHT_HANDLER 0x4c + + HEAVYWEIGHT_HANDLER 0x50 + HEAVYWEIGHT_HANDLER 0x51 + HEAVYWEIGHT_HANDLER 0x52 + HEAVYWEIGHT_HANDLER 0x53 + HEAVYWEIGHT_HANDLER 0x54 + HEAVYWEIGHT_HANDLER 0x55 + HEAVYWEIGHT_HANDLER 0x56 + SPECULATION_VECTOR_HANDLER 0x57 + HEAVYWEIGHT_HANDLER 0x58 + HEAVYWEIGHT_HANDLER 0x59 + HEAVYWEIGHT_HANDLER 0x5a + HEAVYWEIGHT_HANDLER 0x5b + HEAVYWEIGHT_HANDLER 0x5c + HEAVYWEIGHT_HANDLER 0x5d + HEAVYWEIGHT_HANDLER 0x5e + HEAVYWEIGHT_HANDLER 0x5f + + HEAVYWEIGHT_HANDLER 0x60 + HEAVYWEIGHT_HANDLER 0x61 + HEAVYWEIGHT_HANDLER 0x62 + HEAVYWEIGHT_HANDLER 0x63 + HEAVYWEIGHT_HANDLER 0x64 + HEAVYWEIGHT_HANDLER 0x65 + HEAVYWEIGHT_HANDLER 0x66 + HEAVYWEIGHT_HANDLER 0x67 + HEAVYWEIGHT_HANDLER 0x68 + HEAVYWEIGHT_HANDLER 0x69 + HEAVYWEIGHT_HANDLER 0x6a + HEAVYWEIGHT_HANDLER 0x6b + HEAVYWEIGHT_HANDLER 0x6c + HEAVYWEIGHT_HANDLER 0x6d + HEAVYWEIGHT_HANDLER 0x6e + HEAVYWEIGHT_HANDLER 0x6f + + HEAVYWEIGHT_HANDLER 0x70 + HEAVYWEIGHT_HANDLER 0x71 + HEAVYWEIGHT_HANDLER 0x72 + HEAVYWEIGHT_HANDLER 0x73 + HEAVYWEIGHT_HANDLER 0x74 + HEAVYWEIGHT_HANDLER 0x75 + HEAVYWEIGHT_HANDLER 0x76 + HEAVYWEIGHT_HANDLER 0x77 + HEAVYWEIGHT_HANDLER 0x78 + HEAVYWEIGHT_HANDLER 0x79 + HEAVYWEIGHT_HANDLER 0x7a + HEAVYWEIGHT_HANDLER 0x7b + HEAVYWEIGHT_HANDLER 0x7c + HEAVYWEIGHT_HANDLER 0x7d + HEAVYWEIGHT_HANDLER 0x7e + HEAVYWEIGHT_HANDLER 0x7f Index: kernel/arch/ia64/src/mm/tlb.c =================================================================== --- kernel/arch/ia64/src/mm/tlb.c (revision 3da166f05b0e0513fe18f82b34f75ef99bef955a) +++ kernel/arch/ia64/src/mm/tlb.c (revision a420203e10bd60efe9f0855ec6ec46a9bf0fac5f) @@ -477,9 +477,9 @@ /** Instruction TLB fault handler for faults with VHPT turned off. * - * @param vector Interruption vector. - * @param istate Structure with saved interruption state. - * - */ -void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate) + * @param n Interruption vector. + * @param istate Structure with saved interruption state. + * + */ +void alternate_instruction_tlb_fault(unsigned int n, istate_t *istate) { uintptr_t va; @@ -566,9 +566,9 @@ /** Data TLB fault handler for faults with VHPT turned off. * - * @param vector Interruption vector. - * @param istate Structure with saved interruption state. - * - */ -void alternate_data_tlb_fault(uint64_t vector, istate_t *istate) + * @param n Interruption vector. + * @param istate Structure with saved interruption state. + * + */ +void alternate_data_tlb_fault(unsigned int n, istate_t *istate) { if (istate->cr_isr.sp) { @@ -623,9 +623,9 @@ * This fault should not occur. * - * @param vector Interruption vector. - * @param istate Structure with saved interruption state. - * - */ -void data_nested_tlb_fault(uint64_t vector, istate_t *istate) + * @param n Interruption vector. + * @param istate Structure with saved interruption state. + * + */ +void data_nested_tlb_fault(unsigned int n, istate_t *istate) { ASSERT(false); @@ -634,9 +634,9 @@ /** Data Dirty bit fault handler. * - * @param vector Interruption vector. - * @param istate Structure with saved interruption state. - * - */ -void data_dirty_bit_fault(uint64_t vector, istate_t *istate) + * @param n Interruption vector. + * @param istate Structure with saved interruption state. + * + */ +void data_dirty_bit_fault(unsigned int n, istate_t *istate) { uintptr_t va; @@ -665,9 +665,9 @@ /** Instruction access bit fault handler. * - * @param vector Interruption vector. - * @param istate Structure with saved interruption state. - * - */ -void instruction_access_bit_fault(uint64_t vector, istate_t *istate) + * @param n Interruption vector. + * @param istate Structure with saved interruption state. + * + */ +void instruction_access_bit_fault(unsigned int n, istate_t *istate) { uintptr_t va; @@ -694,9 +694,9 @@ /** Data access bit fault handler. * - * @param vector Interruption vector. - * @param istate Structure with saved interruption state. - * - */ -void data_access_bit_fault(uint64_t vector, istate_t *istate) + * @param n Interruption vector. + * @param istate Structure with saved interruption state. + * + */ +void data_access_bit_fault(unsigned int n, istate_t *istate) { uintptr_t va; @@ -729,9 +729,9 @@ /** Data access rights fault handler. * - * @param vector Interruption vector. - * @param istate Structure with saved interruption state. - * - */ -void data_access_rights_fault(uint64_t vector, istate_t *istate) + * @param n Interruption vector. + * @param istate Structure with saved interruption state. + * + */ +void data_access_rights_fault(unsigned int n, istate_t *istate) { uintptr_t va; @@ -753,9 +753,9 @@ /** Page not present fault handler. * - * @param vector Interruption vector. - * @param istate Structure with saved interruption state. - * - */ -void page_not_present(uint64_t vector, istate_t *istate) + * @param n Interruption vector. + * @param istate Structure with saved interruption state. + * + */ +void page_not_present(unsigned int n, istate_t *istate) { uintptr_t va; Index: kernel/arch/ia64/src/smp/smp_call.c =================================================================== --- kernel/arch/ia64/src/smp/smp_call.c (revision a420203e10bd60efe9f0855ec6ec46a9bf0fac5f) +++ kernel/arch/ia64/src/smp/smp_call.c (revision a420203e10bd60efe9f0855ec6ec46a9bf0fac5f) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2012 Adam Hraska + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia64 + * @{ + */ +/** @file + */ + +#include +#include + +#ifdef CONFIG_SMP + +void arch_smp_call_ipi(unsigned int cpu_id) +{ + panic("smp_call IPI not implemented."); +} + +#endif /* CONFIG_SMP */ + +/** @} + */