Index: arch/amd64/src/fpu_context.c
===================================================================
--- arch/amd64/src/fpu_context.c	(revision 8f00329caf7098cf41c86ae4e096edda0a3858a9)
+++ arch/amd64/src/fpu_context.c	(revision a3eeceb63abe66d5ad2d3892d18a91ad79b185fc)
@@ -57,5 +57,5 @@
 }
 
-void fpu_init(void)
+void fpu_init(fpu_context_t *fctx)
 {
 	/* TODO: Zero all SSE, MMX etc. registers */
Index: arch/ia32/src/fpu_context.c
===================================================================
--- arch/ia32/src/fpu_context.c	(revision 8f00329caf7098cf41c86ae4e096edda0a3858a9)
+++ arch/ia32/src/fpu_context.c	(revision a3eeceb63abe66d5ad2d3892d18a91ad79b185fc)
@@ -49,5 +49,5 @@
 }
 
-void fpu_init(void)
+void fpu_init(fpu_context_t *fctx)
 {
 	__asm__ volatile (
Index: arch/mips32/src/fpu_context.c
===================================================================
--- arch/mips32/src/fpu_context.c	(revision 8f00329caf7098cf41c86ae4e096edda0a3858a9)
+++ arch/mips32/src/fpu_context.c	(revision a3eeceb63abe66d5ad2d3892d18a91ad79b185fc)
@@ -51,5 +51,5 @@
 }
 
-void fpu_init(void)
+void fpu_init(fpu_context_t *fctx)
 {
 	/* TODO: Zero all registers */
Index: generic/include/fpu_context.h
===================================================================
--- generic/include/fpu_context.h	(revision 8f00329caf7098cf41c86ae4e096edda0a3858a9)
+++ generic/include/fpu_context.h	(revision a3eeceb63abe66d5ad2d3892d18a91ad79b185fc)
@@ -36,5 +36,5 @@
 extern void fpu_context_save(fpu_context_t *);
 extern void fpu_context_restore(fpu_context_t *);
-extern void fpu_init(void);
+extern void fpu_init(fpu_context_t *);
 extern void fpu_enable(void);
 extern void fpu_disable(void);
Index: generic/include/mm/frame.h
===================================================================
--- generic/include/mm/frame.h	(revision 8f00329caf7098cf41c86ae4e096edda0a3858a9)
+++ generic/include/mm/frame.h	(revision a3eeceb63abe66d5ad2d3892d18a91ad79b185fc)
@@ -58,11 +58,6 @@
 	__address e1 = s1+sz1;
 	__address e2 = s2+sz2;
-	if (s1 >= s2 && s1 < e2)
-		return 1;
-	if (e1 >= s2 && e1 < e2)
-		return 1;
-	if ((s1 < s2) && (e1 >= e2))
-		return 1;
-	return 0;
+
+	return s1 < e2 && s2 < e1;
 }
 
Index: generic/src/proc/scheduler.c
===================================================================
--- generic/src/proc/scheduler.c	(revision 8f00329caf7098cf41c86ae4e096edda0a3858a9)
+++ generic/src/proc/scheduler.c	(revision a3eeceb63abe66d5ad2d3892d18a91ad79b185fc)
@@ -56,4 +56,6 @@
  * tread is passed control.
  *
+ * THREAD->lock is locked on entry
+ *
  */
 void before_thread_runs(void)
@@ -70,5 +72,5 @@
 		fpu_context_restore(&(THREAD->saved_fpu_context));
 	else {
-		fpu_init();
+		fpu_init(&(THREAD->saved_fpu_context));
 		THREAD->fpu_context_exists=1;
 	}
@@ -80,17 +82,27 @@
 {
 	fpu_enable();
+	spinlock_lock(&CPU->lock);
+
+	/* Save old context */
 	if (CPU->fpu_owner != NULL) {  
+		spinlock_lock(&CPU->fpu_owner->lock);
 		fpu_context_save(&CPU->fpu_owner->saved_fpu_context);
 		/* don't prevent migration */
 		CPU->fpu_owner->fpu_context_engaged=0; 
-	}
+		spinlock_unlock(&CPU->fpu_owner->lock);
+	}
+
+	spinlock_lock(&THREAD->lock);
 	if (THREAD->fpu_context_exists)
 		fpu_context_restore(&THREAD->saved_fpu_context);
 	else {
-		fpu_init();
+		fpu_init(&(THREAD->saved_fpu_context));
 		THREAD->fpu_context_exists=1;
 	}
 	CPU->fpu_owner=THREAD;
 	THREAD->fpu_context_engaged = 1;
+
+	spinlock_unlock(&THREAD->lock);
+	spinlock_unlock(&CPU->lock);
 }
 #endif
Index: test/fpu/fpu1/test.c
===================================================================
--- test/fpu/fpu1/test.c	(revision 8f00329caf7098cf41c86ae4e096edda0a3858a9)
+++ test/fpu/fpu1/test.c	(revision a3eeceb63abe66d5ad2d3892d18a91ad79b185fc)
@@ -127,5 +127,5 @@
 	waitq_wakeup(&can_start, WAKEUP_ALL);
 
-	while (threads_ok != THREADS)
+	while (atomic_get(&threads_ok) != THREADS)
 		;
 		
Index: test/fpu/mips1/test.c
===================================================================
--- test/fpu/mips1/test.c	(revision 8f00329caf7098cf41c86ae4e096edda0a3858a9)
+++ test/fpu/mips1/test.c	(revision a3eeceb63abe66d5ad2d3892d18a91ad79b185fc)
@@ -48,6 +48,4 @@
 {
 	int i;
-	volatile long long j;
-	double e,d,le,f;
 	int arg __attribute__((aligned(16))) = (int)((__native) data);
 	int after_arg __attribute__((aligned(16)));
@@ -78,6 +76,4 @@
 {
 	int i;
-	volatile long long j;
-	double e,d,le,f;
 	int arg __attribute__((aligned(16))) = (int)((__native) data);
 	int after_arg __attribute__((aligned(16)));
@@ -130,5 +126,5 @@
 	waitq_wakeup(&can_start, WAKEUP_ALL);
 
-	while (threads_ok != THREADS)
+	while (atomic_get(&threads_ok) != THREADS)
 		;
 		
Index: test/fpu/sse1/test.c
===================================================================
--- test/fpu/sse1/test.c	(revision 8f00329caf7098cf41c86ae4e096edda0a3858a9)
+++ test/fpu/sse1/test.c	(revision a3eeceb63abe66d5ad2d3892d18a91ad79b185fc)
@@ -48,6 +48,4 @@
 {
 	int i;
-	volatile long long j;
-	double e,d,le,f;
 	int arg __attribute__((aligned(16))) = (int)((__native) data);
 	int after_arg __attribute__((aligned(16)));
@@ -78,6 +76,4 @@
 {
 	int i;
-	volatile long long j;
-	double e,d,le,f;
 	int arg __attribute__((aligned(16))) = (int)((__native) data);
 	int after_arg __attribute__((aligned(16)));
@@ -130,5 +126,5 @@
 	waitq_wakeup(&can_start, WAKEUP_ALL);
 
-	while (threads_ok != THREADS)
+	while (atomic_get(&threads_ok) != THREADS)
 		;