Changeset a35b458 in mainline for kernel/arch/sparc64/src/mm/sun4v
- Timestamp:
- 2018-03-02T20:10:49Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- f1380b7
- Parents:
- 3061bc1
- git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:38:31)
- git-committer:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:10:49)
- Location:
- kernel/arch/sparc64/src/mm/sun4v
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/mm/sun4v/as.c
r3061bc1 ra35b458 79 79 as->arch.tsb_description.reserved = 0; 80 80 as->arch.tsb_description.context = 0; 81 81 82 82 memsetb(tsb, TSB_SIZE, 0); 83 83 #endif 84 84 85 85 return EOK; 86 86 } … … 90 90 #ifdef CONFIG_TSB 91 91 frame_free(as->arch.tsb_description.tsb_base, TSB_FRAMES); 92 92 93 93 return TSB_FRAMES; 94 94 #else … … 102 102 tsb_invalidate(as, 0, (size_t) -1); 103 103 #endif 104 104 105 105 return EOK; 106 106 } … … 117 117 { 118 118 mmu_secondary_context_write(as->asid); 119 119 120 120 #ifdef CONFIG_TSB 121 121 uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH); 122 122 123 123 assert(as->arch.tsb_description.tsb_base); 124 124 uintptr_t tsb = PA2KA(as->arch.tsb_description.tsb_base); 125 125 126 126 if (!overlaps(tsb, TSB_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { 127 127 /* … … 134 134 dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true); 135 135 } 136 136 137 137 __hypercall_fast2(MMU_TSB_CTXNON0, 1, KA2PA(&as->arch.tsb_description)); 138 138 #endif … … 156 156 * 157 157 */ 158 158 159 159 #ifdef CONFIG_TSB 160 160 uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH); 161 161 162 162 assert(as->arch.tsb_description.tsb_base); 163 163 164 164 uintptr_t tsb = PA2KA(as->arch.tsb_description.tsb_base); 165 165 166 166 if (!overlaps(tsb, TSB_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { 167 167 /* -
kernel/arch/sparc64/src/mm/sun4v/frame.c
r3061bc1 ra35b458 48 48 { 49 49 unsigned int i; 50 50 51 51 for (i = 0; i < memmap.cnt; i++) { 52 52 uintptr_t base; … … 62 62 size = ALIGN_DOWN(memmap.zones[i].size - 63 63 (base - ((uintptr_t) memmap.zones[i].start)), FRAME_SIZE); 64 64 65 65 if (!frame_adjust_zone_bounds(low, &base, &size)) 66 66 continue; … … 74 74 if (confdata == ADDR2PFN(KA2PA(PFN2ADDR(0)))) 75 75 confdata = ADDR2PFN(KA2PA(PFN2ADDR(2))); 76 76 77 77 zone_create(pfn, count, confdata, 78 78 ZONE_AVAILABLE | ZONE_LOWMEM); -
kernel/arch/sparc64/src/mm/sun4v/tlb.c
r3061bc1 ra35b458 128 128 { 129 129 tte_data_t data; 130 130 131 131 data.value = 0; 132 132 data.v = true; … … 143 143 data.w = true; 144 144 data.size = pagesize; 145 145 146 146 if (locked) { 147 147 __hypercall_fast4( … … 163 163 { 164 164 tte_data_t data; 165 165 166 166 data.value = 0; 167 167 data.v = true; … … 178 178 data.w = ro ? false : t->w; 179 179 data.size = PAGESIZE_8K; 180 180 181 181 __hypercall_hyperfast( 182 182 t->page, t->as->asid, data.value, MMU_FLAG_DTLB, 0, MMU_MAP_ADDR); … … 190 190 { 191 191 tte_data_t data; 192 192 193 193 data.value = 0; 194 194 data.v = true; … … 203 203 data.w = false; 204 204 data.size = PAGESIZE_8K; 205 205 206 206 __hypercall_hyperfast( 207 207 t->page, t->as->asid, data.value, MMU_FLAG_ITLB, 0, MMU_MAP_ADDR); … … 387 387 { 388 388 unsigned int i; 389 389 390 390 /* switch to nucleus because we are mapped by the primary context */ 391 391 nucleus_enter(); -
kernel/arch/sparc64/src/mm/sun4v/tsb.c
r3061bc1 ra35b458 59 59 size_t i0, i; 60 60 size_t cnt; 61 61 62 62 assert(as->arch.tsb_description.tsb_base); 63 63 64 64 i0 = (page >> MMU_PAGE_WIDTH) & TSB_ENTRY_MASK; 65 65 … … 68 68 else 69 69 cnt = pages; 70 70 71 71 tsb = (tsb_entry_t *) PA2KA(as->arch.tsb_description.tsb_base); 72 72 for (i = 0; i < cnt; i++) … … 87 87 as = t->as; 88 88 index = (t->page >> MMU_PAGE_WIDTH) & TSB_ENTRY_MASK; 89 89 90 90 tsb = (tsb_entry_t *) PA2KA(as->arch.tsb_description.tsb_base); 91 91 tte = &tsb[index]; … … 114 114 tte->data.w = false; 115 115 tte->data.size = PAGESIZE_8K; 116 116 117 117 write_barrier(); 118 118 119 119 tte->data.v = t->p; /* v as valid, p as present */ 120 120 } … … 162 162 tte->data.w = ro ? false : t->w; 163 163 tte->data.size = PAGESIZE_8K; 164 164 165 165 write_barrier(); 166 166 167 167 tte->data.v = t->p; /* v as valid, p as present */ 168 168 }
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