Changeset a2a5529 in mainline
- Timestamp:
- 2008-11-11T07:50:04Z (16 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 59e4864
- Parents:
- b24786a
- Location:
- kernel
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia64/include/asm.h
rb24786a ra2a5529 40 40 #include <arch/register.h> 41 41 42 typedef uint64_t ioport_t; 42 43 43 44 #define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL 44 45 45 static inline void outb( uint64_t port,uint8_t v)46 static inline void outb(ioport_t port,uint8_t v) 46 47 { 47 48 *((uint8_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v; … … 50 51 } 51 52 52 static inline void outw( uint64_t port,uint16_t v)53 static inline void outw(ioport_t port,uint16_t v) 53 54 { 54 55 *((uint16_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v; … … 57 58 } 58 59 59 static inline void outl( uint64_t port,uint32_t v)60 static inline void outl(ioport_t port,uint32_t v) 60 61 { 61 62 *((uint32_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v; … … 66 67 67 68 68 static inline uint8_t inb( uint64_t port)69 static inline uint8_t inb(ioport_t port) 69 70 { 70 71 asm volatile ("mf\n" ::: "memory"); … … 73 74 } 74 75 75 static inline uint16_t inw( uint64_t port)76 static inline uint16_t inw(ioport_t port) 76 77 { 77 78 asm volatile ("mf\n" ::: "memory"); … … 80 81 } 81 82 82 static inline uint32_t inl( uint64_t port)83 static inline uint32_t inl(ioport_t port) 83 84 { 84 85 asm volatile ("mf\n" ::: "memory"); … … 99 100 uint64_t v; 100 101 101 asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1))); 102 103 return v; 102 //I'm not sure why but this code bad inlines in scheduler, 103 //so THE shifts about 16B and causes kernel panic 104 //asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1))); 105 //return v; 106 107 //this code have the same meaning but inlines well 108 asm volatile ("mov %0 = r12" : "=r" (v) ); 109 return v & (~(STACK_SIZE-1)); 104 110 } 105 111 … … 152 158 return v; 153 159 } 160 161 static inline uint64_t cr64_read(void) 162 { 163 uint64_t v; 164 165 asm volatile ("mov %0 = cr64\n" : "=r" (v)); 166 167 return v; 168 } 169 154 170 155 171 /** Write ITC (Interval Timer Counter) register. -
kernel/arch/sparc64/include/asm.h
rb24786a ra2a5529 44 44 #include <arch/stack.h> 45 45 46 typedef uint64_t ioport_t; 47 48 49 static inline void outb(ioport_t port,uint8_t v) 50 { 51 *((uint8_t *)(port)) = v; 52 } 53 54 static inline void outw(ioport_t port,uint16_t v) 55 { 56 *((uint16_t *)(port)) = v; 57 } 58 59 static inline void outl(ioport_t port,uint32_t v) 60 { 61 *((uint32_t *)(port)) = v; 62 } 63 64 65 66 static inline uint8_t inb(ioport_t port) 67 { 68 return *((uint8_t *)(port)); 69 } 70 71 static inline uint16_t inw(ioport_t port) 72 { 73 return *((uint16_t *)(port)); 74 } 75 76 static inline uint32_t inl(ioport_t port) 77 { 78 return *((uint32_t *)(port)); 79 } 80 81 82 83 84 46 85 /** Read Processor State register. 47 86 * -
kernel/arch/sparc64/include/drivers/ns16550.h
rb24786a ra2a5529 36 36 #define KERN_sparc64_NS16550_H_ 37 37 38 #include <arch/types.h>39 #include <arch/drivers/kbd.h>40 41 /* NS16550 registers */42 #define RBR_REG 0 /** Receiver Buffer Register. */43 #define IER_REG 1 /** Interrupt Enable Register. */44 #define IIR_REG 2 /** Interrupt Ident Register (read). */45 #define FCR_REG 2 /** FIFO control register (write). */46 #define LCR_REG 3 /** Line Control register. */47 #define LSR_REG 5 /** Line Status Register. */48 49 #define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */50 51 #define LCR_DLAB 0x80 /** Divisor Latch Access bit. */52 53 /** Structure representing the ns16550 device. */54 typedef struct {55 devno_t devno;56 volatile uint8_t *reg; /** Memory mapped registers of the ns16550. */57 } ns16550_t;58 59 static inline uint8_t ns16550_rbr_read(ns16550_t *dev)60 {61 return dev->reg[RBR_REG];62 }63 64 static inline uint8_t ns16550_ier_read(ns16550_t *dev)65 {66 return dev->reg[IER_REG];67 }68 69 static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v)70 {71 dev->reg[IER_REG] = v;72 }73 74 static inline uint8_t ns16550_iir_read(ns16550_t *dev)75 {76 return dev->reg[IIR_REG];77 }78 79 static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v)80 {81 dev->reg[FCR_REG] = v;82 }83 84 static inline uint8_t ns16550_lcr_read(ns16550_t *dev)85 {86 return dev->reg[LCR_REG];87 }88 89 static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v)90 {91 dev->reg[LCR_REG] = v;92 }93 94 static inline uint8_t ns16550_lsr_read(ns16550_t *dev)95 {96 return dev->reg[LSR_REG];97 }98 38 99 39 #endif -
kernel/arch/sparc64/src/drivers/kbd.c
rb24786a ra2a5529 148 148 #ifdef CONFIG_NS16550 149 149 case KBD_NS16550: 150 ns16550_init(devno, inr, vaddr);150 ns16550_init(devno, inr, (ioport_t)vaddr); 151 151 break; 152 152 #endif -
kernel/genarch/include/kbd/ns16550.h
rb24786a ra2a5529 49 49 extern void ns16550_irq_handler(irq_t *irq, void *arg, ...); 50 50 51 #include <arch/types.h> 52 #ifndef ia64 53 #include <arch/drivers/kbd.h> 54 #endif 55 /* NS16550 registers */ 56 #define RBR_REG 0 /** Receiver Buffer Register. */ 57 #define IER_REG 1 /** Interrupt Enable Register. */ 58 #define IIR_REG 2 /** Interrupt Ident Register (read). */ 59 #define FCR_REG 2 /** FIFO control register (write). */ 60 #define LCR_REG 3 /** Line Control register. */ 61 #define LSR_REG 5 /** Line Status Register. */ 62 63 #define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */ 64 65 #define LCR_DLAB 0x80 /** Divisor Latch Access bit. */ 66 67 /** Structure representing the ns16550 device. */ 68 typedef struct { 69 devno_t devno; 70 volatile ioport_t io_port; /** Memory mapped registers of the ns16550. */ 71 } ns16550_t; 72 73 static inline uint8_t ns16550_rbr_read(ns16550_t *dev) 74 { 75 return inb(dev->io_port+RBR_REG); 76 } 77 static inline void ns16550_rbr_write(ns16550_t *dev, uint8_t v) 78 { 79 outb(dev->io_port+RBR_REG,v); 80 } 81 82 static inline uint8_t ns16550_ier_read(ns16550_t *dev) 83 { 84 return inb(dev->io_port+IER_REG); 85 } 86 87 static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v) 88 { 89 outb(dev->io_port+IER_REG,v); 90 } 91 92 static inline uint8_t ns16550_iir_read(ns16550_t *dev) 93 { 94 return inb(dev->io_port+IIR_REG); 95 } 96 97 static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v) 98 { 99 outb(dev->io_port+FCR_REG,v); 100 } 101 102 static inline uint8_t ns16550_lcr_read(ns16550_t *dev) 103 { 104 return inb(dev->io_port+LCR_REG); 105 } 106 107 static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v) 108 { 109 outb(dev->io_port+LCR_REG,v); 110 } 111 112 static inline uint8_t ns16550_lsr_read(ns16550_t *dev) 113 { 114 return inb(dev->io_port+LSR_REG); 115 } 116 117 118 51 119 #endif 52 120 -
kernel/genarch/src/kbd/key.c
rb24786a ra2a5529 40 40 #include <genarch/kbd/scanc_pc.h> 41 41 #endif 42 43 #if (defined(sparc64)) 42 44 #if (defined(CONFIG_Z8530) || defined(CONFIG_NS16550)) 43 45 #include <genarch/kbd/scanc_sun.h> 44 46 #endif 47 #endif 48 45 49 #include <synch/spinlock.h> 46 50 #include <console/chardev.h> -
kernel/genarch/src/kbd/ns16550.c
rb24786a ra2a5529 39 39 #include <genarch/kbd/scanc.h> 40 40 #include <genarch/kbd/scanc_sun.h> 41 #ifndef ia64 41 42 #include <arch/drivers/kbd.h> 42 43 #include <arch/drivers/ns16550.h> 44 #endif 43 45 #include <ddi/irq.h> 44 46 #include <ipc/irq.h> … … 110 112 * @param vaddr Virtual address of device's registers. 111 113 */ 112 void ns16550_init(devno_t devno, inr_t inr, uintptr_t vaddr)114 void ns16550_init(devno_t devno, inr_t inr, ioport_t port) 113 115 { 114 116 chardev_initialize("ns16550_kbd", &kbrd, &ops); … … 116 118 117 119 ns16550.devno = devno; 118 ns16550. reg = (uint8_t *) vaddr;120 ns16550.io_port = port; 119 121 120 122 irq_initialize(&ns16550_irq); … … 126 128 127 129 sysinfo_set_item_val("kbd", NULL, true); 130 #ifndef ia64 128 131 sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550); 132 #endif 129 133 sysinfo_set_item_val("kbd.devno", NULL, devno); 130 134 sysinfo_set_item_val("kbd.inr", NULL, inr); 131 sysinfo_set_item_val("kbd.address.virtual", NULL, vaddr); 135 sysinfo_set_item_val("kbd.address.virtual", NULL, port); 136 137 #ifdef ia64 138 uint8_t c; 139 c=ns16550_lcr_read(&ns16550); 140 ns16550_lcr_write(&ns16550,0x80|c); 141 ns16550_rbr_write(&ns16550,0x0c); 142 ns16550_ier_write(&ns16550,0x00); 143 ns16550_lcr_write(&ns16550,c); 144 #endif 132 145 133 146 ns16550_grab(); … … 152 165 { 153 166 } 167 154 168 155 169 char ns16550_key_read(chardev_t *d) … … 162 176 ; 163 177 x = ns16550_rbr_read(&ns16550); 178 #ifndef ia64 164 179 if (x != IGNORE_CODE) { 165 180 if (x & KEY_RELEASE) … … 168 183 active_read_key_pressed(x); 169 184 } 185 #else 186 extern chardev_t kbrd; 187 if(x!=0x0d) 188 { 189 if(x==0x7f) x='\b'; 190 chardev_push_character(&kbrd,x); 191 } 192 #endif 193 170 194 } 171 195 return ch; … … 202 226 203 227 x = ns16550_rbr_read(&ns16550); 228 #ifndef ia64 204 229 if (x != IGNORE_CODE) { 205 230 if (x & KEY_RELEASE) … … 208 233 key_pressed(x); 209 234 } 235 #else 236 extern chardev_t kbrd; 237 if(x!=0x0d) 238 { 239 if(x==0x7f) x='\b'; 240 chardev_push_character(&kbrd,x); 241 } 242 #endif 243 210 244 } 211 245 } -
kernel/kernel.config
rb24786a ra2a5529 119 119 120 120 # Support for SMP 121 ! [ARCH=ia32|ARCH=amd64|ARCH=ia32xen|ARCH=sparc64 ] CONFIG_SMP (y/n)121 ! [ARCH=ia32|ARCH=amd64|ARCH=ia32xen|ARCH=sparc64|ARCH=ia64] CONFIG_SMP (y/n) 122 122 123 123 # Improved support for hyperthreading … … 140 140 141 141 # Support for NS16550 serial port 142 ! [ARCH=sparc64] CONFIG_NS16550 (y/n) 142 ! [ARCH=sparc64|ARCH=ia64] CONFIG_NS16550 (y/n) 143 143 144 144 145 # Virtually indexed D-cache support
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