Index: arch/mips/Makefile.inc
===================================================================
--- arch/mips/Makefile.inc	(revision 24241cf473a552121fb672a727f4bb324465801e)
+++ arch/mips/Makefile.inc	(revision a1493d96145d01577f459deef7549d04702d6af6)
@@ -29,5 +29,5 @@
  CFLAGS += -DHAVE_FPU -DFPU_LAZY -mips3
  BFD = ecoff-littlemips
- KERNEL_LOAD_ADDRESS = 0x80010000
+ KERNEL_LOAD_ADDRESS = 0x80100000
 endif
 
@@ -35,5 +35,5 @@
  CFLAGS += -EB -mmemcpy -DBIG_ENDIAN -DHAVE_FPU -DFPU_LAZY -mips3
  BFD = ecoff-bigmips
- KERNEL_LOAD_ADDRESS = 0x80010000
+ KERNEL_LOAD_ADDRESS = 0x80100000
 endif
 
@@ -43,5 +43,5 @@
  BFD = binary
  CFLAGS += -msoft-float -march=4kc 
- KERNEL_LOAD_ADDRESS = 0x80010000
+ KERNEL_LOAD_ADDRESS = 0x80100000
 endif
 
@@ -51,5 +51,5 @@
  BFD = elf32-little
  CFLAGS += -msoft-float -mips3
- KERNEL_LOAD_ADDRESS = 0x80010000
+ KERNEL_LOAD_ADDRESS = 0x80100000
 endif
 
Index: arch/mips/boot/boot.S
===================================================================
--- arch/mips/boot/boot.S	(revision 24241cf473a552121fb672a727f4bb324465801e)
+++ arch/mips/boot/boot.S	(revision a1493d96145d01577f459deef7549d04702d6af6)
@@ -36,5 +36,5 @@
 
 #ifndef KERNEL_LOAD_ADDRESS
-# define KERNEL_LOAD_ADDRESS 0x80010000
+# define KERNEL_LOAD_ADDRESS 0x80100000
 #endif
 	
Index: arch/mips/include/cp0.h
===================================================================
--- arch/mips/include/cp0.h	(revision 24241cf473a552121fb672a727f4bb324465801e)
+++ arch/mips/include/cp0.h	(revision a1493d96145d01577f459deef7549d04702d6af6)
@@ -41,4 +41,9 @@
 #define cp0_status_im_shift		8
 #define cp0_status_im_mask              0xff00
+
+#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f)
+#define cp0_cause_coperr(cause) ((cause >> 28) & 0x3)
+
+#define fpu_cop_id 1
 
 /*
Index: arch/mips/src/exception.c
===================================================================
--- arch/mips/src/exception.c	(revision 24241cf473a552121fb672a727f4bb324465801e)
+++ arch/mips/src/exception.c	(revision a1493d96145d01577f459deef7549d04702d6af6)
@@ -37,4 +37,5 @@
 void exception(struct exception_regdump *pstate)
 {
+	int cause;
 	int excno;
 	__u32 epc_shift = 0;
@@ -60,6 +61,8 @@
 		THREAD->pstate = pstate;
 
+	cause = cp0_cause_read();
+	excno = cp0_cause_excno(cause);
 	/* decode exception number and process the exception */
-	switch (excno = (cp0_cause_read() >> 2) & 0x1f) {
+	switch (excno) {
 		case EXC_Int:
 			interrupt();
@@ -71,8 +74,9 @@
  	 	case EXC_CpU:
 #ifdef FPU_LAZY     
-			scheduler_fpu_lazy_request();
-#else
-			panic("unhandled Coprocessor Unusable Exception\n");
+			if (cp0_cause_coperr(cause) == fpu_cop_id)
+				scheduler_fpu_lazy_request();
+			else
 #endif
+				panic("unhandled Coprocessor Unusable Exception\n");
 			break;
 		case EXC_Mod:
Index: arch/mips/src/mips.c
===================================================================
--- arch/mips/src/mips.c	(revision 24241cf473a552121fb672a727f4bb324465801e)
+++ arch/mips/src/mips.c	(revision a1493d96145d01577f459deef7549d04702d6af6)
@@ -38,4 +38,6 @@
 #include <arch/interrupt.h>
 
+#include <print.h>
+
 /* Size of the code jumping to the exception handler code 
  * - J+NOP 
@@ -47,7 +49,4 @@
 #define CACHE_EXC ((char *) 0x80000100)
 
-#include <arch/debug.h>
-
-#include <print.h>
 void arch_pre_mm_init(void)
 {