Index: arch/amd64/src/amd64.c
===================================================================
--- arch/amd64/src/amd64.c	(revision 4e49572dad56d20917516259581d99e2ff0d8c6c)
+++ arch/amd64/src/amd64.c	(revision a0bb10ef4dc69531a0f1e07ebe00bdbb239dcfef)
@@ -33,4 +33,5 @@
 #include <config.h>
 
+#include <proc/thread.h>
 #include <arch/ega.h>
 #include <genarch/i8042/i8042.h>
@@ -48,4 +49,6 @@
 #include <arch/syscall.h>
 #include <arch/debugger.h>
+#include <syscall/syscall.h>
+
 
 /** Disable I/O on non-privileged levels
@@ -160,2 +163,17 @@
 	i8254_normal_operation();
 }
+
+/** Set Thread-local-storeage pointer
+ *
+ * TLS pointer is set in FS register. Unfortunately the 64-bit
+ * part can be set only in CPL0 mode.
+ *
+ * The specs says, that on %fs:0 there is stored contents of %fs register,
+ * we need not to go to CPL0 to read it.
+ */
+__native sys_tls_set(__native addr)
+{
+	THREAD->tls = addr;
+	write_msr(AMD_MSR_FS, addr);
+	return 0;
+}