Changeset 9eec7bc in mainline
- Timestamp:
- 2013-01-20T00:11:41Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 9043e7e0
- Parents:
- 3fa509b
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/src/cpu/cpu.c
r3fa509b r9eec7bc 132 132 /* Turn off accessed flag, RAZ/WI prior to armv7 */ 133 133 control_reg &= ~(SCTLR_ACCESS_FLAG_EN_FLAG | SCTLR_HW_ACCESS_FLAG_EN_FLAG); 134 /* Disable branch prediction RAZ/WI if not supported */135 control_reg &= ~SCTLR_BRANCH_PREDICT_EN_FLAG;136 134 137 135 /* Unaligned access is supported on armv6+ */ … … 162 160 * Cortex-A8 TRM ch. 7.2.6 p. 7-4 (PDF 245) */ 163 161 control_reg |= SCTLR_INST_CACHE_EN_FLAG; 162 /* Enable branch prediction RAZ/WI if not supported */ 163 control_reg |= SCTLR_BRANCH_PREDICT_EN_FLAG; 164 164 #endif 165 165 SCTLR_write(control_reg);
Note:
See TracChangeset
for help on using the changeset viewer.