Index: arch/amd64/include/mm/page.h
===================================================================
--- arch/amd64/include/mm/page.h	(revision 4e147a6b5728fbdb666c31b993900fd3d6681518)
+++ arch/amd64/include/mm/page.h	(revision 9ea8a7ca32a0148a8f388e6313b10d79946deda1)
@@ -51,5 +51,4 @@
 #define PTL3_INDEX_ARCH(vaddr)	(((vaddr)>>12)&0x1ff)
 
-#define GET_PTL0_ADDRESS_ARCH()			((pte_t *) read_cr3())
 #define GET_PTL1_ADDRESS_ARCH(ptl0, i)		((pte_t *) ((((__u64) ((pte_t *)(ptl0))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl0))[(i)].addr_32_51)<<32 )))
 #define GET_PTL2_ADDRESS_ARCH(ptl1, i)		((pte_t *) ((((__u64) ((pte_t *)(ptl1))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl1))[(i)].addr_32_51)<<32 )))
Index: arch/ia32/include/mm/page.h
===================================================================
--- arch/ia32/include/mm/page.h	(revision 4e147a6b5728fbdb666c31b993900fd3d6681518)
+++ arch/ia32/include/mm/page.h	(revision 9ea8a7ca32a0148a8f388e6313b10d79946deda1)
@@ -49,5 +49,4 @@
 #define PTL3_INDEX_ARCH(vaddr)	(((vaddr)>>12)&0x3ff)
 
-#define GET_PTL0_ADDRESS_ARCH()			((pte_t *) read_cr3())
 #define GET_PTL1_ADDRESS_ARCH(ptl0, i)		((pte_t *)((((pte_t *)(ptl0))[(i)].frame_address)<<12))
 #define GET_PTL2_ADDRESS_ARCH(ptl1, i)		(ptl1)
Index: arch/mips32/include/mm/page.h
===================================================================
--- arch/mips32/include/mm/page.h	(revision 4e147a6b5728fbdb666c31b993900fd3d6681518)
+++ arch/mips32/include/mm/page.h	(revision 9ea8a7ca32a0148a8f388e6313b10d79946deda1)
@@ -60,6 +60,5 @@
 #define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>14)&0x3fff)
 
-#define GET_PTL0_ADDRESS_ARCH()			(PTL0)
-#define SET_PTL0_ADDRESS_ARCH(ptl0)		(PTL0 = (pte_t *)(ptl0))
+#define SET_PTL0_ADDRESS_ARCH(ptl0)
 
 #define GET_PTL1_ADDRESS_ARCH(ptl0, i)		(((pte_t *)(ptl0))[(i)].lo.pfn<<12)
@@ -116,6 +115,4 @@
 extern void page_arch_init(void);
 
-extern pte_t *PTL0;
-
 #endif /* __ASM__ */
 
Index: arch/mips32/src/mm/page.c
===================================================================
--- arch/mips32/src/mm/page.c	(revision 4e147a6b5728fbdb666c31b993900fd3d6681518)
+++ arch/mips32/src/mm/page.c	(revision 9ea8a7ca32a0148a8f388e6313b10d79946deda1)
@@ -29,21 +29,8 @@
 #include <arch/mm/page.h>
 #include <genarch/mm/page_pt.h>
-#include <arch/mm/frame.h>
-#include <mm/frame.h>
 #include <mm/page.h>
-#include <arch/types.h>
-#include <memstr.h>
-
-pte_t *PTL0 = NULL;
 
 void page_arch_init(void)
 {
-	__address ptl0;
-
 	page_operations = &page_pt_operations;
-	
-	ptl0 = frame_alloc(FRAME_KA | FRAME_PANIC, ONE_FRAME, NULL);
-	memsetb(ptl0, FRAME_SIZE, 0);
-	
-	SET_PTL0_ADDRESS(KA2PA(ptl0));
 }
Index: arch/ppc32/include/mm/page.h
===================================================================
--- arch/ppc32/include/mm/page.h	(revision 4e147a6b5728fbdb666c31b993900fd3d6681518)
+++ arch/ppc32/include/mm/page.h	(revision 9ea8a7ca32a0148a8f388e6313b10d79946deda1)
@@ -44,5 +44,4 @@
 #define PTL3_INDEX_ARCH(vaddr)		0
 
-#define GET_PTL0_ADDRESS_ARCH()		0
 #define SET_PTL0_ADDRESS_ARCH(ptl0)
 
Index: arch/sparc64/include/barrier.h
===================================================================
--- arch/sparc64/include/barrier.h	(revision 4e147a6b5728fbdb666c31b993900fd3d6681518)
+++ arch/sparc64/include/barrier.h	(revision 9ea8a7ca32a0148a8f388e6313b10d79946deda1)
@@ -40,16 +40,16 @@
 #define write_barrier()
 
-/** Flush Instruction Memory. */
+/** Flush Instruction Memory instruction. */
 static inline void flush(void)
 {
 	/*
-	 * The FLUSH instruction takes address parameter,
-	 * but JPS1 implementations are free to ignore it.
-	 * The only requirement is that it is a valid address
-	 * as it is passed to D-MMU.
+	 * The FLUSH instruction takes address parameter.
+	 * As such, it may trap if the address is not found in DTLB.
+	 * However, JPS1 implementations are free to ignore the trap.
 	 */
-        __asm__ volatile ("flush %sp\n");       /* %sp is guaranteed to reference mapped memory */
+        __asm__ volatile ("flush %sp\n");
 }
 
+/** Memory Barrier instruction. */
 static inline void membar(void)
 {
Index: genarch/include/mm/page_pt.h
===================================================================
--- genarch/include/mm/page_pt.h	(revision 4e147a6b5728fbdb666c31b993900fd3d6681518)
+++ genarch/include/mm/page_pt.h	(revision 9ea8a7ca32a0148a8f388e6313b10d79946deda1)
@@ -49,5 +49,4 @@
 #define PTL3_INDEX(vaddr)		PTL3_INDEX_ARCH(vaddr)
 
-#define GET_PTL0_ADDRESS()		GET_PTL0_ADDRESS_ARCH()
 #define SET_PTL0_ADDRESS(ptl0)		SET_PTL0_ADDRESS_ARCH(ptl0)
 
